Hardware Architectures for Post-Quantum Digital Signature Schemes (Paperback, 1st ed. 2021)

This book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification. The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs. Describes a comprehensive set of synthesizable c code base as well as the hardware implementations for the different types of PQC algorithms including lattice-based, code-based, and multivariate-based; Demonstrates the hardware (FPGA and ASIC) and hardware-software optimizations and trade-offs of the NIST round 2 signature-based PQC algorithms; Enables designers to build hardware implementations that are resilient to a variety of side-channels.

General

Imprint:	Springer Nature Switzerland AG
Country of origin:	Switzerland
Release date:	October 2021
First published:	2021
Authors:	Deepraj Soni • Kanad Basu • Mohammed Nabeel • Najwa Aaraj • Marc Manzano • Ramesh Karri
Dimensions:	235 x 155mm (L x W)
Format:	Paperback
Pages:	170
Edition:	1st ed. 2021
ISBN-13:	978-3-03-057684-4
Categories:	Books > Professional & Technical > Energy technology & engineering > Electrical engineering > General Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General Promotions
LSN:	3-03-057684-1
Barcode:	9783030576844

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