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Books > Computing & IT > General theory of computing
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A Priori Wire Length Estimates for Digital Design (Hardcover, 2001 ed.)
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A Priori Wire Length Estimates for Digital Design (Hardcover, 2001 ed.)
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The design of digital (computer) systems requires several design
phases: from the behavioural design, over the logical structural
design to the physical design, where the logical structure is
implemented in the physical structure of the system (the chip). Due
to the ever increasing demands on computer system performance, the
physical design phase being one of the most complex design steps in
the entire process. The major goal of this book is to develop a
priori wire length estimation methods that can help the designer in
finding a good lay-out of a circuit in less iterations of physical
design steps and that are useful to compare different physical
architectures. For modelling digital circuits, the interconnection
complexity is of major importance. It can be described by the so
called Rent's rule and the Rent exponent. A Priori Wire Length
Estimates for Digital Design will provide the reader with more
insight in this rule and clearly outlines when and where the rule
can be used and when and where it fails. Also, for the first time,
a comprehensive model for the partitioning behaviour of
multi-terminal nets is developed. This leads to a new parameter for
circuits that describes the distribution of net degrees over the
nets in the circuit. This multi-terminal net model is used
throughout the book for the wire length estimates but it also
induces a method for the generation of synthetic benchmark circuits
that has major advantages over existing benchmark generators. In
the domain of wire length estimations, the most important
contributions of this work are (i) a new model for placement
optimization in a physical (computer) architecture and (ii) the
inclusion of the multi-terminal net modelin the wire length
estimates. The combination of the placement optimization model with
Donath's model for a hierarchical partitioning and placement
results in more accurate wire length estimates. The multi-terminal
net model allows accurate assessments of the impact of
multi-terminal nets on wire length estimates. We distinguish
between delay-related applications, ' for which the length of
source-sink pairs is important, and routing-related applications, '
for which the entire (Steiner) length of the multi-terminal net has
to be taken into account. The wire length models are further
extended by taking into account the interconnections between
internal components and the chip boundary. The application of the
models to three-dimensional systems broadens the scope to more
exotic architectures and to opto-electronic design techniques. We
focus on anisotropic three-dimensional systems and propose a way to
estimate wire lengths for opto-electronic systems. The wire length
estimates can be used for prediction of circuit characteristics,
for improving placement and routing tools in Computer-Aided Design
and for evaluating new computer architectures. All new models are
validated with experiments on benchmark circuits.
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