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Practical Low Power Digital VLSI Design (Hardcover, 1998 ed.)
Loot Price: R5,215
Discovery Miles 52 150
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Practical Low Power Digital VLSI Design (Hardcover, 1998 ed.)
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Practical Low Power Digital VLSI Design emphasizes the optimization
and trade-off techniques that involve power dissipation, in the
hope that the readers are better prepared the next time they are
presented with a low power design problem. The book highlights the
basic principles, methodologies and techniques that are common to
most CMOS digital designs. The advantages and disadvantages of a
particular low power technique are discussed. Besides the classical
area-performance trade-off, the impact to design cycle time,
complexity, risk, testability and reusability are discussed. The
wide impacts to all aspects of design are what make low power
problems challenging and interesting. Heavy emphasis is given to
top-down structured design style, with occasional coverage in the
semicustom design methodology. The examples and design techniques
cited have been known to be applied to production scale designs or
laboratory settings. The goal of Practical Low Power Digital VLSI
Design is to permit the readers to practice the low power
techniques using current generation design style and process
technology. Practical Low Power Digital VLSI Design considers a
wide range of design abstraction levels spanning circuit, logic,
architecture and system. Substantial basic knowledge is provided
for qualitative and quantitative analysis at the different design
abstraction levels. Low power techniques are presented at the
circuit, logic, architecture and system levels. Special techniques
that are specific to some key areas of digital chip design are
discussed as well as some of the low power techniques that are just
appearing on the horizon. Practical Low Power Digital VLSI Design
will be of benefit to VLSI design engineers and students who have a
fundamental knowledge of CMOS digital design.
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