As the demand for digital communication networks has increased, so
have the challenges in network component design. To meet
ever-escalating performance, flexibility, and economy requirements,
the networking industry has opted to build products around network
processors. These new chips range from task-specific processors,
such as classification and encryption engines, to more
general-purpose packet or communications processors. Programmable
yet application-specific, their designs are tailored to efficiently
implement communications applications such as routing, protocol
analysis, voice and data convergence, firewalls, VPNs, and
QoS.
Network processor design is an emerging field with issues and
opportunities both numerous and formidable. To help meet this
challenge, the editors of this volume created the first Workshop on
Network Processors, a forum for scientists and engineers from
academia and industry to discuss their latest research in the
architecture, design, programming, and use of these devices. In
addition to including the results of the Workshop in this volume,
the editors also present specially commissioned material from
practicing designers, who discuss their companies' latest network
processors. "Network Processor Design: Issues and Practices" is an
essential reference on network processors for graduate students,
researchers, and practicing designers.
* Includes contributions from major academic and industrial
research labs including Aachen University of Technology; Cisco
Systems; Infineon Technologies; Intel Corp.; North Carolina State
University; Swiss Federal Institute of Technology; University of
California, Berkeley; University of Dortmund; University of
Washington; and Washington University.
* Examines the latest network processors from Agere Systems, Cisco,
IBM, Intel, Motorola, Sierra Inc., and TranSwitch.
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