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High-Level Synthesis - from Algorithm to Digital Circuit (Hardcover, 2008 ed.)
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High-Level Synthesis - from Algorithm to Digital Circuit (Hardcover, 2008 ed.)
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High-level synthesis - also called behavioral and
architectural-level synthesis - is a key design technology to
realize systems on chip/package of various kinds, whether single or
multi-processors, homogeneousor heterogeneous, for the emb- ded
systems market or not. Actually, as technology progresses and
systems become increasingly complex, the use of high-level
abstractions and synthesis methods becomes more and more a
necessity. Indeed, the productivityof designers increases with the
abstraction level, as demonstrated by practices in both the
software and hardware domains. The use of high-level models allows
designers with systems, rather than circuit, backgroundto be
productive, thus matching the trend of industry
whichisdeliveringanincreasinglylargernumberofintegratedsystemsascompared
to integrated circuits. The potentials of high-level synthesis
relate to leaving implementation details to the design algorithms
and tools, including the ability to determine the precise timing of
operations, data transfers, and storage. High-level optimization,
coupled with high-levelsynthesis, canprovidedesignerswith the
optimalconcurrencystr- ture for a data ow and corresponding
technological constraints, thus providing the balancing act in the
trade-offbetween latency and resource usage. For complex s- tems,
the design space exploration, i.e., the systematic search for the
Pareto-optimal points, can only be done by automated high-level
synthesis and optimization tools. Nevertheless, high-level
synthesis has been showing a long gestation period. Despite early
resultsin the 1980s, it is still not commonpracticein hardwaredes
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