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Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Electronic devices & materials
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Simultaneous Switching Noise of CMOS Devices and Systems (Hardcover, 1994 ed.)
Loot Price: R3,059
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Simultaneous Switching Noise of CMOS Devices and Systems (Hardcover, 1994 ed.)
Series: The Springer International Series in Engineering and Computer Science, 249
Expected to ship within 10 - 15 working days
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This monograph presents our recent research on Simultaneous
Switching Noise (SSN) and related issues for CMOS based systems.
Although some SSN related work was previously reported in the
literature, it were mainly for Emitter Coupled Logic (ECL) gates
using Bipolar Junction Transistors (BJTs). This present work covers
in-depth analysis on estimating SSN and its impact for CMOS based
devices and systems. At present semiconductor industries are moving
towards scaled CMOS devices and reduced supply voltage. SSN
together with coupled noise may limit the packing density, and
thereby the frequency of operation of packaged systems. Our goal is
to provide efficient and yet reliable methodologies and algorithms
to estimate the overall noise containment in single chip and
multi-chip package assemblies. We hope that the techniques and
results described in this book will be useful as guides for design,
package, and system engineers and academia working in this area.
Through this monograph, we hope that we have shown the necessity of
interactions that are essential between chip design, system design
and package design engineers to design and manufacture optimal
packaged systems. Work reported in this monograph was partially
supported by the grant from Semiconductor Research Corporation (SRC
Contract No. 92-MP-086).
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