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Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms (Paperback, Softcover reprint of hardcover 1st ed. 2006) Loot Price: R4,552
Discovery Miles 45 520
Repayment Terms: R427 pm x 12*
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Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms (Paperback, Softcover reprint of...

Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms (Paperback, Softcover reprint of hardcover 1st ed. 2006)

Tim Kogel, Rainer Leupers, Heinrich Meyr

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Loot Price R4,552 Discovery Miles 45 520 | Repayment Terms: R427 pm x 12*

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Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms first gives a comprehensive update on recent developments in the area of SoC platforms and ESL design methodologies. The main contribution is the rigorous definition of a framework for modeling at the timing approximate level of abstraction. Subsequently this book presents a set of tools for the creation and exploration of timing approximate SoC platform models.

General

Imprint: Springer
Country of origin: Netherlands
Release date: November 2010
First published: 2006
Authors: Tim Kogel • Rainer Leupers • Heinrich Meyr
Dimensions: 240 x 160 x 11mm (L x W x T)
Format: Paperback
Pages: 186
Edition: Softcover reprint of hardcover 1st ed. 2006
ISBN-13: 978-90-481-7202-3
Categories: Books > Computing & IT > Computer programming > Software engineering
Books > Computing & IT > Applications of computing > Computer modelling & simulation
Books > Professional & Technical > Technology: general issues > Technical design > Computer aided design (CAD)
Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components
Books > Computing & IT > Applications of computing > Artificial intelligence > Knowledge-based systems / expert systems
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LSN: 90-481-7202-0
Barcode: 9789048172023

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