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Energy Efficient and Reliable Embedded Nanoscale SRAM Design: Bhupendra Singh Reniwal, Pooran Singh, Ambika Prasad Shah,... Energy Efficient and Reliable Embedded Nanoscale SRAM Design
Bhupendra Singh Reniwal, Pooran Singh, Ambika Prasad Shah, Santosh Kumar Vishvakarma
R3,868 Discovery Miles 38 680 Ships in 12 - 19 working days

This reference text covers a wide spectrum for designing robust embedded memory and peripheral circuitry. It will serve as a useful text for senior undergraduate, graduate students and professionals in areas including electronics and communications engineering, electrical engineering, mechanical engineering, and aerospace engineering. Discusses low power design methodologies for SRAM. Covers radiation hardened SRAM design for aerospace applications. Focusses on various reliability issues which are faced by sub-micron technologies. Exhibits more stable memory topologies. Nanoscale technologies unveiled significant challenges to the design of energy efficient and reliable SRAMs. This reference text investigates the impact of process variation, leakage, aging, soft errors and related reliability issues in embedded memory and periphery circuitry. The text adopts a unique way to explain SRAM bitcell, array design and analysis of its design parameters to meet the sub-nano-regime challenges for CMOS devices. It comprehensively covers low power design methodologies for SRAM, exhibits more stable memory topologies, and radiation hardened SRAM design for aerospace applications. Every chapter includes glossary, highlights, question bank, and problems. The text will serve as a useful text for senior undergraduate, graduate students and professionals in areas including electronics and communications engineering, electrical engineering, mechanical engineering, and aerospace engineering. Discussing compressively study of variability induced failure mechanism in sense amplifiers and power, delay and read yield trade-offs, this reference text will serve as a useful text for senior undergraduate, graduate students and professionals in areas including electronics and communications engineering, electrical engineering, mechanical engineering, and aerospace engineering. It covers development of robust SRAMs, well suited for low-power multi-core processors for wireless sensors node, battery-operated portable devices, personal healthcare assistants and smart IoT applications.

VLSI Design and Test - 26th International Symposium, VDAT 2022, Jammu, India, July 17-19, 2022, Revised Selected Papers... VLSI Design and Test - 26th International Symposium, VDAT 2022, Jammu, India, July 17-19, 2022, Revised Selected Papers (Paperback, 1st ed. 2022)
Ambika Prasad Shah, Sudeb Dasgupta, Anand Darji, Jaynarayan Tudu
R2,967 Discovery Miles 29 670 Ships in 10 - 15 working days

This book constitutes the proceedings of the 26th International Symposium on VLSI Design and Test, VDAT 2022, which took place in Jammu, India, in July 2022. The 32 regular papers and 16 short papers presented in this volume were carefully reviewed and selected from 220 submissions. They were organized in topical sections as follows: Devices and Technology; Sensors; Analog/Mixed Signal; Digital Design; Emerging Technologies and Memory; System Design.

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