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Silicon, as an electronic substrate, has sparked a technological
revolution that has allowed the realization of very large scale
integration (VLSI) of circuits on a chip. These 6 fingernail-sized
chips currently carry more than 10 components, consume low power,
cost a few dollars, and are capable of performing data processing,
numerical computations, and signal conditioning tasks at
gigabit-per-second rates. Silicon, as a mechanical substrate,
promises to spark another technological revolution that will allow
computer chips to come with the eyes, ears, and even hands needed
for closed-loop control systems. The silicon VLSI process
technology which has been perfected over three decades can now be
extended towards the production of novel structures such as
epitaxially grown optoelectronic GaAs devices, buried layers for
three dimensional integration, micromechanical mechanisms,
integrated photonic circuits, and artificial neural networks. This
book begins by addressing the processing of electronic and
optoelectronic devices produced by using lattice mismatched
epitaxial GaAs films on Si. Two viable technologies are considered.
In one, silicon is used as a passive substrate in order to take
advantage of its favorable properties over bulk GaAs; in the other,
GaAs and Si are combined on the same chip in order to develop IC
configurations with improved performance and increased levels of
integration. The relationships between device operation and
substrate quality are discussed in light of potential electronic
and optoelectronic applications.
As feature dimensions of integrated circuits shrink, the associated
geometrical constraints on junction depth impose severe
restrictions on the thermal budget for processing such devices.
Furthermore, due to the relatively low melting point of the first
aluminum metallization level, such restrictions extend to the
fabrication of multilevel structures that are now essential in
increasing packing density of interconnect lines. The fabrication
of ultra large scale integrated (ULSI) devices under thermal budget
restrictions requires the reassessment of existing and the
development of new microelectronic materials and processes. This
book addresses three broad but interrelated areas. The first area
focuses on the subject of rapid thermal processing (RTP), a
technology that allows minimization of processing time while
relaxing the constraints on high temperature. Initially developed
to limit dopant redistribution, current applications of RTP are
shown here to encompass annealing, oxidation, nitridation,
silicidation, glass reflow, and contact sintering. In a second but
complementary area, advances in equipment design and performance of
rapid thermal processing equipment are presented in conjunction
with associated issues of temperature measurement and control.
Defect mechanisms are assessed together with the resulting
properties of rapidly deposited and processed films. The concept of
RTP integration for a full CMOS device process is also examined
together with its impact on device characteristics.
The primary thrust of very large scale integration (VLS ) is the
miniaturization of devices to increase packing density, achieve
higher speed, and consume lower power. The fabrication of
integrated circuits containing in excess of four million components
per chip with design rules in the submicron range has now been made
possible by the introduction of innovative circuit designs and the
development of new microelectronic materials and processes. This
book addresses the latter challenge by assessing the current status
of the science and technology associated with the production of
VLSI silicon circuits. It represents the cumulative effort of
experts from academia and industry who have come together to blend
their expertise into a tutorial overview and cohesive update of
this rapidly expanding field. A balance of fundamental and applied
contributions cover the basics of microelectronics materials and
process engineering. Subjects in materials science include silicon,
silicides, resists, dielectrics, and interconnect metallization.
Subjects in process engineering include crystal growth, epitaxy,
oxidation, thin film deposition, fine-line lithography, dry
etching, ion implantation, and diffusion. Other related topics such
as process simulation, defects phenomena, and diagnostic techniques
are also included. This book is the result of a NATO-sponsored
Advanced Study Institute (AS ) held in Castelvecchio Pascoli,
Italy. Invited speakers at this institute provided manuscripts
which were edited, updated, and integrated with other contributions
solicited from non-participants to this AS .
The primary thrust of very large scale integration (VLS ) is the
miniaturization of devices to increase packing density, achieve
higher speed, and consume lower power. The fabrication of
integrated circuits containing in excess of four million components
per chip with design rules in the submicron range has now been made
possible by the introduction of innovative circuit designs and the
development of new microelectronic materials and processes. This
book addresses the latter challenge by assessing the current status
of the science and technology associated with the production of
VLSI silicon circuits. It represents the cumulative effort of
experts from academia and industry who have come together to blend
their expertise into a tutorial overview and cohesive update of
this rapidly expanding field. A balance of fundamental and applied
contributions cover the basics of microelectronics materials and
process engineering. Subjects in materials science include silicon,
silicides, resists, dielectrics, and interconnect metallization.
Subjects in process engineering include crystal growth, epitaxy,
oxidation, thin film deposition, fine-line lithography, dry
etching, ion implantation, and diffusion. Other related topics such
as process simulation, defects phenomena, and diagnostic techniques
are also included. This book is the result of a NATO-sponsored
Advanced Study Institute (AS ) held in Castelvecchio Pascoli,
Italy. Invited speakers at this institute provided manuscripts
which were edited, updated, and integrated with other contributions
solicited from non-participants to this AS .
The European Materials Society decided to hold a Symposium entitled
"Materials and Processes for Submicron Technologies" in June 16-19,
1998, within the yearly E-MRS Spring Meeting in Strasbourg, France.
The purpose of this meeting was to discuss the results of the
advances in microelectronic devices directly relating to the
reduction in size of features of the devices down to submicron
size. When electronic materials are patterned to these small sizes,
their physico-chemical properties show many aspects
(interdiffusion, electromigration, etc.), many of these not well
known yet. The articles presented in this volume, 28 in number, are
representative of the 40 papers accepted for this particular E-MRS
Meeting (Symposium N).
GaAs on Si: Device Applications.- Substrate Considerations.-
Majority-Carrier Devices.- Minority-Carrier Devices.- Conclusions.-
Ion Beam Synthesis in Silicon.- The Ion Implantation Process.-
Buried SiO2 Layers in Si.- Buried Monocrystalline CoSi2 Layers in
Si.- Conclusions.- Ion Beam Processing of Chemical Vapor Deposited
Silicon Layers.- Ion Beam Effects.- Epitaxy of Deposited Layers.-
Polycrystal Formation.- Technology and Devices for Silicon Based
Three-Dimensional Circuits.- 3D-Technology.- Device
Characteristics.- Features of 3D-Circuits.- Demonstrators.-
Conclusions.- Integrated Fabrication of Micromechanical Structures
on Silicon.- Mechanical Properties of Silicon.- Thermal
Properties.- Fabrication Techniques.- Etching.- Anisotropic
Etching.- Boron Doped Etch Stop.- Electrochemical Etch Stop.-
Embedded Layers.- Surface Microstructures.- Bonding of Layers.-
Electrostatic Bonding.- Oxide Bonding.- Bonding to Metals.-
Conclusion.- Micromachining of Silicon for Sensors.- Physical
Properties of Silicon.- Transduction Techniques.- Fabrication
Techniques.- Pressure Sensors.- Accelerometers.- Microresonator
Sensors.- Optical Microresonator Sensors.- Conclusions.-
Micromachining of Silicon for Sensors.- Hybrid or Monolithic
Approach for optoelectronics: That is the question.- About the
Hybrid Approach Material Competitors.- Silicon Based Technologies
developed at LETI.- Planar and Channel waveguide Properties of IOS
Technologies.- Field of Activities.- Integrated Optical Spectrum
Analyser (IOSA).- Integrated Optical Sensors.- Optical
Communication Applications.- Optical Memories.- Conclusion.-
Principles and Implementation of Artificial Neural Networks.-
Binary Networks.- Analog Networks.- Miscellaneous Networks.- Future
VLSI Networks.- Conclusions.- List of Participants.
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