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Books > Computing & IT > Computer hardware & operating systems
This book provides an overview of automatic test pattern generation (ATPG) and introduces novel techniques to complement classical ATPG, based on Boolean Satisfiability (SAT). A fast and highly fault efficient SAT-based ATPG framework is presented which is also able to generate high-quality delay tests such as robust path delay tests, as well as tests with long propagation paths to detect small delay defects. The aim of the techniques and methodologies presented in this book is to improve SAT-based ATPG, in order to make it applicable in industrial practice. Readers will learn to improve the performance and robustness of the overall test generation process, so that the ATPG algorithm reliably will generate test patterns for most targeted faults in acceptable run time to meet the high fault coverage demands of industry. The techniques and improvements presented in this book provide the following advantages: Provides a comprehensive introduction to test generation and Boolean Satisfiability (SAT);Describes a highly fault efficient SAT-based ATPG framework; Introduces circuit-oriented SAT solving techniques, which make use of structural information and are able to accelerate the search process significantly;Provides SAT formulations for the prevalent delay faults models, in addition to the classical stuck-at fault model;Includes an industrial perspective on the state-of-the-art in the testing, along with SAT; two topics typically distinguished from each other. "
This book describes the emerging field of self-organizing, multicore, distributed and real-time embedded systems. Self organization of both hardware and software can be a key technique to handle the growing complexity of modern computing systems. Distributed systems running hundreds of tasks on dozens of processors, each equipped with multiple cores, requires self organization principles to ensure efficient and reliable operation. This book addresses various, so-called Self X features such as self-configuration, self optimization, self adaptation, self healing and self protection."
Exchange, SQL and IIS are at the core of most Microsoft enterprise
servers. The 2007 releases of these products, along with the
release of Windows Vista and Windows 2008 Server, represents the
biggest overhaul of Windows enterprise products since Windows 2000.
The dramatic changes to security tools and the addition of features
that support "anywhere access" present IT professionals with a
steep learning curve. Making certain that these products are
configured to meet regulatory compliance requirements adds
addtionaly complexity to day-to-day management network management.
This book presents a realistic and a holistic review of the microelectronic and semiconductor technology options in the post Moore's Law regime. Technical tradeoffs, from architecture down to manufacturing processes, associated with the 2.5D and 3D integration technologies, as well as the business and product management considerations encountered when faced by disruptive technology options, are presented. Coverage includes a discussion of Integrated Device Manufacturer (IDM) vs Fabless, vs Foundry, and Outsourced Assembly and Test (OSAT) barriers to implementation of disruptive technology options. This book is a must-read for any IC product team that is considering getting off the Moore's Law track, and leveraging some of the More-than-Moore technology options for their next microelectronic product.
WE ARE ADRIFT IN A SEA OF INFORMATION. We need information to make
good decisions, to get things done, to learn, and to gain better
mastery of the world around us. But we do not always have good
control of our information - not even in the "home waters" of an
office or on the hard drive of a computer. Instead, information may
be controlling us - keeping us from doing the things we need to do,
getting us to waste money and precious time. The growth of
available information, plus the technologies for its creation,
storage, retrieval, distribution and use, is astonishing and
sometimes bewildering. Can there be a similar growth in our
understanding for how best to manage information and informational
tools?
This book is designed for the professional system administrators
who need to securely deploy Microsoft Vista in their networks.
Readers will not only learn about the new security features of
Vista, but they will learn how to safely integrate Vista with their
existing wired and wireless network infrastructure and safely
deploy with their existing applications and databases. The book
begins with a discussion of Microsoft's Trustworthy Computing
Initiative and Vista's development cycle, which was like none other
in Microsoft's history. Expert authors will separate the hype from
the reality of Vista s preparedness to withstand the 24 x 7 attacks
it will face from malicious attackers as the world s #1 desktop
operating system. The book has a companion CD which contains
hundreds of working scripts and utilities to help administrators
secure their environments.
Each day, new applications and methods are developed for utilizing technology in the field of medical sciences, both as diagnostic tools and as methods for patients to access their medical information through their personal gadgets. However, the maximum potential for the application of new technologies within the medical field has not yet been realized. Mobile Devices and Smart Gadgets in Medical Sciences is a pivotal reference source that explores different mobile applications, tools, software, and smart gadgets and their applications within the field of healthcare. Covering a wide range of topics such as artificial intelligence, telemedicine, and oncology, this book is ideally designed for medical practitioners, mobile application developers, technology developers, software experts, computer engineers, programmers, ICT innovators, policymakers, researchers, academicians, and students.
This book provides a hands-on, application-oriented guide to the language and methodology of both SystemVerilog Assertions and Functional Coverage. Readers will benefit from the step-by-step approach to learning language and methodology nuances of both SystemVerilog Assertions and Functional Coverage, which will enable them to uncover hidden and hard to find bugs, point directly to the source of the bug, provide for a clean and easy way to model complex timing checks and objectively answer the question 'have we functionally verified everything'. Written by a professional end-user of ASIC/SoC/CPU and FPGA design and Verification, this book explains each concept with easy to understand examples, simulation logs and applications derived from real projects. Readers will be empowered to tackle the modeling of complex checkers for functional verification and exhaustive coverage models for functional coverage, thereby drastically reducing their time to design, debug and cover. This updated third edition addresses the latest functional set released in IEEE-1800 (2012) LRM, including numerous additional operators and features. Additionally, many of the Concurrent Assertions/Operators explanations are enhanced, with the addition of more examples and figures. * Covers in its entirety the latest IEEE-1800 2012 LRM syntax and semantics; * Covers both SystemVerilog Assertions and SystemVerilog Functional Coverage languages and methodologies; * Provides practical applications of the what, how and why of Assertion Based Verification and Functional Coverage methodologies; * Explains each concept in a step-by-step fashion and applies it to a practical real life example; * Includes 6 practical LABs that enable readers to put in practice the concepts explained in the book.
This book describes an approach for designing Systems-on-Chip such that the system meets precise mathematical requirements. The methodologies presented enable embedded systems designers to reuse intellectual property (IP) blocks from existing designs in an efficient, reliable manner, automatically generating correct SoCs from multiple, possibly mismatching, components.
With the massive increase of data and traffic on the Internet within the 5G, IoT and smart cities frameworks, current network classification and analysis techniques are falling short. Novel approaches using machine learning algorithms are needed to cope with and manage real-world network traffic, including supervised, semi-supervised, and unsupervised classification techniques. Accurate and effective classification of network traffic will lead to better quality of service and more secure and manageable networks. This authored book investigates network traffic classification solutions by proposing transport-layer methods to achieve better run and operated enterprise-scale networks. The authors explore novel methods for enhancing network statistics at the transport layer, helping to identify optimal feature selection through a global optimization approach and providing automatic labelling for raw traffic through a SemTra framework to maintain provable privacy on information disclosure properties.
Based on research and industry experience, this book structures the issues pertaining to grid computing security into three main categories: architecture-related, infrastructure-related, and management-related issues. It discusses all three categories in detail, presents existing solutions, standards, and products, and pinpoints their shortcomings and open questions. Together with a brief introduction into grid computing in general and underlying security technologies, this book offers the first concise and detailed introduction to this important area, targeting professionals in the grid industry as well as students.
The book presents the state-of-the-art in high performance computing and simulation on modern supercomputer architectures. It covers trends in high performance application software development in general and specifically for parallel vector architectures. The contributions cover among others the field of computational fluid dynamics, physics, chemistry, and meteorology. Innovative application fields like reactive flow simulations and nano technology are presented.
CD and DVD Forensics will take the reader through all facets of
handling, examining, and processing CD and DVD evidence for
computer forensics. At a time where data forensics is becoming a
major part of law enforcement and prosecution in the public sector,
and corporate and system security in the private sector, the
interest in this subject has just begun to blossom.
This book shares with readers practical design knowledge gained from the author's 24 years of IC design experience. The author addresses issues and challenges faced commonly by IC designers, along with solutions and workarounds. Guidelines are described for tackling issues such as clock domain crossing, using lockup latch to cross clock domains during scan shift, implementation of scan chains across power domain, optimization methods to improve timing, how standard cell libraries can aid in synthesis optimization, BKM (best known method) for RTL coding, test compression, memory BIST, usage of signed Verilog for design requiring +ve and -ve calculations, state machine, code coverage and much more. Numerous figures and examples are provided to aid the reader in understanding the issues and their workarounds.
The design of today's semiconductor chips for various applications,
such as telecommunications, poses various challenges due to the
complexity of these systems. These highly complex systems-on-chips
demand new approaches to connect and manage the communication
between on-chip processing and storage components and networks on
chips (NoCs) provide a powerful solution.
Customizable processors have been described as the next natural
step in the evolution of the microprocessor business: a step in the
life of a new technology where top performance alone is no longer
sufficient to guarantee market success. Other factors become
fundamental, such as time to market, convenience, energy
efficiency, and ease of customization.
As ubiquitous multimedia applications benefit from the rapid development of intelligent multimedia technologies, there is an inherent need to present frameworks, techniques and tools that adopt these technologies to a range of networking applications. Intelligent Multimedia Technologies for Networking Applications: Techniques and Tools promotes the discussion of specific solutions for improving the quality of multimedia experience while investigating issues arising from the deployment of techniques for adaptive video streaming. This reference source provides relevant theoretical frameworks and leading empirical research findings and is suitable for practitioners and researchers in the area of multimedia technology.
For the fourth time, the Leibniz Supercomputing Centre (LRZ) and the Com- tence Network for Technical, Scienti c High Performance Computing in Bavaria (KONWIHR) publishes the results from scienti c projects conducted on the c- puter systems HLRB I and II (High Performance Computer in Bavaria). This book reports the research carried out on the HLRB systems within the last three years and compiles the proceedings of the Third Joint HLRB and KONWIHR Result and Reviewing Workshop (3rd and 4th December 2007) in Garching. In 2000, HLRB I was the rst system in Europe that was capable of performing more than one Tera op/s or one billion oating point operations per second. In 2006 it was replaced by HLRB II. After a substantial upgrade it now achieves a peak performance of more than 62 Tera op/s. To install and operate this powerful system, LRZ had to move to its new facilities in Garching. However, the situation regarding the need for more computation cycles has not changed much since 2000. The demand for higher performance is still present, a trend that is likely to continue for the foreseeable future. Other resources like memory and disk space are currently in suf cient abundance on this new system.
The sexy, elegant design of the Apple PowerBook combined with the
Unix-like OS X operating system based on FreeBSD, have once again
made OS X the Apple of every hacker s eye. In this unique and
engaging book covering the brand new OS X 10.4 Tiger, the world s
foremost true hackers unleash the power of OS X for everything form
cutting edge research and development to just plain old fun.
Recently, the emergence of wireless and mobile networks has made possible the admission of electronic commerce to a new application and research subject: mobile commerce, defined as the exchange or buying and selling of commodities, services, or information on the Internet through the use of mobile handheld devices. In just a few years, mobile commerce has emerged from nowhere to become the hottest new trend in business transactions. However, the prosperity and popularity of mobile commerce will be brought to a higher level only if information is securely and safely exchanged among end systems (mobile users and content providers). Advances in Security and Payment Methods for Mobile Commerce includes high-quality research papers and industrial and practice articles in the areas of mobile commerce security and payment from academics and industrialists. It covers research and development results of lasting significance in the theory, design, implementation, analysis, and application of mobile commerce security and payment.
This fully revised and updated second edition of Understanding
Digital Libraries focuses on the challenges faced by both
librarians and computer scientists in a field that has been
dramatically altered by the growth of the Web.
Synthesis Techniques and Optimization for Reconfigurable Systems
discusses methods used to model reconfigurable applications at the
system level, many of which could be incorporated directly into
modern compilers. The book also discusses a framework for
reconfigurable system synthesis, which bridges the gap between
application-level compiler analysis and high-level device
synthesis. The development of this framework (discussed in Chapter
5), and the creation of application analysis which further optimize
its output (discussed in Chapters 7, 8, and 9), represent over four
years of rigorous investigation within UCLA's Embedded and
Reconfigurable Laboratory (ERLab) and UCSB's Extensible,
Programmable and Reconfigirable Embedded SystemS (ExPRESS) Group.
The research of these systems has not yet matured, and we
continually strive to develop data and methods, which will extend
the collective understanding of reconfigurable system synthesis.
Before slim laptops that fit into briefcases, computers looked like strange vending machines, with cryptic switches and pages of encoded output. But in 1977 Steve Wozniak revolutionized the computer industry with his invention of the first personal computer. As the sole inventor of the Apple I and II computers, Wozniak has enjoyed wealth, fame, and the most coveted awards an engineer can receive, and he tells his story here for the first time.
A number of widely used contemporary processors have instruction-set extensions for improved performance in multi-media applications. The aim is to allow operations to proceed on multiple pixels each clock cycle. Such instruction-sets have been incorporated both in specialist DSPchips such as the Texas C62xx (Texas Instruments, 1998) and in general purpose CPU chips like the Intel IA32 (Intel, 2000) or the AMD K6 (Advanced Micro Devices, 1999). These instruction-set extensions are typically based on the Single Instruc tion-stream Multiple Data-stream (SIMD) model in which a single instruction causes the same mathematical operation to be carried out on several operands, or pairs of operands, at the same time. The level or parallelism supported ranges from two floating point operations, at a time on the AMD K6 architecture to 16 byte operations at a time on the Intel P4 architecture. Whereas processor architectures are moving towards greater levels of parallelism, the most widely used programming languages such as C, Java and Delphi are structured around a model of computation in which operations takeplace on a single value at a time. This was appropriate when processors worked this way, but has become an impediment to programmers seeking to make use of the performance offered by multi-media instruction -sets. The introduction of SIMD instruction sets (Peleg et al."
This book provides a comprehensive treatment of security in the widely adopted, Radio Frequency Identification (RFID) technology. The authors present the fundamental principles of RFID cryptography in a manner accessible to a broad range of readers, enabling them to improve their RFID security design. This book also offers the reader a range of interesting topics portraying the current state-of-the-art in RFID technology and how it can be integrated with today's Internet of Things (IoT) vision. The authors describe a first-of-its-kind, lightweight symmetric authenticated encryption cipher called Redundant Bit Security (RBS), which enables significant, multi-faceted performance improvements compared to existing cryptosystems. This book is a must-read for anyone aiming to overcome the constraints of practical implementation in RFID security technologies. |
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