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Books > Computing & IT > Computer hardware & operating systems
This book provides a hands-on, application-oriented guide to the language and methodology of both SystemVerilog Assertions and Functional Coverage. Readers will benefit from the step-by-step approach to learning language and methodology nuances of both SystemVerilog Assertions and Functional Coverage, which will enable them to uncover hidden and hard to find bugs, point directly to the source of the bug, provide for a clean and easy way to model complex timing checks and objectively answer the question 'have we functionally verified everything'. Written by a professional end-user of ASIC/SoC/CPU and FPGA design and Verification, this book explains each concept with easy to understand examples, simulation logs and applications derived from real projects. Readers will be empowered to tackle the modeling of complex checkers for functional verification and exhaustive coverage models for functional coverage, thereby drastically reducing their time to design, debug and cover. This updated third edition addresses the latest functional set released in IEEE-1800 (2012) LRM, including numerous additional operators and features. Additionally, many of the Concurrent Assertions/Operators explanations are enhanced, with the addition of more examples and figures. * Covers in its entirety the latest IEEE-1800 2012 LRM syntax and semantics; * Covers both SystemVerilog Assertions and SystemVerilog Functional Coverage languages and methodologies; * Provides practical applications of the what, how and why of Assertion Based Verification and Functional Coverage methodologies; * Explains each concept in a step-by-step fashion and applies it to a practical real life example; * Includes 6 practical LABs that enable readers to put in practice the concepts explained in the book.
With the massive increase of data and traffic on the Internet within the 5G, IoT and smart cities frameworks, current network classification and analysis techniques are falling short. Novel approaches using machine learning algorithms are needed to cope with and manage real-world network traffic, including supervised, semi-supervised, and unsupervised classification techniques. Accurate and effective classification of network traffic will lead to better quality of service and more secure and manageable networks. This authored book investigates network traffic classification solutions by proposing transport-layer methods to achieve better run and operated enterprise-scale networks. The authors explore novel methods for enhancing network statistics at the transport layer, helping to identify optimal feature selection through a global optimization approach and providing automatic labelling for raw traffic through a SemTra framework to maintain provable privacy on information disclosure properties.
The book presents the state-of-the-art in high performance computing and simulation on modern supercomputer architectures. It covers trends in high performance application software development in general and specifically for parallel vector architectures. The contributions cover among others the field of computational fluid dynamics, physics, chemistry, and meteorology. Innovative application fields like reactive flow simulations and nano technology are presented.
This book presents a realistic and a holistic review of the microelectronic and semiconductor technology options in the post Moore's Law regime. Technical tradeoffs, from architecture down to manufacturing processes, associated with the 2.5D and 3D integration technologies, as well as the business and product management considerations encountered when faced by disruptive technology options, are presented. Coverage includes a discussion of Integrated Device Manufacturer (IDM) vs Fabless, vs Foundry, and Outsourced Assembly and Test (OSAT) barriers to implementation of disruptive technology options. This book is a must-read for any IC product team that is considering getting off the Moore's Law track, and leveraging some of the More-than-Moore technology options for their next microelectronic product.
This book is intended as a system engineer's compendium, explaining the dependencies and technical interactions between the onboard computer hardware, the onboard software and the spacecraft operations from ground. After a brief introduction on the subsequent development in all three fields over the spacecraft engineering phases each of the main topis is treated in depth in a separate part. The features of today's onboard computers are explained at hand of their historic evolution over the decades from the early days of spaceflight up to today. Latest system-on-chip processor architectures are treated as well as all onboard computer major components. After the onboard computer hardware the corresponding software is treated in a separate part. Both the software static architecture as well as the dynamic architecture are covered, and development technologies as well as software verification approaches are included. Following these two parts on the onboard architecture, the last part covers the concepts of spacecraft operations from ground. This includes the nominal operations concepts, the redundancy concept and the topic of failure detection, isolation and recovery. The baseline examples in the book are taken from the domain of satellites and deep space probes. The principles and many cited standards on spacecraft commanding, hardware and software however also apply to other space applications like launchers. The book is equally applicable for students as well for system engineers in space industry.
This book describes an approach for designing Systems-on-Chip such that the system meets precise mathematical requirements. The methodologies presented enable embedded systems designers to reuse intellectual property (IP) blocks from existing designs in an efficient, reliable manner, automatically generating correct SoCs from multiple, possibly mismatching, components.
Industrial machines, automobiles, airplanes, robots, and machines are among the myriad possible hosts of embedded systems. The author researches robotic vehicles and remote operated vehicles (ROVs), especially Underwater Robotic Vehicles (URVs), used for a wide range of applications such as exploring oceans, monitoring environments, and supporting operations in extreme environments. Embedded Mechatronics System Design for Uncertain Environments has been prepared for those who seek to easily develop and design embedded systems for control purposes in robotic vehicles. It reflects the multidisciplinarily of embedded systems from initial concepts (mechanical and electrical) to the modelling and simulation (mathematical relationships), creating graphical-user interface (software) and their actual implementations (mechatronics system testing). The author proposes new solutions for the prototyping, simulation, testing, and design of real-time systems using standard PC hardware including Linux (R), Raspbian (R), ARDUINO (R), and MATLAB (R) xPC Target.
As ubiquitous multimedia applications benefit from the rapid development of intelligent multimedia technologies, there is an inherent need to present frameworks, techniques and tools that adopt these technologies to a range of networking applications. Intelligent Multimedia Technologies for Networking Applications: Techniques and Tools promotes the discussion of specific solutions for improving the quality of multimedia experience while investigating issues arising from the deployment of techniques for adaptive video streaming. This reference source provides relevant theoretical frameworks and leading empirical research findings and is suitable for practitioners and researchers in the area of multimedia technology.
Before slim laptops that fit into briefcases, computers looked like strange vending machines, with cryptic switches and pages of encoded output. But in 1977 Steve Wozniak revolutionized the computer industry with his invention of the first personal computer. As the sole inventor of the Apple I and II computers, Wozniak has enjoyed wealth, fame, and the most coveted awards an engineer can receive, and he tells his story here for the first time.
For the fourth time, the Leibniz Supercomputing Centre (LRZ) and the Com- tence Network for Technical, Scienti c High Performance Computing in Bavaria (KONWIHR) publishes the results from scienti c projects conducted on the c- puter systems HLRB I and II (High Performance Computer in Bavaria). This book reports the research carried out on the HLRB systems within the last three years and compiles the proceedings of the Third Joint HLRB and KONWIHR Result and Reviewing Workshop (3rd and 4th December 2007) in Garching. In 2000, HLRB I was the rst system in Europe that was capable of performing more than one Tera op/s or one billion oating point operations per second. In 2006 it was replaced by HLRB II. After a substantial upgrade it now achieves a peak performance of more than 62 Tera op/s. To install and operate this powerful system, LRZ had to move to its new facilities in Garching. However, the situation regarding the need for more computation cycles has not changed much since 2000. The demand for higher performance is still present, a trend that is likely to continue for the foreseeable future. Other resources like memory and disk space are currently in suf cient abundance on this new system.
Recently, the emergence of wireless and mobile networks has made possible the admission of electronic commerce to a new application and research subject: mobile commerce, defined as the exchange or buying and selling of commodities, services, or information on the Internet through the use of mobile handheld devices. In just a few years, mobile commerce has emerged from nowhere to become the hottest new trend in business transactions. However, the prosperity and popularity of mobile commerce will be brought to a higher level only if information is securely and safely exchanged among end systems (mobile users and content providers). Advances in Security and Payment Methods for Mobile Commerce includes high-quality research papers and industrial and practice articles in the areas of mobile commerce security and payment from academics and industrialists. It covers research and development results of lasting significance in the theory, design, implementation, analysis, and application of mobile commerce security and payment.
Synthesis Techniques and Optimization for Reconfigurable Systems
discusses methods used to model reconfigurable applications at the
system level, many of which could be incorporated directly into
modern compilers. The book also discusses a framework for
reconfigurable system synthesis, which bridges the gap between
application-level compiler analysis and high-level device
synthesis. The development of this framework (discussed in Chapter
5), and the creation of application analysis which further optimize
its output (discussed in Chapters 7, 8, and 9), represent over four
years of rigorous investigation within UCLA's Embedded and
Reconfigurable Laboratory (ERLab) and UCSB's Extensible,
Programmable and Reconfigirable Embedded SystemS (ExPRESS) Group.
The research of these systems has not yet matured, and we
continually strive to develop data and methods, which will extend
the collective understanding of reconfigurable system synthesis.
This fully revised and updated second edition of Understanding
Digital Libraries focuses on the challenges faced by both
librarians and computer scientists in a field that has been
dramatically altered by the growth of the Web.
This book provides a comprehensive treatment of security in the widely adopted, Radio Frequency Identification (RFID) technology. The authors present the fundamental principles of RFID cryptography in a manner accessible to a broad range of readers, enabling them to improve their RFID security design. This book also offers the reader a range of interesting topics portraying the current state-of-the-art in RFID technology and how it can be integrated with today's Internet of Things (IoT) vision. The authors describe a first-of-its-kind, lightweight symmetric authenticated encryption cipher called Redundant Bit Security (RBS), which enables significant, multi-faceted performance improvements compared to existing cryptosystems. This book is a must-read for anyone aiming to overcome the constraints of practical implementation in RFID security technologies.
This book presents a comprehensive introduction to Internetware, covering aspects ranging from the fundamental principles and engineering methodologies to operational platforms, quality measurements and assurance and future directions. It also includes guidelines and numerous representative real-world case studies that serve as an invaluable reference resource for software engineers involved in the development of Internetware applications. Providing a detailed analysis of current trends in modern software engineering in the Internet, it offers an essential blueprint and an important contribution to the research on software engineering and systems for future Internet computing.
This book presents the methodologies and for embedded systems design, using field programmable gate array (FPGA) devices, for the most modern applications. Coverage includes state-of-the-art research from academia and industry on a wide range of topics, including applications, advanced electronic design automation (EDA), novel system architectures, embedded processors, arithmetic, and dynamic reconfiguration.
"This book is a comprehensive text for the design of safety
critical, hard real-time embedded systems. It offers a splendid
example for the balanced, integrated treatment of systems and
software engineering, helping readers tackle the hardest problems
of advanced real-time system design, such as determinism,
compositionality, timing and fault management. This book is an
essential reading for advanced undergraduates and graduate students
in a wide range of disciplines impacted by embedded computing and
software. Its conceptual clarity, the style of explanations and the
examples make the abstract conceptsaccessible for a wide
audience." "Real-Time Systems" focuses on hard real-time systems, which are computing systems that must meet their temporal specification in all anticipated load and fault scenarios. The book stresses the system aspects of distributed real-time applications, treating the issues of real-time, distribution and fault-tolerance from an integral point of view. A unique cross-fertilization of ideas and concepts between the academic and industrial worlds has led to the inclusion of many insightful examples from industry to explain the fundamental scientific concepts in a real-world setting. Compared to the first edition, new developments incomplexity management, energy and power management, dependability, security, andthe internet of things, are addressed. The book is written as a standard textbook for a high-level undergraduate or graduate course on real-time embedded systems or cyber-physical systems. Its practical approach to solving real-time problems, along with numerous summary exercises, makes it an excellent choice for researchers and practitioners alike."
A number of widely used contemporary processors have instruction-set extensions for improved performance in multi-media applications. The aim is to allow operations to proceed on multiple pixels each clock cycle. Such instruction-sets have been incorporated both in specialist DSPchips such as the Texas C62xx (Texas Instruments, 1998) and in general purpose CPU chips like the Intel IA32 (Intel, 2000) or the AMD K6 (Advanced Micro Devices, 1999). These instruction-set extensions are typically based on the Single Instruc tion-stream Multiple Data-stream (SIMD) model in which a single instruction causes the same mathematical operation to be carried out on several operands, or pairs of operands, at the same time. The level or parallelism supported ranges from two floating point operations, at a time on the AMD K6 architecture to 16 byte operations at a time on the Intel P4 architecture. Whereas processor architectures are moving towards greater levels of parallelism, the most widely used programming languages such as C, Java and Delphi are structured around a model of computation in which operations takeplace on a single value at a time. This was appropriate when processors worked this way, but has become an impediment to programmers seeking to make use of the performance offered by multi-media instruction -sets. The introduction of SIMD instruction sets (Peleg et al."
More than ever before, energy is becoming one of the most crucial concerns in economical and industrial development. ""Intelligent Information Systems and Knowledge Management for Energy: Applications for Decision Support, Usage, and Environmental Protection"" provides in-depth analysis of the need for a holistic approach for the construction and engineering of cities and societies. This defining body of research examines key issues and approaches for energy use and provides future direction of development as well.
This book provides an introduction to the emerging area of "Brain-Machine Interfaces," with emphasis on the operation and practical design aspects. The book will help both electrical & bioengineers as well as neuroscience investigators to learn about the next generation brain-machine interfaces. The comprehensive review and design analysis will be very helpful for researchers who are new to this area or interested in the study of the brain. The in-depth discussion of practical design issues especially in animal experiments will also be valuable for experienced researchers.
Location-based services (LBS) are a new concept integrating a user
s geographic location with the general notion of services, such as
dialing an emergency number from a cell phone or using a navigation
system in a car. Incorporating both mobile communication and
spatial data, these applications represent a novel challenge both
conceptually and technically.
This book shows readers how to develop energy-efficient algorithms and hardware architectures to enable high-definition 3D video coding on resource-constrained embedded devices. Users of the Multiview Video Coding (MVC) standard face the challenge of exploiting its 3D video-specific coding tools for increasing compression efficiency at the cost of increasing computational complexity and, consequently, the energy consumption. This book enables readers to reduce the multiview video coding energy consumption through jointly considering the algorithmic and architectural levels. Coverage includes an introduction to 3D videos and an extensive discussion of the current state-of-the-art of 3D video coding, as well as energy-efficient algorithms for 3D video coding and energy-efficient hardware architecture for 3D video coding.
This book presents exact, that is minimal, solutions to individual steps in the design process for Digital Microfluidic Biochips (DMFBs), as well as a one-pass approach that combines all these steps in a single process. All of the approaches discussed are based on a formal model that can easily be extended to cope with further design problems. In addition to the exact methods, heuristic approaches are provided and the complexity classes of various design problems are determined. Presents exact methods to tackle a variety of design problems for Digital Microfluidic Biochips (DMFBs); Describes an holistic, one-pass approach solving different design steps all at once; Based on a formal model of DMFBs that is easily adaptable to deal with further design tasks. |
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