The Heinz Nixdorf Museum Forum (HNF) is the world's largest c- puter museum and is dedicated to portraying the past, present and future of information technology. In the "Year of Informatics 2006" the HNF was particularly keen to examine the history of this still quite young discipline. The short-lived nature of information technologies means that individuals, inventions, devices, institutes and companies"age" more rapidly than in many other specialties. And in the nature of things the group of computer pioneers from the early days is growing smaller all the time. To supplement a planned new exhibit on "Software and Inform- ics" at the HNF, the idea arose of recording the history of informatics in an accompanying publication. Mysearchforsuitablesourcesandauthorsveryquickly cameupwith the right answer, the very rst name in Germany: Friedrich L. Bauer, Professor Emeritus of Mathematics at the TU in Munich, one of the - thers of informatics in Germany and for decades the indefatigable author of the"Historical Notes" column of the journal Informatik Spektrum. Friedrich L. Bauer was already the author of two works on the history of informatics, published in different decades and in different books. Both of them are notable for their knowledgeable, extremely comp- hensive and yet compact style. My obvious course was to motivate this author to amalgamate, supplement and illustrate his previous work.

Given the widespread use of real-time multitasking systems, there are tremendous optimization opportunities if reconfigurable computing can be effectively incorporated while maintaining performance and other design constraints of typical applications. The focus of this book is to describe the dynamic reconfiguration techniques that can be safely used in real-time systems. This book provides comprehensive approaches by considering synergistic effects of computation, communication as well as storage together to significantly improve overall performance, power, energy and temperature."

This innovative and in-depth book integrates the well-developed theory and practical applications of one dimensional and multidimensional multirate signal processing. Using a rigorous mathematical framework, it carefully examines the fundamentals of this rapidly growing field. Areas covered include: basic building blocks of multirate signal processing; fundamentals of multidimensional multirate signal processing; multirate filter banks; lossless lattice structures; introduction to wavelet signal processing.
Multirate and Wavelet Signal Processing forms the basis for a graduate course in multirate signal processing. It includes an introduction to wavelet signal processing and emphasizes topics of ever-increasing importance for a wide range of applications. Concise and easy-to-read, this book is also a useful primer for professional engineers.
Key Features
* Integrates the well-developed theory and practical applications of one-dimensional and multidimensional multirate signal processing
* Emphasizes topics of ever-increasing importance for a wide range of applications
* Written in a concise, easy-to-read style
* Uses relevant examples
* General mathematical formulation permits extensions of concepts to diverse applications, such as speech, imaging, video, and synthetic aperture radar
* Emphasizes key topics of the field, allowing the reader to make the most efficient use of time in learning the fundamentals of multirate
* Designed to be completely covered in a single semester or quarter

Wafer-scale integration has long been the dream of system designers. Instead of chopping a wafer into a few hundred or a few thousand chips, one would just connect the circuits on the entire wafer. What an enormous capability wafer-scale integration would offer: all those millions of circuits connected by high-speed on-chip wires. Unfortunately, the best known optical systems can provide suitably ?ne resolution only over an area much smaller than a whole wafer. There is no known way to pattern a whole wafer with transistors and wires small enough for modern circuits. Statistical defects present a ?rmer barrier to wafer-scale integration. Flaws appear regularly in integrated circuits; the larger the circuit area, the more probable there is a ?aw. If such ?aws were the result only of dust one might reduce their numbers, but ?aws are also the inevitable result of small scale. Each feature on a modern integrated circuit is carved out by only a small number of photons in the lithographic process. Each transistor gets its electrical properties from only a small number of impurity atoms in its tiny area. Inevitably, the quantized nature of light and the atomic nature of matter produce statistical variations in both the number of photons de?ning each tiny shape and the number of atoms providing the electrical behavior of tiny transistors. No known way exists to eliminate such statistical variation, nor may any be possible.

Making the most ef?cient use of computer systems has rapidly become a leading topic of interest for the computer industry and its customers alike. However, the focus of these discussions is often on single, isolated, and speci?c architectural and technological improvements for power reduction and conservation, while ignoring the fact that power ef?ciency as a ratio of performance to power consumption is equally in?uenced by performance improvements and architectural power red- tion. Furthermore, ef?ciency can be in?uenced on all levels of today's system hi- archies from single cores all the way to distributed Grid environments. To improve execution and power ef?ciency requires progress in such diverse ?elds as program optimization, optimization of program scheduling, and power reduction of idling system components for all levels of the system hierarchy. Improving computer system ef?ciency requires improving system performance and reducing system power consumption. To research and reach reasonable conc- sions about system performance we need to not only understand the architectures of our computer systems and the available array of code transformations for p- formance optimizations, but we also need to be able to express this understanding in performance models good enough to guide decisions about code optimizations for speci?c systems. This understanding is necessary on all levels of the system hierarchy from single cores to nodes to full high performance computing (HPC) systems, and eventually to Grid environments with multiple systems and resources.

This book addresses the topic of exploiting enterprise-linked data with a particular focus on knowledge construction and accessibility within enterprises. It identifies the gaps between the requirements of enterprise knowledge consumption and "standard" data consuming technologies by analysing real-world use cases, and proposes the enterprise knowledge graph to fill such gaps. It provides concrete guidelines for effectively deploying linked-data graphs within and across business organizations. It is divided into three parts, focusing on the key technologies for constructing, understanding and employing knowledge graphs. Part 1 introduces basic background information and technologies, and presents a simple architecture to elucidate the main phases and tasks required during the lifecycle of knowledge graphs. Part 2 focuses on technical aspects; it starts with state-of-the art knowledge-graph construction approaches, and then discusses exploration and exploitation techniques as well as advanced question-answering topics concerning knowledge graphs. Lastly, Part 3 demonstrates examples of successful knowledge graph applications in the media industry, healthcare and cultural heritage, and offers conclusions and future visions.

Each day, new applications and methods are developed for utilizing technology in the field of medical sciences, both as diagnostic tools and as methods for patients to access their medical information through their personal gadgets. However, the maximum potential for the application of new technologies within the medical field has not yet been realized. Mobile Devices and Smart Gadgets in Medical Sciences is a pivotal reference source that explores different mobile applications, tools, software, and smart gadgets and their applications within the field of healthcare. Covering a wide range of topics such as artificial intelligence, telemedicine, and oncology, this book is ideally designed for medical practitioners, mobile application developers, technology developers, software experts, computer engineers, programmers, ICT innovators, policymakers, researchers, academicians, and students.

Today s semiconductor memory market is divided between two types of memory: DRAM and Flash. Each has its own advantages and disadvantages. While DRAM is fast but volatile, Flash is non-volatile but slow. A memory system based on self-organized quantum dots (QDs) as storage node could combine the advantages of modern DRAM and Flash, thus merging the latter s non-volatility with very fast write times.

This thesis investigates the electronic properties of and carrier dynamics in self-organized quantum dots by means of time-resolved capacitance spectroscopy and time-resolved current measurements. The first aim is to study the localization energy of various QD systems in order to assess the potential of increasing the storage time in QDs to non-volatility. Surprisingly, it is found that the major impact of carrier capture cross-sections of QDs is to influence, and at times counterbalance, carrier storage in addition to the localization energy. The second aim is to study the coupling between a layer of self-organized QDs and a two-dimensional hole gas (2DHG), which is relevant for the read-out process in memory systems. The investigation yields the discovery of the many-particle ground states in the QD ensemble.In addition to its technological relevance, the thesis also offers new insights into the fascinating field of nanostructure physics."

Cryptographic applications, such as RSA algorithm, ElGamal cryptography, elliptic curve cryptography, Rabin cryptosystem, Diffie -Hellmann key exchange algorithm, and the Digital Signature Standard, use modular exponentiation extensively. The performance of all these applications strongly depends on the efficient implementation of modular exponentiation and modular multiplication. Since 1984, when Montgomery first introduced a method to evaluate modular multiplications, many algorithmic modifications have been done for improving the efficiency of modular multiplication, but very less work has been done on the modular exponentiation to improve the efficiency. This research monograph addresses the question- how can the performance of modular exponentiation, which is the crucial operation of many public-key cryptographic techniques, be improved? The book focuses on Energy Efficient Modular Exponentiations for Cryptographic hardware. Spread across five chapters, this well-researched text focuses in detail on the Bit Forwarding Techniques and the corresponding hardware realizations. Readers will also discover advanced performance improvement techniques based on high radix multiplication and Cryptographic hardware based on multi-core architectures.

This book provides a comprehensive overview of key technologies being used to address challenges raised by continued device scaling and the extending gap between memory and central processing unit performance. Authors discuss in detail what are known commonly as "More than Moore" (MtM), technologies, which add value to devices by incorporating functionalities that do not necessarily scale according to "Moore's Law". Coverage focuses on three key technologies needed for efficient power management and cost per performance: novel memories, 3D integration and photonic on-chip interconnect.

Volume 54 presents six chapters on the changing face of software engineering-the process by which we build reliable software systems. We are constantly building faster and less expensive processors, which allow us to use different processes to try and conquer the "bug" problem facing all developments-how to build reliable systems with few errors at low or at least manageable cost. The first three chapters of this volume emphasize components and the impact that object-oriented design is having on the program development process (a current "hot topic"). The final three chapters present additional aspects of the software development process, including maintenance, purchasing strategies, and secure outsourcing of scientific computations.

This book serves as a practical guide for practicing engineers who need to design embedded systems for high-speed data acquisition and control systems. A minimum amount of theory is presented, along with a review of analog and digital electronics, followed by detailed explanations of essential topics in hardware design and software development. The discussion of hardware focuses on microcontroller design (ARM microcontrollers and FPGAs), techniques of embedded design, high speed data acquisition (DAQ) and control systems. Coverage of software development includes main programming techniques, culminating in the study of real-time operating systems. All concepts are introduced in a manner to be highly-accessible to practicing engineers and lead to the practical implementation of an embedded board that can be used in various industrial fields as a control system and high speed data acquisition system.

This book provides the foundations for understanding hardware security and trust, which have become major concerns for national security over the past decade. Coverage includes security and trust issues in all types of electronic devices and systems such as ASICs, COTS, FPGAs, microprocessors/DSPs, and embedded systems. This serves as an invaluable reference to the state-of-the-art research that is of critical significance to the security of, and trust in, modern society's microelectronic-supported infrastructures.

Prepare for Microsoft Exam AZ-204-and help demonstrate your real-world mastery of Microsoft Azure solution development. Designed for working Azure developers, this Exam Ref focuses on the critical thinking and decision-making acumen needed for success at the Microsoft Certified Solutions Associate level. Focus on the expertise measured by these objectives: * Develop Azure compute solutions * Develop for Azure storage * Implement Azure security * Monitor, troubleshoot, and optimize Azure solutions * Connect to and consume Azure services and third-party services This Microsoft Exam Ref: * Organizes its coverage by exam objectives * Features strategic, what-if scenarios to challenge you * Assumes you want to show your ability to design and build diverse Microsoft Azure cloud solutions, and successfully participate in all phases of their development About the Exam Exam AZ-204 focuses on knowledge needed to implement IaaS solutions; create Azure App Service Web Apps; implement Azure Functions; develop solutions using Cosmos DB and Blob Storage; implement user authentication, authorization, and secure cloud solutions; integrate caching and content delivery within solutions; instrument solutions to support monitoring and logging; develop an App Service Logic App; implement API Management; develop event- and message-based solutions. About Microsoft Certification Passing this exam fulfills your requirements for the Microsoft Certified: Azure Developer Associate credential, demonstrating your readiness to design, build, test, and maintain Microsoft Azure cloud solutions, and partner with other cloud professionals and clients to implement them. This exam is also a prerequisite for the Microsoft Certified: Azure DevOps Engineer Expert credential. See full details at: microsoft.com/learn

This book is the fifth volume of the CoreGRID series. Organized jointly with the Euro-Par 2007 conference, The CoreGRID Symposium intends to become the premiere European event on Grid Computing. The aim of this symposium is to strengthen and advance scientific and technological excellence in the area of Grid and Peer-to-Peer Computing. The book includes all aspects of Grid Computing including service infrastructure. It is designed for a professional audience composed of researchers and practitioners in industry. This volume is also suitable for advanced-level students in computer science.

Modern multimedia systems are becoming increasingly multiprocessor and heterogeneous to match the high performance and low power demands placed on them by the large number of applications. The concurrent execution of these applications causes interference and unpredictability in the performance of these systems. In Multimedia Multiprocessor Systems, an analysis mechanism is presented to accurately predict the performance of multiple applications executing concurrently. With high consumer demand the time-to-market has become significantly lower. To cope with the complexity in designing such systems, an automated design-flow is needed that can generate systems from a high-level architectural description such that they are not error-prone and consume less time. Such a design methodology is presented for multiple use-cases -- combinations of active applications. A resource manager is also presented to manage the various resources in the system, and to achieve the goals of performance prediction, admission control and budget enforcement.

Dynamically Reconfigurable Systems is the first ever to focus on the emerging field of Dynamically Reconfigurable Computing Systems. While programmable logic and design-time configurability are well elaborated and covered by various texts, this book presents a unique overview over the state of the art and recent results for dynamic and run-time reconfigurable computing systems.

Reconfigurable hardware is not only of utmost importance for large manufacturers and vendors of microelectronic devices and systems, but also a very attractive technology for smaller and medium-sized companies. Hence, Dynamically Reconfigurable Systems also addresses researchers and engineers actively working in the field and provides them with information on the newest developments and trends in dynamic and run-time reconfigurable systems.

This book provides an overview of automatic test pattern generation (ATPG) and introduces novel techniques to complement classical ATPG, based on Boolean Satisfiability (SAT). A fast and highly fault efficient SAT-based ATPG framework is presented which is also able to generate high-quality delay tests such as robust path delay tests, as well as tests with long propagation paths to detect small delay defects.

The aim of the techniques and methodologies presented in this book is to improve SAT-based ATPG, in order to make it applicable in industrial practice. Readers will learn to improve the performance and robustness of the overall test generation process, so that the ATPG algorithm reliably will generate test patterns for most targeted faults in acceptable run time to meet the high fault coverage demands of industry. The techniques and improvements presented in this book provide the following advantages:

Provides a comprehensive introduction to test generation and Boolean Satisfiability (SAT);Describes a highly fault efficient SAT-based ATPG framework; Introduces circuit-oriented SAT solving techniques, which make use of structural information and are able to accelerate the search process significantly;Provides SAT formulations for the prevalent delay faults models, in addition to the classical stuck-at fault model;Includes an industrial perspective on the state-of-the-art in the testing, along with SAT; two topics typically distinguished from each other.

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Fundamental Problems in Computing is in honor of Professor Daniel J. Rosenkrantz, a distinguished researcher in Computer Science. Professor Rosenkrantz has made seminal contributions to many subareas of Computer Science including formal languages and compilers, automata theory, algorithms, database systems, very large scale integrated systems, fault-tolerant computing and discrete dynamical systems. For many years, Professor Rosenkrantz served as the Editor-in-Chief of the Journal of the Association for Computing Machinery (JACM), a very prestigious archival journal in Computer Science. His contributions to Computer Science have earned him many awards including the Fellowship from ACM and the ACM SIGMOD Contributions Award.

The increased computational power and software tools available to engineers have increased the use and dependence on modeling and computer simulation throughout the design process. These tools have given engineers the capability of designing highly complex systems and computer architectures that were previously unthinkable. Every complex design project, from integrated circuits, to aerospace vehicles, to industrial manufacturing processes requires these new methods. This book fulfills the essential need of system and control engineers at all levels in understanding modeling and simulation. This book, written as a true text/reference has become a standard sr./graduate level course in all EE departments worldwide and all professionals in this area are required to update their skills.
The book provides a rigorous mathematical foundation for modeling and computer simulation. It provides a comprehensive framework for modeling and simulation integrating the various simulation approaches. It covers model formulation, simulation model execution, and the model building process with its key activities model abstraction and model simplification, as well as the organization of model libraries. Emphasis of the book is in particular in integrating discrete event and continuous modeling approaches as well as a new approach for discrete event simulation of continuous processes. The book also discusses simulation execution on parallel and distributed machines and concepts for simulation model realization based on the High Level Architecture (HLA) standard of the Department of Defense.

* Presents a working foundation necessary for compliance with High Level Architecture (HLA) standards
* Provides a comprehensive framework for continuous and discrete event modeling and simulation
* Explores the mathematical foundation of simulation modeling
* Discusses system morphisms for model abstraction and simplification
* Presents a new approach to discrete event simulation of continuous processes
* Includes parallel and distributed simulation of discrete event models
* Presentation of a concept to achieve simulator interoperability in the form of the DEVS-Bus

This book defines and explores the problem of placing the instances of dynamic data types on the components of the heterogeneous memory organization of an embedded system, with the final goal of reducing energy consumption and improving performance. It is one of the first to cover the problem of placement for dynamic data objects on embedded systems with heterogeneous memory architectures, presenting a complete methodology that can be easily adapted to real cases and work flows. The authors discuss how to improve system performance and energy consumption simultaneously. Discusses the problem of placement for dynamic data objects on embedded systems with heterogeneous memory architectures; Presents a complete methodology that can be adapted easily to real cases and work flows; Offers hints on how to improve system performance and energy consumption simultaneously.

Does IT spending really boost bank performance? It is widely accepted that technological developments have had a major impact on reshaping both front- and back-office operations, but there still remains some doubt as to whether the massive spending on IT by banks has improved performance or productivity in this sector. Elena Beccalli provides a useful insight into the effects of IT investments on European bank performance, drawing on new empirical evidence that academics, bankers, and IT consultants alike will find to be a fascinating contribution to this ongoing strategic debate.

SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware Description Language (Verilog HDL). These extensions address two major aspects of HDL-based design. First, modeling very large designs with concise, accurate, and intuitive code. Second, writing high-level test programs to efficiently and effectively verify these large designs. The first edition of this book addressed the first aspect of the SystemVerilog extensions to Verilog. Important modeling features were presented, such as two-state data types, enumerated types, user-degined types, structures, unions, and interfaces. Emphasis was placed on the proper usage of these enhancements for simulation and synthesis.

Longitudinal studies have traditionally been seen as too cumbersome and labor-intensive to be of much use in research on Human-Computer Interaction (HCI). However, recent trends in market, legislation, and the research questions we address, have highlighted the importance of studying prolonged use, while technology itself has made longitudinal research more accessible to researchers across different application domains. Aimed as an educational resource for graduate students and researchers in HCI, this book brings together a collection of chapters, addressing theoretical and methodological considerations, and presenting case studies of longitudinal HCI research. Among others, the authors: discuss the theoretical underpinnings of longitudinal HCI research, such as when a longitudinal study is appropriate, what research questions can be addressed and what challenges are entailed in different longitudinal research designs reflect on methodological challenges in longitudinal data collection and analysis, such as how to maintain participant adherence and data reliability when employing the Experience Sampling Method in longitudinal settings, or how to cope with data collection fatigue and data safety in applications of autoethnography and autobiographical design, which may span from months to several years present a number of case studies covering different topics of longitudinal HCI research, from "slow technology", to self-tracking, to mid-air haptic feedback, and crowdsourcing.