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Books > Computing & IT > Computer hardware & operating systems
This book provides a comprehensive description of the architetural
techniques to tackle the soft error problem. It covers the new
methodologies for quantitative analysis of soft errors as well as
novel, cost-effective architectural techniques to mitigate them. To
provide readers with a better grasp of the broader problem
deffinition and solution space, this book also delves into the
physics of soft errors and reviews current circuit and software
mitigation techniques.
This volume gives the latest developments in on the mechanisms of cancer cell resistance to apoptotic stimuli, which eventually result in cancer progression and metastasis. One of the main challenges in cancer research is to develop new therapies to combat resistant tumors. The development of new effective therapies will be dependent on delineating the biochemical, molecular, and genetic mechanisms that regulate tumor cell resistance to cytotoxic drug-induced apoptosis. These mechanisms should reveal gene products that directly regulate resistance in order to develop new drugs that target these resistance factors and such new drugs may either be selective or common to various cancers. If successful, new drugs may not be toxic and may be used effectively in combination with subtoxic conventional drugs to achieve synergy and to reverse tumor cell resistance. The research developments presented in this book can be translated to produce better clinical responses to resistant tumors.
Efficient design of embedded processors plays a critical role in
embedded systems design. Processor description languages and their
associated specification, exploration and rapid prototyping
methodologies are used to find the best possible design for a given
set of applications under various design constraints, such as area,
power and performance.
This book provides an invaluable primer on the techniques utilized in the design of low power digital semiconductor devices. Readers will benefit from the hands-on approach which starts form the ground-up, explaining with basic examples what power is, how it is measured and how it impacts on the design process of application-specific integrated circuits (ASICs). The authors use both the Unified Power Format (UPF) and Common Power Format (CPF) to describe in detail the power intent for an ASIC and then guide readers through a variety of architectural and implementation techniques that will help meet the power intent. From analyzing system power consumption, to techniques that can be employed in a low power design, to a detailed description of two alternate standards for capturing the power directives at various phases of the design, this book is filled with information that will give ASIC designers a competitive edge in low-power design.
Interactive products designed for children-whether toys, games,
educational products, or websites-are increasingly embedded in
children's lives and school experiences. Making these products
safe, effective, and entertaining requires new methodologies for
carrying out sound and unbiased evaluations for these users with
unique requirements, environments, and ethical considerations.
The main characteristic of Reconfigurable Computing is the presence
of hardware that can be reconfigured to implement specific
functionality more suitable for specially tailored hardware than on
a simple uniprocessor. Reconfigurable computing systems join
microprocessors and programmable hardware in order to take
advantage of the combined strengths of hardware and software and
have been used in applications ranging from embedded systems to
high performance computing. Many of the fundamental theories have
been identified and used by the Hardware/Software Co-Design
research field. Although the same background ideas are shared in
both areas, they have different goals and use different
approaches.This book is intended as an introduction to the entire
range of issues important to reconfigurable computing, using FPGAs
as the context, or "computing vehicles" to implement this powerful
technology. It will take a reader with a background in the basics
of digital design and software programming and provide them with
the knowledge needed to be an effective designer or researcher in
this rapidly evolving field.
This book provides an overview of automatic test pattern generation (ATPG) and introduces novel techniques to complement classical ATPG, based on Boolean Satisfiability (SAT). A fast and highly fault efficient SAT-based ATPG framework is presented which is also able to generate high-quality delay tests such as robust path delay tests, as well as tests with long propagation paths to detect small delay defects. The aim of the techniques and methodologies presented in this book is to improve SAT-based ATPG, in order to make it applicable in industrial practice. Readers will learn to improve the performance and robustness of the overall test generation process, so that the ATPG algorithm reliably will generate test patterns for most targeted faults in acceptable run time to meet the high fault coverage demands of industry. The techniques and improvements presented in this book provide the following advantages: Provides a comprehensive introduction to test generation and Boolean Satisfiability (SAT);Describes a highly fault efficient SAT-based ATPG framework; Introduces circuit-oriented SAT solving techniques, which make use of structural information and are able to accelerate the search process significantly;Provides SAT formulations for the prevalent delay faults models, in addition to the classical stuck-at fault model;Includes an industrial perspective on the state-of-the-art in the testing, along with SAT; two topics typically distinguished from each other. "
This book describes the emerging field of self-organizing, multicore, distributed and real-time embedded systems. Self organization of both hardware and software can be a key technique to handle the growing complexity of modern computing systems. Distributed systems running hundreds of tasks on dozens of processors, each equipped with multiple cores, requires self organization principles to ensure efficient and reliable operation. This book addresses various, so-called Self X features such as self-configuration, self optimization, self adaptation, self healing and self protection."
Exchange, SQL and IIS are at the core of most Microsoft enterprise
servers. The 2007 releases of these products, along with the
release of Windows Vista and Windows 2008 Server, represents the
biggest overhaul of Windows enterprise products since Windows 2000.
The dramatic changes to security tools and the addition of features
that support "anywhere access" present IT professionals with a
steep learning curve. Making certain that these products are
configured to meet regulatory compliance requirements adds
addtionaly complexity to day-to-day management network management.
This book presents a realistic and a holistic review of the microelectronic and semiconductor technology options in the post Moore's Law regime. Technical tradeoffs, from architecture down to manufacturing processes, associated with the 2.5D and 3D integration technologies, as well as the business and product management considerations encountered when faced by disruptive technology options, are presented. Coverage includes a discussion of Integrated Device Manufacturer (IDM) vs Fabless, vs Foundry, and Outsourced Assembly and Test (OSAT) barriers to implementation of disruptive technology options. This book is a must-read for any IC product team that is considering getting off the Moore's Law track, and leveraging some of the More-than-Moore technology options for their next microelectronic product.
WE ARE ADRIFT IN A SEA OF INFORMATION. We need information to make
good decisions, to get things done, to learn, and to gain better
mastery of the world around us. But we do not always have good
control of our information - not even in the "home waters" of an
office or on the hard drive of a computer. Instead, information may
be controlling us - keeping us from doing the things we need to do,
getting us to waste money and precious time. The growth of
available information, plus the technologies for its creation,
storage, retrieval, distribution and use, is astonishing and
sometimes bewildering. Can there be a similar growth in our
understanding for how best to manage information and informational
tools?
This book is designed for the professional system administrators
who need to securely deploy Microsoft Vista in their networks.
Readers will not only learn about the new security features of
Vista, but they will learn how to safely integrate Vista with their
existing wired and wireless network infrastructure and safely
deploy with their existing applications and databases. The book
begins with a discussion of Microsoft's Trustworthy Computing
Initiative and Vista's development cycle, which was like none other
in Microsoft's history. Expert authors will separate the hype from
the reality of Vista s preparedness to withstand the 24 x 7 attacks
it will face from malicious attackers as the world s #1 desktop
operating system. The book has a companion CD which contains
hundreds of working scripts and utilities to help administrators
secure their environments.
Each day, new applications and methods are developed for utilizing technology in the field of medical sciences, both as diagnostic tools and as methods for patients to access their medical information through their personal gadgets. However, the maximum potential for the application of new technologies within the medical field has not yet been realized. Mobile Devices and Smart Gadgets in Medical Sciences is a pivotal reference source that explores different mobile applications, tools, software, and smart gadgets and their applications within the field of healthcare. Covering a wide range of topics such as artificial intelligence, telemedicine, and oncology, this book is ideally designed for medical practitioners, mobile application developers, technology developers, software experts, computer engineers, programmers, ICT innovators, policymakers, researchers, academicians, and students.
This book provides a hands-on, application-oriented guide to the language and methodology of both SystemVerilog Assertions and Functional Coverage. Readers will benefit from the step-by-step approach to learning language and methodology nuances of both SystemVerilog Assertions and Functional Coverage, which will enable them to uncover hidden and hard to find bugs, point directly to the source of the bug, provide for a clean and easy way to model complex timing checks and objectively answer the question 'have we functionally verified everything'. Written by a professional end-user of ASIC/SoC/CPU and FPGA design and Verification, this book explains each concept with easy to understand examples, simulation logs and applications derived from real projects. Readers will be empowered to tackle the modeling of complex checkers for functional verification and exhaustive coverage models for functional coverage, thereby drastically reducing their time to design, debug and cover. This updated third edition addresses the latest functional set released in IEEE-1800 (2012) LRM, including numerous additional operators and features. Additionally, many of the Concurrent Assertions/Operators explanations are enhanced, with the addition of more examples and figures. * Covers in its entirety the latest IEEE-1800 2012 LRM syntax and semantics; * Covers both SystemVerilog Assertions and SystemVerilog Functional Coverage languages and methodologies; * Provides practical applications of the what, how and why of Assertion Based Verification and Functional Coverage methodologies; * Explains each concept in a step-by-step fashion and applies it to a practical real life example; * Includes 6 practical LABs that enable readers to put in practice the concepts explained in the book.
This book describes an approach for designing Systems-on-Chip such that the system meets precise mathematical requirements. The methodologies presented enable embedded systems designers to reuse intellectual property (IP) blocks from existing designs in an efficient, reliable manner, automatically generating correct SoCs from multiple, possibly mismatching, components.
With the massive increase of data and traffic on the Internet within the 5G, IoT and smart cities frameworks, current network classification and analysis techniques are falling short. Novel approaches using machine learning algorithms are needed to cope with and manage real-world network traffic, including supervised, semi-supervised, and unsupervised classification techniques. Accurate and effective classification of network traffic will lead to better quality of service and more secure and manageable networks. This authored book investigates network traffic classification solutions by proposing transport-layer methods to achieve better run and operated enterprise-scale networks. The authors explore novel methods for enhancing network statistics at the transport layer, helping to identify optimal feature selection through a global optimization approach and providing automatic labelling for raw traffic through a SemTra framework to maintain provable privacy on information disclosure properties.
Based on research and industry experience, this book structures the issues pertaining to grid computing security into three main categories: architecture-related, infrastructure-related, and management-related issues. It discusses all three categories in detail, presents existing solutions, standards, and products, and pinpoints their shortcomings and open questions. Together with a brief introduction into grid computing in general and underlying security technologies, this book offers the first concise and detailed introduction to this important area, targeting professionals in the grid industry as well as students.
The book presents the state-of-the-art in high performance computing and simulation on modern supercomputer architectures. It covers trends in high performance application software development in general and specifically for parallel vector architectures. The contributions cover among others the field of computational fluid dynamics, physics, chemistry, and meteorology. Innovative application fields like reactive flow simulations and nano technology are presented.
CD and DVD Forensics will take the reader through all facets of
handling, examining, and processing CD and DVD evidence for
computer forensics. At a time where data forensics is becoming a
major part of law enforcement and prosecution in the public sector,
and corporate and system security in the private sector, the
interest in this subject has just begun to blossom.
This book is intended as a system engineer's compendium, explaining the dependencies and technical interactions between the onboard computer hardware, the onboard software and the spacecraft operations from ground. After a brief introduction on the subsequent development in all three fields over the spacecraft engineering phases each of the main topis is treated in depth in a separate part. The features of today's onboard computers are explained at hand of their historic evolution over the decades from the early days of spaceflight up to today. Latest system-on-chip processor architectures are treated as well as all onboard computer major components. After the onboard computer hardware the corresponding software is treated in a separate part. Both the software static architecture as well as the dynamic architecture are covered, and development technologies as well as software verification approaches are included. Following these two parts on the onboard architecture, the last part covers the concepts of spacecraft operations from ground. This includes the nominal operations concepts, the redundancy concept and the topic of failure detection, isolation and recovery. The baseline examples in the book are taken from the domain of satellites and deep space probes. The principles and many cited standards on spacecraft commanding, hardware and software however also apply to other space applications like launchers. The book is equally applicable for students as well for system engineers in space industry.
This book shares with readers practical design knowledge gained from the author's 24 years of IC design experience. The author addresses issues and challenges faced commonly by IC designers, along with solutions and workarounds. Guidelines are described for tackling issues such as clock domain crossing, using lockup latch to cross clock domains during scan shift, implementation of scan chains across power domain, optimization methods to improve timing, how standard cell libraries can aid in synthesis optimization, BKM (best known method) for RTL coding, test compression, memory BIST, usage of signed Verilog for design requiring +ve and -ve calculations, state machine, code coverage and much more. Numerous figures and examples are provided to aid the reader in understanding the issues and their workarounds.
Industrial machines, automobiles, airplanes, robots, and machines are among the myriad possible hosts of embedded systems. The author researches robotic vehicles and remote operated vehicles (ROVs), especially Underwater Robotic Vehicles (URVs), used for a wide range of applications such as exploring oceans, monitoring environments, and supporting operations in extreme environments. Embedded Mechatronics System Design for Uncertain Environments has been prepared for those who seek to easily develop and design embedded systems for control purposes in robotic vehicles. It reflects the multidisciplinarily of embedded systems from initial concepts (mechanical and electrical) to the modelling and simulation (mathematical relationships), creating graphical-user interface (software) and their actual implementations (mechatronics system testing). The author proposes new solutions for the prototyping, simulation, testing, and design of real-time systems using standard PC hardware including Linux (R), Raspbian (R), ARDUINO (R), and MATLAB (R) xPC Target.
The design of today's semiconductor chips for various applications,
such as telecommunications, poses various challenges due to the
complexity of these systems. These highly complex systems-on-chips
demand new approaches to connect and manage the communication
between on-chip processing and storage components and networks on
chips (NoCs) provide a powerful solution. |
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