This book contains the papers that have been presented at the ninth Very Large Scale Integrated Systems conference VLSI'97 that is organized biannually by IFIP Working Group 10.5. It took place at Hotel Serra Azul, in Gramado Brazil from 26-30 August 1997. Previous conferences have taken place in Edinburgh, Trondheim, Vancouver, Munich, Grenoble and Tokyo. The papers in this book report on all aspects of importance to the design of the current and future integrated systems. The current trend towards the realization of versatile Systems-on-a-Chip require attention of embedded hardware/software systems, dedicated ASIC hardware, sensors and actuators, mixed analog/digital design, video and image processing, low power battery operation and wireless communication. The papers as presented in Jhis book have been organized in two tracks, where one is dealing with VLSI System Design and Applications and the other presents VLSI Design Methods and CAD. The following topics are addressed: VLSI System Design and Applications Track * VLSI for Video and Image Processing. * Microsystem and Mixed-mode design. * Communication And Memory System Design * Cow-voltage & Low-power Analog Circuits. * High Speed Circuit Techniques * Application Specific DSP Architectures. VLSI Design Methods and CAD Track * Specification and Simulation at System Level. * Synthesis and Technology Mapping. * CAD Techniques for Low-Power Design. * Physical Design Issues in Sub-micron Technologies. * Architectural Design and Synthesis. * Testing in Complex Mixed Analog and Digital Systems.

The most important use of computing in the future will be in the context of the global "digital convergence" where everything becomes digital and every thing is inter-networked. The application will be dominated by storage, search, retrieval, analysis, exchange and updating of information in a wide variety of forms. Heavy demands will be placed on systems by many simultaneous re quests. And, fundamentally, all this shall be delivered at much higher levels of dependability, integrity and security. Increasingly, large parallel computing systems and networks are providing unique challenges to industry and academia in dependable computing, espe cially because of the higher failure rates intrinsic to these systems. The chal lenge in the last part of this decade is to build a systems that is both inexpensive and highly available. A machine cluster built of commodity hardware parts, with each node run ning an OS instance and a set of applications extended to be fault resilient can satisfy the new stringent high-availability requirements. The focus of this book is to present recent techniques and methods for im plementing fault-tolerant parallel and distributed computing systems. Section I, Fault-Tolerant Protocols, considers basic techniques for achieving fault-tolerance in communication protocols for distributed systems, including synchronous and asynchronous group communication, static total causal order ing protocols, and fail-aware datagram service that supports communications by time."

A revealing insight into the issues surrounding information infrastructure implementation in large, global corporations. Case study material from six different international corporations-AstraZeneca, IBM, Norsk Hydro, Roche, SKF, and Statoil-shows a complex picture of implementation, and one that cannot be interpreted using current management thinking. The authors suggest that the economics of standards and increasing returns be joined with the perspectives from the social studies of science and technology to provide the fundamentals for a fresh view of the management of IT in global corporations.

DAPSYS (International Conference on Distributed and Parallel Systems) is an international biannual conference series dedicated to all aspects of distributed and parallel computing. DAPSYS 2008, the 7th International Conference on Distributed and Parallel Systems was held in September 2008 in Hungary.

Distributed and Parallel Systems: Desktop Grid Computing, based on DAPSYS 2008, presents original research, novel concepts and methods, and outstanding results. Contributors investigate parallel and distributed techniques, algorithms, models and applications; present innovative software tools, environments and middleware; focus on various aspects of grid computing; and introduce novel methods for development, deployment, testing and evaluation. This volume features a special focus on desktop grid computing as well.

Designed for a professional audience composed of practitioners and researchers in industry, this book is also suitable for advanced-level students in computer science.

This book presents high-/mixed-voltage analog and radio frequency (RF) circuit techniques for developing low-cost multistandard wireless receivers in nm-length CMOS processes. Key benefits of high-/mixed-voltage RF and analog CMOS circuits are explained, state-of-the-art examples are studied, and circuit solutions before and after voltage-conscious design are compared. Three real design examples are included, which demonstrate the feasibility of high-/mixed-voltage circuit techniques. Provides a valuable summary and real case studies of the state-of-the-art in high-/mixed-voltage circuits and systems; Includes novel high-/mixed-voltage analog and RF circuit techniques - from concept to practice; Describes the first high-voltage-enabled mobile-TVRF front-end in 90nm CMOS and the first mixed-voltage full-band mobile-TV Receiver in 65nm CMOS;Demonstrates the feasibility of high-/mixed-voltage circuit techniques with real design examples."

Before use, standard ERP systems such as SAP R/3 need to be customized to meet the concrete requirements of the individual enterprise. This book provides an overview of the process models, methods, and tools offered by SAP and its partners to support this complex and time-consuming process. It begins by characterizing the foundations of the latest ERP systems from both a conceptual and technical viewpoint, whereby the most important components and functions of SAP R/3 are described. The main part of the book then goes on to present the current methods and tools for the R/3 implementation based on newer process models (roadmaps).

In today s world, services and data are integrated in ever new constellations, requiring the easy, flexible and scalable integration of autonomous, heterogeneous components into complex systems at any time.

Event-based architectures inherently decouple system components. Event-based components are not designed to work with specific other components in a traditional request/reply mode, but separate communication from computation through asynchronous communication mechanisms via a dedicated notification service.

Muhl, Fiege, and Pietzuch provide the reader with an in-depth description of event-based systems. They cover the complete spectrum of topics, ranging from a treatment of local event matching and distributed event forwarding algorithms, through a more practical discussion of software engineering issues raised by the event-based style, to a presentation of state-of-the-art research topics in event-based systems, such as composite event detection and security. Their presentation gives researchers a comprehensive overview of the area and lots of hints for future research. In addition, they show the power of event-based architectures in modern system design, thus encouraging professionals to exploit this technique in next generation large-scale distributed applications like information dissemination, network monitoring, enterprise application integration, or mobile systems.

This book provides the most comprehensive and consistent survey of the field of IC design for Biological Sensing and Processing. The authors describe a multitude of applications that require custom CMOS IC design and highlight the techniques in analog and mixed-signal circuit design that potentially can cross boundaries and benefit the very wide community of bio-medical engineers.

This book is intended to serve as a textbook for a second course in the im plementation (Le. microarchitecture) of computer architectures. The subject matter covered is the collection of techniques that are used to achieve the highest performance in single-processor machines; these techniques center the exploitation of low-level parallelism (temporal and spatial) in the processing of machine instructions. The target audience consists students in the final year of an undergraduate program or in the first year of a postgraduate program in computer science, computer engineering, or electrical engineering; professional computer designers will also also find the book useful as an introduction to the topics covered. Typically, the author has used the material presented here as the basis of a full-semester undergraduate course or a half-semester post graduate course, with the other half of the latter devoted to multiple-processor machines. The background assumed of the reader is a good first course in computer architecture and implementation - to the level in, say, Computer Organization and Design, by D. Patterson and H. Hennessy - and familiarity with digital-logic design. The book consists of eight chapters: The first chapter is an introduction to all of the main ideas that the following chapters cover in detail: the topics covered are the main forms of pipelining used in high-performance uniprocessors, a taxonomy of the space of pipelined processors, and performance issues. It is also intended that this chapter should be readable as a brief "stand-alone" survey."

This book describes the algorithms and computer architectures used to create and analyze photographs in modern digital cameras. It also puts the capabilities of digital cameras into context for applications in art, entertainment, and video analysis. The author discusses the entire range of topics relevant to digital camera design, including image processing, computer vision, image sensors, system-on-chip, and optics, while clearly describing the interactions between design decisions at these different levels of abstraction. Readers will benefit from this comprehensive view of digital camera design, describing the range of algorithms used to compose, enhance, and analyze images, as well as the characteristics of optics, image sensors, and computing platforms that determine the physical limits of image capture and computing. The content is designed to be used by algorithm designers and does not require an extensive background in optics or electronics.

This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation.

Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip; Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues; Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC.

From the Foreword:

Overall this book shows important advances over the state of the art that will affect future system design as well as R&D in tools and methods for NoC design. It represents an important reference point for both designers and electronic design automation researchers and developers.

--Giovanni De Micheli"

Performance Evaluation, Prediction and Visualization in Parallel Systems presents a comprehensive and systematic discussion of theoretics, methods, techniques and tools for performance evaluation, prediction and visualization of parallel systems. Chapter 1 gives a short overview of performance degradation of parallel systems, and presents a general discussion on the importance of performance evaluation, prediction and visualization of parallel systems. Chapter 2 analyzes and defines several kinds of serial and parallel runtime, points out some of the weaknesses of parallel speedup metrics, and discusses how to improve and generalize them. Chapter 3 describes formal definitions of scalability, addresses the basic metrics affecting the scalability of parallel systems, discusses scalability of parallel systems from three aspects: parallel architecture, parallel algorithm and parallel algorithm-architecture combinations, and analyzes the relations of scalability and speedup. Chapter 4 discusses the methodology of performance measurement, describes the benchmark- oriented performance test and analysis and how to measure speedup and scalability in practice. Chapter 5 analyzes the difficulties in performance prediction, discusses application-oriented and architecture-oriented performance prediction and how to predict speedup and scalability in practice. Chapter 6 discusses performance visualization techniques and tools for parallel systems from three stages: performance data collection, performance data filtering and performance data visualization, and classifies the existing performance visualization tools. Chapter 7 describes parallel compiling-based, search-based and knowledge-based performance debugging, which assists programmers to optimize the strategy or algorithm in their parallel programs, and presents visual programming-based performance debugging to help programmers identify the location and cause of the performance problem. It also provides concrete suggestions on how to modify their parallel program to improve the performance. Chapter 8 gives an overview of current interconnection networks for parallel systems, analyzes the scalability of interconnection networks, and discusses how to measure and improve network performances. Performance Evaluation, Prediction and Visualization in Parallel Systems serves as an excellent reference for researchers, and may be used as a text for advanced courses on the topic.

This book guides readers through the design of hardware architectures using VHDL for digital communication and image processing applications that require performance computing. Further it includes the description of all the VHDL-related notions, such as language, levels of abstraction, combinational vs. sequential logic, structural and behavioral description, digital circuit design, and finite state machines. It also includes numerous examples to make the concepts presented in text more easily understandable.

The book is designed to provide graduate students and research novices with an introductory review of recent developments in the field of magneto-optics. The field encompasses many of the most important subjects in solid state physics, chemical physics and electronic engineering. The book deals with (1) optical spectroscopy of paramagnetic, antiferromagnetic, and ferromagnetic materials, (2) studies of photo-induced magnetism, and (3) their applications to opto-electronics. Many of these studies originate from those of ligand-field spectra of solids, which are considered to have contributed to advances in materials research for solid-state lasers.

Operating System Forensics is the first book to cover all three critical operating systems for digital forensic investigations in one comprehensive reference. Users will learn how to conduct successful digital forensic examinations in Windows, Linux, and Mac OS, the methodologies used, key technical concepts, and the tools needed to perform examinations. Mobile operating systems such as Android, iOS, Windows, and Blackberry are also covered, providing everything practitioners need to conduct a forensic investigation of the most commonly used operating systems, including technical details of how each operating system works and how to find artifacts. This book walks you through the critical components of investigation and operating system functionality, including file systems, data recovery, memory forensics, system configuration, Internet access, cloud computing, tracking artifacts, executable layouts, malware, and log files. You'll find coverage of key technical topics like Windows Registry, /etc directory, Web browers caches, Mbox, PST files, GPS data, ELF, and more. Hands-on exercises in each chapter drive home the concepts covered in the book. You'll get everything you need for a successful forensics examination, including incident response tactics and legal requirements. Operating System Forensics is the only place you'll find all this covered in one book.

Are memory applications more critical than they have been in the past? Yes, but even more critical is the number of designs and the sheer number of bits on each design. It is assured that catastrophes, which were avoided in the past because memories were small, will easily occur if the design and test engineers do not do their jobs very carefully.
High Performance Memory Testing: Design Principles, Fault Modeling and Self Test is based on the author's 20 years of experience in memory design, memory reliability development and memory self test.

High Performance Memory Testing: Design Principles, Fault Modeling and Self Test is written for the professional and the researcher to help them understand the memories that are being tested.

In many organizations, information technology has become crucial in the support, sustainability and growth of the business. This pervasive use of technology has created a critical dependency on IT that calls for a specific focus on IT governance. Implementing Information Technology Governance: Models, Practices and Cases presents insight gained by literary research and case studies to provide practical guidance for organizations who want to start implementing IT governance or improving existing governance models. Implementing Information Technology Governance: Models, Practices and Cases provides a detailed set of IT governance structures, processes, and relational mechanisms that can be leveraged to implement IT governance in practice.

Component Models and Systems for Grid Applications is the essential reference for the most current research on Grid technologies. This first volume of the CoreGRID series addresses such vital issues as the architecture of the Grid, the way software will influence the development of the Grid, and the practical applications of Grid technologies for individuals and businesses alike.

Part I of the book, "Application-Oriented Designs," focuses on development methodology and how it may contribute to a more component-based use of the Grid. "Middleware Architecture," the second part, examines portable Grid engines, hierarchical infrastructures, interoperability, as well as workflow modeling environments. The final part of the book, "Communication Frameworks," looks at dynamic self-adaptation, collective operations, and higher-order components.

With Component Models and Systems for Grid Applications, editors Vladimir Getov and Thilo Kielmann offer the computing professional and the computing researcher the most informative, up-to-date, and forward-looking thoughts on the fast-growing field of Grid studies.

This book provides an overview of current Intellectual Property (IP) based System-on-Chip (SoC) design methodology and highlights how security of IP can be compromised at various stages in the overall SoC design-fabrication-deployment cycle. Readers will gain a comprehensive understanding of the security vulnerabilities of different types of IPs. This book would enable readers to overcome these vulnerabilities through an efficient combination of proactive countermeasures and design-for-security solutions, as well as a wide variety of IP security and trust assessment and validation techniques. This book serves as a single-source of reference for system designers and practitioners for designing secure, reliable and trustworthy SoCs.

I am very pleased to play even a small part in the publication of this book on the SIGNAL language and its environment POLYCHRONY. I am sure it will be a s- ni?cant milestone in the development of the SIGNAL language, of synchronous computing in general, and of the data?ow approach to computation. In data?ow, the computation takes place in a producer-consumer network of - dependent processing stations. Data travels in streams and is transformed as these streams pass through the processing stations (often called ?lters). Data?ow is an attractive model for many reasons, not least because it corresponds to the way p- duction, transportation, andcommunicationare typicallyorganizedin the real world (outside cyberspace). I myself stumbled into data?ow almost against my will. In the mid-1970s, Ed Ashcroft and I set out to design a "super" structured programming language that, we hoped, would radically simplify proving assertions about programs. In the end, we decided that it had to be declarative. However, we also were determined that iterative algorithms could be expressed directly, without circumlocutions such as the use of a tail-recursive function. The language that resulted, which we named LUCID, was much less traditional then we would have liked. LUCID statements are equations in a kind of executable temporallogic thatspecifythe (time)sequencesof variablesinvolvedin aniteration.

Cache And Interconnect Architectures In Multiprocessors Eilat, Israel May 25-261989 Michel Dubois UniversityofSouthernCalifornia Shreekant S. Thakkar SequentComputerSystems The aim of the workshop was to bring together researchers working on cache coherence protocols for shared-memory multiprocessors with various interconnect architectures. Shared-memory multiprocessors have become viable systems for many applications. Bus based shared-memory systems (Eg. Sequent's Symmetry, Encore's Multimax) are currently limited to 32 processors. The fIrst goal of the workshop was to learn about the performance ofapplications on current cache-based systems. The second goal was to learn about new network architectures and protocols for future scalable systems. These protocols and interconnects would allow shared-memory architectures to scale beyond current imitations. The workshop had 20 speakers who talked about their current research. The discussions were lively and cordial enough to keep the participants away from the wonderful sand and sun for two days. The participants got to know each other well and were able to share their thoughts in an informal manner. The workshop was organized into several sessions. The summary of each session is described below. This book presents revisions of some of the papers presented at the workshop."

This book provides students and practicing chip designers with an easy-to-follow yet thorough, introductory treatment of the most promising emerging memories under development in the industry. Focusing on the chip designer rather than the end user, this book offers expanded, up-to-date coverage of emerging memories circuit design. After an introduction on the old solid-state memories and the fundamental limitations soon to be encountered, the working principle and main technology issues of each of the considered technologies (PCRAM, MRAM, FeRAM, ReRAM) are reviewed and a range of topics related to design is explored: the array organization, sensing and writing circuitry, programming algorithms and error correction techniques are reviewed comparing the approach followed and the constraints for each of the technologies considered. Finally the issue of radiation effects on memory devices has been briefly treated. Additionally some considerations are entertained about how emerging memories can find a place in the new memory paradigm required by future electronic systems. This book is an up-to-date and comprehensive introduction for students in courses on memory circuit design or advanced digital courses in VLSI or CMOS circuit design. It also serves as an essential, one-stop resource for academics, researchers and practicing engineers.

This unique text/reference describes an exciting and novel approach to supercomputing in the DataFlow paradigm. The major advantages and applications of this approach are clearly described, and a detailed explanation of the programming model is provided using simple yet effective examples. The work is developed from a series of lecture courses taught by the authors in more than 40 universities across more than 20 countries, and from research carried out by Maxeler Technologies, Inc. Topics and features: presents a thorough introduction to DataFlow supercomputing for big data problems; reviews the latest research on the DataFlow architecture and its applications; introduces a new method for the rapid handling of real-world challenges involving large datasets; provides a case study on the use of the new approach to accelerate the Cooley-Tukey algorithm on a DataFlow machine; includes a step-by-step guide to the web-based integrated development environment WebIDE.