Recently, the pressure for fast processing and efficient storage of large data with complexrelations increased beyond the capability of traditional databases. Typical examples include iPhone applications, computer aided design - both electrical and mechanical, biochemistry applications, and incremental compilers. Serialization, which is sometimes used in such situations is notoriously tedious and error prone.

In this book, Jiri Soukup and Petr Macha ek show in detail how to write programs which store their internal data automatically and transparently to disk. Together with special data structure libraries which treat relations among objects as first-class entities, and with a UML class-diagram generator, the core application code is much simplified. The benchmark chapter shows a typical example where persistent data is faster by the order of magnitude than with a traditional database, in both traversing and accessing the data.

The authors explore and exploit advanced features of object-oriented languages in a depth hardly seen in print before. Yet, you as a reader need only a basic knowledge of C++, Java, C#, or Objective C. These languages are quite similar with respect to persistency, and the authors explain their differences where necessary.

The book targets professional programmers working on any industry applications, it teaches you how to design your own persistent data or how to use the existing packages efficiently. Researchers in areas like language design, compiler construction, performance evaluation, and no-SQL applications will find a wealth of novel ideas and valuable implementation tips. Under http: //www.codefarms.com/bk, you will find a blog and other information, including a downloadable zip file with the sources of all the listings that are longer than just a few lines - ready to compile and run."

This book presents research in an interdisciplinary field, resulting from the vigorous and fruitful cross-pollination between traditional deontic logic and computer science. AI researchers have used deontic logic as one of the tools in modelling legal reasoning. Computer scientists have discovered that computer systems (including their interaction with other computer systems and with human agents) can often be productively modelled as norm-governed. So, for example, deontic logic has been applied by computer scientists for specifying bureaucratic systems, access and security policies, and soft design or integrity constraints, and for modelling fault tolerance. In turn, computer scientists and AI researchers have also discovered (and made it clear to the rest of us) that various formal tools (e.g. nonmonotonic, temporal and dynamic logics) developed in computer science and artificial intelligence have interesting applications to traditional issues in deontic logic. This volume presents some of the best work done in this area, with the selection at once reflecting the general interdisciplinary (and international) character that this area of research has taken on, as well as reflecting the more specific recent inter-disciplinary developments between traditional deontic logic and computer science.

This book provides readers with a comprehensive introduction to physical inspection-based approaches for electronics security. The authors explain the principles of physical inspection techniques including invasive, non-invasive and semi-invasive approaches and how they can be used for hardware assurance, from IC to PCB level. Coverage includes a wide variety of topics, from failure analysis and imaging, to testing, machine learning and automation, reverse engineering and attacks, and countermeasures.

1) Provides a levelling approach, bringing students at all stages of programming experience to the same point 2) Focuses Python, a general language, to an engineering and scientific context 3) Uses a classroom tested, practical approach to teaching programming 4) Teaches students and professionals how to use Python to solve engineering calculations such as differential and algebraic equations

This volume contains papers presented at the NATO sponsored Advanced Research Workshop on "Software for Parallel Computation" held at the University of Calabria, Cosenza, Italy, from June 22 to June 26, 1992. The purpose of the workshop was to evaluate the current state-of-the-art of the software for parallel computation, identify the main factors inhibiting practical applications of parallel computers and suggest possible remedies. In particular it focused on parallel software, programming tools, and practical experience of using parallel computers for solving demanding problems. Critical issues relative to the practical use of parallel computing included: portability, reusability and debugging, parallelization of sequential programs, construction of parallel algorithms, and performance of parallel programs and systems. In addition to NATO, the principal sponsor, the following organizations provided a generous support for the workshop: CERFACS, France, C.I.R.A., Italy, C.N.R., Italy, University of Calabria, Italy, ALENIA, Italy, The Boeing Company, U.S.A., CISE, Italy, ENEL - D.S.R., Italy, Alliant Computer Systems, Bull RN Sud, Italy, Convex Computer, Digital Equipment Corporation, Rewlett Packard, Meiko Scientific, U.K., PARSYTEC Computer, Germany, TELMAT Informatique, France, Thinking Machines Corporation.

For real-time systems, the worst-case execution time (WCET) is the key objective to be considered. Traditionally, code for real-time systems is generated without taking this objective into account and the WCET is computed only after code generation. Worst-Case Execution Time Aware Compilation Techniques for Real-Time Systems presents the first comprehensive approach integrating WCET considerations into the code generation process. Based on the proposed reconciliation between a compiler and a timing analyzer, a wide range of novel optimization techniques is provided. Among others, the techniques cover source code and assembly level optimizations, exploit machine learning techniques and address the design of modern systems that have to meet multiple objectives.

Using these optimizations, the WCET of real-time applications can be reduced by about 30% to 45% on the average. This opens opportunities for decreasing clock speeds, costs and energy consumption of embedded processors. The proposed techniques can be used for all types real-time systems, including automotive and avionics IT systems.

This book provides a hands-on, application-oriented guide to the language and methodology of both SystemVerilog Assertions and SytemVerilog Functional Coverage. Readers will benefit from the step-by-step approach to functional hardware verification, which will enable them to uncover hidden and hard to find bugs, point directly to the source of the bug, provide for a clean and easy way to model complex timing checks and objectively answer the question 'have we functionally verified everything'. Written by a professional end-user of both SystemVerilog Assertions and SystemVerilog Functional Coverage, this book explains each concept with easy to understand examples, simulation logs and applications derived from real projects. Readers will be empowered to tackle the modeling of complex checkers for functional verification, thereby drastically reducing their time to design and debug.

This book brings together a selection of the best papers from the thirteenth edition of the Forum on specification and Design Languages Conference (FDL), which was held in Southampton, UK in September 2010. FDL is a well established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modelling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems.

This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary "User Constraints File". The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students and professionals engaged in the domain of FPGA circuit optimization and implementation.

This volume contains the papers presented at the Fifth International Workshop on Database Machines. The papers cover a wide spectrum of topics on Database Machines and Knowledge Base Machines. Reports of major projects, ECRC, MCC, and ICOT are included. Topics on DBM cover new database machine architectures based on vector processing and hypercube parallel processing, VLSI oriented architecture, filter processor, sorting machine, concurrency control mechanism for DBM, main memory database, interconnection network for DBM, and performance evaluation. In this workshop much more attention was given to knowledge base management as compared to the previous four workshops. Many papers discuss deductive database processing. Architectures for semantic network, prolog, and production system were also proposed. We would like to express our deep thanks to all those who contributed to the success of the workshop. We would also like to express our apprecia tion for the valuable suggestions given to us by Prof. D. K. Hsiao, Prof. D."

Despite the ample number of articles on parallel-vector computational algorithms published over the last 20 years, there is a lack of texts in the field customized for senior undergraduate and graduate engineering research. Parallel-Vector Equation Solvers for Finite Element Engineering Applications aims to fill this gap, detailing both the theoretical development and important implementations of equation-solution algorithms. The mathematical background necessary to understand their inception balances well with descriptions of their practical uses. Illustrated with a number of state-of-the-art FORTRAN codes developed as examples for the book, Dr. Nguyen's text is a perfect choice for instructors and researchers alike.

Advanced research on the description of distributed systems and on design calculi for software and hardware is presented in this volume. Distinguished researchers give an overview of the latest state of the art.

Unique selling point: Exploration of the societal and ethical issues surrounding the use and development of digital technology Core audience: IT managers and executives; academic researchers; students of IT Place in the market: Professional title with appeal to academics and students

Architecture and Hardware Support for AI Processing: VLSI Design of a 3D Highly Parallel MessagePassing Architecture (J.L. Bechennec et al.). Architectural Design of the Rewrite Rule Machine Ensemble (H. Aida et al.). A Dataflow Architecture for AI (J. DelgadoFrias et al.). Machines for Prolog: An Extended Prolog Instruction Set for RISC Processors (A. Krall). A VLSI Engine for Structured Logic Programming (P. Civera et al.). Performance Evaluation of a VLSI Associative Unifier in a WAM Based Environment (P. Civera et al.). Analogue and Pulse Stream Neural Networks: Computational Capabilities of BiologicallyRealistic Analog Processing Elements (C. Fields et al.). Analog VLSI Models of Mean Field Networks (C. Schneider et al.). An Analogue Neuron Suitable for a Data Frame Architecture (W.A.J. Waller et al.). Digital Implementations of Neural Networks: The VLSI Implementation of the sigma Architecture (S.R. Williams et al.). A Cascadable VLSI Architecture for the Realization of Large Binary Associative Networks (W. Poechmueller et al.). Digital VLSI Implementations of an Associative memory Based on Neural Networks (U. Ruckert). Arrays for Neural Networks: A Highly Parallel Digital Architecture for Neural Network Emulation (D. Hammerstrom). 26 additional articles. Index.

Modern consumers carry many electronic devices, like a mobile phone, digital camera, GPS, PDA and an MP3 player. The functionality of each of these devices has gone through an important evolution over recent years, with a steep increase in both the number of features as in the quality of the services that they provide. However, providing the required compute power to support (an uncompromised combination of) all this functionality is highly non-trivial. Designing processors that meet the demanding requirements of future mobile devices requires the optimization of the embedded system in general and of the embedded processors in particular, as they should strike the correct balance between flexibility, energy efficiency and performance. In general, a designer will try to minimize the energy consumption (as far as needed) for a given performance, with a sufficient flexibility. However, achieving this goal is already complex when looking at the processor in isolation, but, in reality, the processor is a single component in a more complex system. In order to design such complex system successfully, critical decisions during the design of each individual component should take into account effect on the other parts, with a clear goal to move to a global Pareto optimum in the complete multi-dimensional exploration space.

In the complex, global design of battery-operated embedded systems, the focus of Ultra-Low Energy Domain-Specific Instruction-Set Processors is on the energy-aware architecture exploration of domain-specific instruction-set processors and the co-optimization of the datapath architecture, foreground memory, and instruction memory organisation with a link to the required mapping techniques or compiler steps at the early stages of the design. By performing an extensive energy breakdown experiment for a complete embedded platform, both energy and performance bottlenecks have been identified, together with the important relations between the different components. Based on this knowledge, architecture extensions are proposed for all the bottlenecks.

This book describes a novel approach for the design of embedded systems and industrial automation systems, using a unified model-driven approach that is applicable in both domains. The authors illustrate their methodology, using the IEC 61499 standard as the main vehicle for specification, verification, static timing analysis and automated code synthesis. The well-known synchronous approach is used as the main vehicle for defining an unambiguous semantics that ensures determinism and deadlock freedom. The proposed approach also ensures very efficient implementations either on small-scale embedded devices or on industry-scale programmable automation controllers (PACs). It can be used for both centralized and distributed implementations. Significantly, the proposed approach can be used without the need for any run-time support. This approach, for the first time, blurs the gap between embedded systems and automation systems and can be applied in wide-ranging applications in automotive, robotics, and industrial control systems. Several realistic examples are used to demonstrate for readers how the methodology can enable them to reduce the time-to-market, while improving the design quality and productivity.

Hopping, climbing and swimming robots, nano-size neural networks, motorless walkers, slime mould and chemical brains - "Artificial Life Models in Hardware" offers unique designs and prototypes of life-like creatures in conventional hardware and hybrid bio-silicon systems. Ideas and implementations of living phenomena in non-living substrates cast a colourful picture of state-of-art advances in hardware models of artificial life.

This book covers essential topics in the architecture and design of Internet of Things (IoT) systems. The authors provide state-of-the-art information that enables readers to design systems that balance functionality, bandwidth, and power consumption, while providing secure and safe operation in the face of a wide range of threat and fault models. Coverage includes essential topics in system modeling, edge/cloud architectures, and security and safety, including cyberphysical systems and industrial control systems.

Brilliant Laptops for the Over 50s is a visual quick reference book that shows you how to make the most of your laptop computer, particularly if it is your first one, or if you are new to the world of computers ! . It will give you a solid grounding on how choose the right laptop for you, how it works and how to get the best out of your laptop - a complete reference for the beginner and intermediate user who hasn't growen up with a laptop. If you are considering buying a laptop, or want to learn how to get the very best out of your current laptop, this book is for you. The first couple of chapters look at the different types and specs of of laptops available and matches these to the needs and demands of the older user, helping you to understand what your laptop can do for you and how it fits into the bigger universe of laptops. As you move though the chapters you will learn more about how your laptop works, how to get the most from its and how to keep it in tip top condition. We also look at the kinds of software and peripherals you might find useful, how to manage security and connectivity issues and how to manage that all important aspect of the laptop ecosystem - its battery. Brilliant Laptops provides .... A visual tutorial taking you from laptop novice to accomplished user in easy steps. A guide to optimising your use of your laptop. making a more integral and essential part of your life. Essential guidance on the vast array of software and peripferal hardware available to you, allowing you to make the right choices for how you wnat to work Insider tips and tricks on optimising your hardware an software to make sure that you get every extra ounce of power and time from your battery.

This is the first book to focus on designing run-time reconfigurable systems on FPGAs, in order to gain resource and power efficiency, as well as to improve speed. Case studies in partial reconfiguration guide readers through the FPGA jungle, straight toward a working system. The discussion of partial reconfiguration is comprehensive and practical, with models introduced together with methods to implement efficiently the corresponding systems. Coverage includes concepts for partial module integration and corresponding communication architectures, floorplanning of the on-FPGA resources, physical implementation aspects starting from constraining primitive placement and routing all the way down to the bitstream required to configure the FPGA, and verification of reconfigurable systems.

Nowadays information technology is based on semiconductor and ferromagnetic materials. Information processing and computation are based on electron charge in semiconductor transistors and integrated circuits, and information is stored on magnetic high-density hard disks based on the physics of the electron spins. Recently, a new branch of physics and nanotechnology, called magneto-electronics, spintronics, or spin electronics, has emerged, which aims at simultaneously exploiting both the charge and the spin of electrons in the same device. A broader goal is to develop new functionality that does not exist separately in a ferromagnet or a semiconductor. The aim of this book is to present new directions in the development of spin electronics in both the basic physics and the technology which will become the foundation of future electronics.

This book covers layout design and layout migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects. Scaling-dependent models for interconnect power, interconnect delay and crosstalk noise are covered in depth, and several design optimization problems are addressed, such as minimization of interconnect power under delay constraints, or design for minimal delay in wire bundles within a given routing area. A handy reference or a guide for design methodologies and layout automation techniques, this book provides a foundation for physical design challenges of interconnect in advanced integrated circuits.

This book offers the reader a comprehensive view of the design space of wearable computers, cutting across multiple application domains and interaction modalities. Besides providing several examples of wearable technologies, Wearable Interaction illustrates how to create and to assess interactive wearables considering human factors in design decisions related to input entry and output responses. The book also discusses the impacts of form factors and contexts of use in the design of wearable interaction. Miniaturized components, flexible materials, and sewable electronics toolkits exemplify advances in technology that facilitated the design and development of wearable technologies. Despite such advances, creating wearable interfaces that are efficient is still challenging. The new affordances of on-body interfaces require the consideration of new interaction paradigms, so that the design decisions for the user interaction take into account key limitations in the interaction surfaces of wearables concerning input entry, processing power for output responses, and in the time and attention that wearers dedicate to complete their interaction. Under such constraints, creating interfaces with high usability levels is complex. Also, because wearables are worn continuously and in close contact with the human body, on-body interfaces must be carefully designed to neither disturb nor overwhelm wearers. The context of use and the potential of wearable technologies must be both well understood to provide users with relevant information and services using appropriate approaches and without overloading them with notifications. Wearable Interaction explains thoroughly how interactive wearables have been created taking into account the needs of end users as well as the vast potential that wearable technologies offer. Readers from academia, industry or government will learn how wearables can be designed and developed to facilitate human activities and tasks across different sectors.