Since 1990 the German Research Society (Deutsche Forschungsgemeinschaft, DFG) has been funding PhD courses (Graduiertenkollegs) at selected universi- ties in the Federal Republic of Germany. TU Berlin has been one of the first universities joining that new funding program of DFG. The PhD courses have been funded over aperiod of 9 years. The grant for the nine years sums up to approximately 5 million DM. Our Grnduiertenkolleg on Communication-based Systems has been assigned to the Computer Science Department of TU Berlin although it is a joined effort of all three universities in Berlin, Technische Uni- versitat (TU), Freie Universitat (FU), and Humboldt Universitat (HU). The Graduiertenkolleg has been started its program in October 1991. The professors responsible for the program are: Hartmut Ehrig (TU), Gunter Hommel (TU), Stefan Jahnichen (TU), Peter Lohr (FU), Miroslaw Malek (RU), Peter Pep- per (TU), Radu Popescu-Zeletin (TU), Herbert Weber (TU), and Adam Wolisz (TU). The Graduiertenkolleg is a PhD program for highly qualified persons in the field of computer science. Twenty scholarships have been granted to fellows of the Graduiertenkolleg for a maximal period of three years. During this time the fellows take part in a selected educational program and work on their PhD thesis.

This book introduces the area of image processing and data-parallel processing. It covers a number of standard algorithms in image processing and describes their parallel implementation. The programming language chosen for all examples is a structured parallel programming language which is ideal for educational purposes. It has a number of advantages over C, and since all image processing tasks are inherently parallel, using a parallel language for presentation actually simplifies the subject matter. This results in shorter source codes and a better understanding. Sample programs and a free compiler are available on an accompanying Web site.

Multimedia data streams will form a major part of the new generation of applications in high-speed networks. Continuous media streams, however, require transmission with guaranteed performance. In addition, many multimedia applications will require peer-to-multipeer communication. Guaranteed performance can only be provided with resource reservation in the network, and efficient multipeer communication must be based on multicast support in the lower layers of the network. Architecture and Protocols for High-Speed Networks focuses on techniques for building the networks that will meet the needs of these multimedia applications. In particular two areas of current research interest in such communication systems are covered in depth. These are the protocol related aspects, such as switched networks, ATM, MAC layer, network and transport layer; and the services and applications. Architecture and Protocols for High-Speed Networks contains contributions from leading world experts, giving the most up-to-date research available. It is an essential reference for all professionals, engineers and researchers working in the area of high-speed networks.

With the advent of portable and autonomous computing systems, power con sumption has emerged as a focal point in many research projects, commercial systems and DoD platforms. One current research initiative, which drew much attention to this area, is the Power Aware Computing and Communications (PAC/C) program sponsored by DARPA. Many of the chapters in this book include results from work that have been supported by the PACIC program. The performance of computer systems has been tremendously improving while the size and weight of such systems has been constantly shrinking. The capacities of batteries relative to their sizes and weights has been also improv ing but at a rate which is much slower than the rate of improvement in computer performance and the rate of shrinking in computer sizes. The relation between the power consumption of a computer system and it performance and size is a complex one which is very much dependent on the specific system and the technology used to build that system. We do not need a complex argument, however, to be convinced that energy and power, which is the rate of energy consumption, are becoming critical components in computer systems in gen eral, and portable and autonomous systems, in particular. Most of the early research on power consumption in computer systems ad dressed the issue of minimizing power in a given platform, which usually translates into minimizing energy consumption, and thus, longer battery life."

Many-valued logics are becoming increasingly important in all areas of computer science. This is the second volume of an authoritative two-volume handbook on many valued logics by two leading figures in the field. While the first volume was mainly concerned with theoretical foundations, this volume emphasizes automated reasoning, practical applications, and the latest developments in fuzzy logic and rough set theory. Among the applications presented are those in software specification and electronic circuit verification.

Communication between engineers, their managers, suppliers and customers relies on the existence of a common understanding for the meaning of terms. While this is not normally a problem, it has proved to be a significant roadblock in the EDA industry where terms are created as required by any number of people, multiple terms are coined for the same thing, or even worse, the same term is used for many different things. This taxonomy identifies all of the significant terms used by an industry and provides a structural framework in which those terms can be defined and their relationship to other terms identified. The origins of this work go back to 1995 with a government-sponsored program called RASSP. At the termination of their work, VSIA picked up their work and developed it further. Three new taxonomies were introduced by VSIA for additional facets of the system design and development process. Since role of VSIA has now changed so that it no longer maintains these taxonomies, the baton is being passed on again through a group of interested people and manifested in this key reference work.

Structured Analog CMOS Design describes a structured analog design approach that makes it possible to simplify complex analog design problems and develop a design strategy that can be used for the design of large number of analog cells. It intentionally avoids treating the analog design as a mathematical problem, developing a design procedure based on the understanding of device physics and approximations that give insight into parameter interdependences.

The basic design concept consists in analog cell partitioning into the basic analog structures and sizing of these basic analog structures in a predefined procedural design sequence. The procedural design sequence ensures the correct propagation of design specifications, the verification of parameter limits and the local optimization loops. The proposed design procedure is also implemented as a CAD tool that follows this book.

TheSAMOSworkshopisaninternationalgatheringofhighlyquali?edresearchers from academia and industry, sharing ideas in a 3-day lively discussion on the quietandinspiringnorthernmountainsideoftheMediterraneanislandofSamos. The workshopmeeting is one of two co-locatedevents (the other event being the IC-SAMOS).Asatradition, theworkshopfeaturespresentationsinthemorning, while after lunch all kinds of informal discussions and nut-cracking gatherings take place. The workshop is unique in the sense that not only solved research problems are presented and discussed but also (partly) unsolved problems and in-depth topical reviews can be unleashed in the scienti?c arena. Consequently, the workshopprovidesthe participantswithanenvironmentwherecollaboration rather than competition is fostered. The SAMOS conference and workshop were established in 2001 by Stamatis Vassiliadis with the goals outlined above in mind, and located on Samos, one of the most beautiful islands of the Aegean. The rich historical and cultural environment of the island, coupled with the intimate atmosphereandthe slowpaceofasmallvillagebythe seainthe middle of the Greek summer, provide a very conducive environment where ideas can be exchanged and shared freely

Making Grids Work includes selected articles from the CoreGRID Workshop on Grid Programming Models, Grid and P2P Systems Architecture, Grid Systems, Tools and Environments held at the Institute of Computer Science, Foundation for Research and Technology - Hellas in Crete, Greece, June 2007. This workshop brought together representatives of the academic and industrial communities performing Grid research in Europe. Organized within the context of the CoreGRID Network of Excellence, this workshop provided a forum for the presentation and exchange of views on the latest developments in Grid Technology research. This volume is the 7th in the series of CoreGRID books. Making Grids Work is designed for a professional audience, composed of researchers and practitioners in industry. This volume is also suitable for graduate-level students in computer science.

Component Models and Systems for Grid Applications is the essential reference for the most current research on Grid technologies. This first volume of the CoreGRID series addresses such vital issues as the architecture of the Grid, the way software will influence the development of the Grid, and the practical applications of Grid technologies for individuals and businesses alike.

Part I of the book, "Application-Oriented Designs," focuses on development methodology and how it may contribute to a more component-based use of the Grid. "Middleware Architecture," the second part, examines portable Grid engines, hierarchical infrastructures, interoperability, as well as workflow modeling environments. The final part of the book, "Communication Frameworks," looks at dynamic self-adaptation, collective operations, and higher-order components.

With Component Models and Systems for Grid Applications, editors Vladimir Getov and Thilo Kielmann offer the computing professional and the computing researcher the most informative, up-to-date, and forward-looking thoughts on the fast-growing field of Grid studies.

During the 1980s and early 1990s there was signi?cant work in the design and implementation of hardware neurocomputers. Nevertheless, most of these efforts may be judged to have been unsuccessful: at no time have have ha- ware neurocomputers been in wide use. This lack of success may be largely attributed to the fact that earlier work was almost entirely aimed at developing custom neurocomputers, based on ASIC technology, but for such niche - eas this technology was never suf?ciently developed or competitive enough to justify large-scale adoption. On the other hand, gate-arrays of the period m- tioned were never large enough nor fast enough for serious arti?cial-neur- network (ANN) applications. But technology has now improved: the capacity and performance of current FPGAs are such that they present a much more realistic alternative. Consequently neurocomputers based on FPGAs are now a much more practical proposition than they have been in the past. This book summarizes some work towards this goal and consists of 12 papers that were selected, after review, from a number of submissions. The book is nominally divided into three parts: Chapters 1 through 4 deal with foundational issues; Chapters 5 through 11 deal with a variety of implementations; and Chapter 12 looks at the lessons learned from a large-scale project and also reconsiders design issues in light of current and future technology.

Finite element methods (FEM), and its associated computer software have been widely accepted as one of the most effective general tools for solving large-scale, practical engineering and science applications. For implicit finite element codes, it is a well-known fact that efficient equation and eigen-solvers play critical roles in solving large-scale, practical engineering/science problems. Sparse matrix technologies have been evolved and become mature enough that all popular, commercialized FEM codes have already inserted sparse solvers into their software. However, a few FEM books have detailed discussions about Lanczos eigen-solvers, or explain domain decomposition (DD) finite element formulation (including detailed hand-calculator numerical examples) for parallel computing purposes. The materials from this book have been evolved over the past several years through the author's research work, and graduate courses.

Derived from industry-training classes that the author teaches at the Embedded Systems Institute at Eindhoven, the Netherlands and at Buskerud University College at Kongsberg in Norway, Systems Architecting: A Business Perspective places the processes of systems architecting in a broader context by juxtaposing the relationship of the systems architect with enterprise and management. This practical, scenario-driven guide fills an important gap, providing systems architects insight into the business processes, and especially into the processes to which they actively contribute.

The book uses a simple reference model to enable understanding of the inside of a system in relation to its context. It covers the impact of tool selection and brings balance to the application of the intellectual tools versus computer-aided tools. Stressing the importance of a clear strategy, the authors discuss methods and techniques that facilitate the architect's contribution to the strategy process. They also give insight into the needs and complications of harvesting synergy, insight that will help establish an effective synergy-harvesting strategy. The book also explores the often difficult relationship between managers and systems architects.

Written in an approachable style, the book discusses the breadth of the human sciences and their relevance to systems architecting. It highlights the relevance of human aspects to systems architects, linking theory to practical experience when developing systems architecting competence.

Hugo de Man Professor Katholieke Universiteit Leuven Senior Research Fellow IMEC The steady evolution of hardware, software and communications technology is rapidly transforming the PC- and dot.com world into the world of Ambient Intelligence (AmI). This next wave of information technology is fundam- tally different in that it makes distributed wired and wireless computing and communication disappear to the background and puts users to the foreground. AmI adapts to people instead of the other way around. It will augment our consciousness, monitor our health and security, guide us through traffic etc. In short, its ultimate goal is to improve the quality of our life by a quiet, reliable and secure interaction with our social and material environment. What makes AmI engineering so fascinating is that its design starts from studying person to world interactions that need to be implemented as an int- ligent and autonomous interplay of virtually all necessary networked electronic intelligence on the globe. This is a new and exciting dimension for most elect- cal and software engineers and may attract more creative talent to engineering than pure technology does. Development of the leading technology for AmI will only succeed if the engineering research community is prepared to join forces in order to make Mark Weiser's dream of 1991 come true. This will not be business as usual by just doubling transistor count or clock speed in a microprocessor or increasing the bandwidth of communication.

Natural Language Processing and Text Mining not only discusses applications of Natural Language Processing techniques to certain Text Mining tasks, but also the converse, the use of Text Mining to assist NLP. It assembles a diverse views from internationally recognized researchers and emphasizes caveats in the attempt to apply Natural Language Processing to text mining. This state-of-the-art survey is a must-have for advanced students, professionals, and researchers.

This book offers a comprehensive presentation of some of the most successful and popular domain decomposition preconditioners for finite and spectral element approximations of partial differential equations. It places strong emphasis on both algorithmic and mathematical aspects. It covers in detail important methods such as FETI and balancing Neumann-Neumann methods and algorithms for spectral element methods.

To the hard-pressed systems designer this book will come as a godsend. It is a hands-on guide to the many ways in which processor-based systems are designed to allow low power devices. Covering a huge range of topics, and co-authored by some of the field 's top practitioners, the book provides a good starting point for engineers in the area, and to research students embarking upon work on embedded systems and architectures.

OpenMP is an application programming interface (API) that is widely accepted as a de facto standard for high-level shared-memory parallel programming. It is a portable, scalable programming model that provides a simple and ?exible interface for developing shared-memory parallel applications in Fortran, C, and C++. Since its introduction in 1997, OpenMP has gained support from the - jority of high-performance compiler and hardware vendors. Under the direction of the OpenMP Architecture Review Board (ARB), the OpenMP speci?cation is undergoing further improvement. Active research in OpenMP compilers, r- time systems, tools, and environments continues to drive OpenMP evolution.To provideaforumforthedisseminationandexchangeofinformationaboutand- periences with OpenMP, the community of OpenMP researchersand developers in academia and industry is organized under cOMPunity (www.compunity.org). This organization has held workshops on OpenMP since 1999. This book contains the proceedings of the 5th International Workshop on OpenMP held in Dresden in June 2009. With sessions on tools, benchmarks, applications, performance and runtime environments it covered all aspects of the current use of OpenMP. In addition, several contributions presented p- posed extensions to OpenMP and evaluated reference implementations of those extensions. An invited talk provided the details on the latest speci?cation dev- opment inside the Architecture Review Board. Together with the two keynotes about OpenMP on hardware accelerators and future generation processors it demonstrated that OpenMP is suitable for future generation systems.

Analyzing how hacks are done, so as to stop them in the future Reverse engineering is the process of analyzing hardware or software and understanding it, without having access to the source code or design documents. Hackers are able to reverse engineer systems and exploit what they find with scary results. Now the good guys can use the same tools to thwart these threats. Practical Reverse Engineering goes under the hood of reverse engineering for security analysts, security engineers, and system programmers, so they can learn how to use these same processes to stop hackers in their tracks. The book covers x86, x64, and ARM (the first book to cover all three); Windows kernel-mode code rootkits and drivers; virtual machine protection techniques; and much more. Best of all, it offers a systematic approach to the material, with plenty of hands-on exercises and real-world examples. * Offers a systematic approach to understanding reverse engineering, with hands-on exercises and real-world examples * Covers x86, x64, and advanced RISC machine (ARM) architectures as well as deobfuscation and virtual machine protection techniques * Provides special coverage of Windows kernel-mode code (rootkits/drivers), a topic not often covered elsewhere, and explains how to analyze drivers step by step * Demystifies topics that have a steep learning curve * Includes a bonus chapter on reverse engineering tools Practical Reverse Engineering: Using x86, x64, ARM, Windows Kernel, and Reversing Tools provides crucial, up-to-date guidance for a broad range of IT professionals.

Recon?gurable computing (RC) systems have generated considerable interest in the embedded and high-performance computing communities over the past two decades, with ?eld programmable gate arrays (FPGAs) as the leading techn- ogy at the helm of innovation in this discipline. Achieving orders of magnitude performance and power improvements using FPGAs over traditional microp- cessorsis not uncommon for well-suitedapplications. But even with two decades of research and technological advances, FPGA design still presents a subst- tial challenge and often necessitates hardware design expertise to exploit its true potential. Although the challenges to address the design productivity - sues are steep, the promise and the potential of the RC technology in terms of performance, power, size, and versatility continue to attract application design engineers and RC researchers alike. The International Symposium on Applied Recon?gurable Computing (ARC) aims to bring together researchers and practitioners of RC systems with an emphasis on practical applications and design methodologies of this promising technology. This year's ARC symposium (The sixth ARC symposium) was held in Bangkok, Thailand during March 17-19, 2010, and attracted papers in three primary focus areas:RC applications, RC architectures, and RC design meth- ologies.

The Second International Conference on High-Performance Computing and Appli- tions (HPCA 2009) was a follow-up event of the successful HPCA 2004. It was held in Shanghai, a beautiful, active, and modern city in China, August 10-12, 2009. It served as a forum to present current work by researchers and software developers from around the world as well as to highlight activities in the high-performance c- puting area. It aimed to bring together research scientists, application pioneers, and software developers to discuss problems and solutions and to identify new issues in this area. This conference emphasized the development and study of novel approaches for high-performance computing, the design and analysis of high-performance - merical algorithms, and their scientific, engineering, and industrial applications. It offered the conference participants a great opportunity to exchange the latest research results, heighten international collaboration, and discuss future research ideas in HPCA. In addition to 24 invited presentations, the conference received over 300 contr- uted submissions from over ten countries and regions worldwide, about 70 of which were accepted for presentation at HPCA 2009. The conference proceedings contain some of the invited presentations and contributed submissions, and cover such research areas of interest as numerical algorithms and solutions, high-performance and grid c- puting, novel approaches to high-performance computing, massive data storage and processing, hardware acceleration, and their wide applications.

We are surrounded by noise; we must be able to separate the signals we want to hear from those we do not. To overcome this 'cocktail party effect' we have developed various strategies; endowing computers with similar abilities would enable the development of devices such as intelligent hearing aids and robust speech recognition systems. This book describes a system which attempts to separate multiple, simultaneous acoustic sources using strategies based on those used by humans. It is both a review of recent work on the modelling of auditory processes, and a presentation of a new model in which acoustic signals are decomposed into elements. These structures are then re-assembled in accordance with rules of auditory organisation which operate to bind together elements that are likely to have arisen from the same source. The model is evaluated by measuring its ability to separate speech from a wide variety of other sounds, including music, phones and other speech.

Going beyond isolated research ideas and design experiences, Designing Network On-Chip Architectures in the Nanoscale Era covers the foundations and design methods of network on-chip (NoC) technology. The contributors draw on their own lessons learned to provide strong practical guidance on various design issues. Exploring the design process of the network, the first part of the book focuses on basic aspects of switch architecture and design, topology selection, and routing implementation. In the second part, contributors discuss their experiences in the industry, offering a roadmap to recent products. They describe Tilera's TILE family of multicore processors, novel Intel products and research prototypes, and the TRIPS operand network (OPN). The last part reveals state-of-the-art solutions to hardware-related issues and explains how to efficiently implement the programming model at the network interface. In the appendix, the microarchitectural details of two switch architectures targeting multiprocessor system-on-chips (MPSoCs) and chip multiprocessors (CMPs) can be used as an experimental platform for running tests. A stepping stone to the evolution of future chip architectures, this volume provides a how-to guide for designers of current NoCs as well as designers involved with 2015 computing platforms. It cohesively brings together fundamental design issues, alternative design paradigms and techniques, and the main design tradeoffs-consistently focusing on topics most pertinent to real-world NoC designers.

Safety-critical systems, by definition those systems whose failure can cause catastrophic results for people, the environment, and the economy, are becoming increasingly complex both in their functionality and their interactions with the environment. Unfortunately, safety assessments are still largely done manually, a time-consuming and error-prone process. The growing complexity of these systems requires an increase in the skill and efficacy of safety engineers and encourages the adoption of formal and standardized techniques.

An introduction to the area of design and verification of safety-critical systems, Design and Safety Assessment of Critical Systems focuses on safety assessment using formal methods. Beginning with an introduction to the fundamental concepts of safety and reliability, it illustrates the pivotal issues of design, development, and safety assessment of critical systems.

The core of the book covers traditional notations, techniques, and procedures, including Fault Tree Analysis, FMECA, HAZOP, and Event Tree Analysis, and explains in detail how formal methods can be used to realize such procedures. It looks at the development process of safety-critical systems, and highlights influential management and organizational aspects. Finally, it describes verification and validation techniques and new trends in formal methods for safety and concludes with some widely adopted standards for the certification of safety-critical systems.

Providing an in-depth and hands-on view of the application of formal techniques to advanced and critical safety assessments in a variety of industrial sectors, such as transportation, avionics and aerospace, and nuclear power, Design and Safety Assessment of Critical Systems allows anyone with a basic background in mathematics or computer science to move confidently into this advanced arena of safety assessment.

In view of the incessant growth of data and knowledge and the continued diversifi- tion of information dissemination on a global scale, scalability has become a ma- stream research area in computer science and information systems. The ICST INFO- SCALE conference is one of the premier forums for presenting new and exciting research related to all aspects of scalability, including system architecture, resource management, data management, networking, and performance. As the fourth conf- ence in the series, INFOSCALE 2009 was held in Hong Kong on June 10 and 11, 2009. The articles presented in this volume focus on a wide range of scalability issues and new approaches to tackle problems arising from the ever-growing size and c- plexity of information of all kind. More than 60 manuscripts were submitted, and the Program Committee selected 22 papers for presentation at the conference. Each s- mission was reviewed by three members of the Technical Program Committee.