Physical Layer Multi-Core Prototyping - A Dataflow-Based Approach for LTE eNodeB (Paperback, 2013 ed.)

Base stations developed according to the 3GPP Long Term Evolution (LTE) standard require unprecedented processing power. 3GPP LTE enables data rates beyond hundreds of Mbits/s by using advanced technologies, necessitating a highly complex LTE physical layer. The operating power of base stations is a significant cost for operators, and is currently optimized using state-of-the-art hardware solutions, such as heterogeneous distributed systems. The traditional system design method of porting algorithms to heterogeneous distributed systems based on test-and-refine methods is a manual, thus time-expensive, task. Physical Layer Multi-Core Prototyping: A Dataflow-Based Approach provides a clear introduction to the 3GPP LTE physical layer and to dataflow-based prototyping and programming. The difficulties in the process of 3GPP LTE physical layer porting are outlined, with particular focus on automatic partitioning and scheduling, load balancing and computation latency reduction, specifically in systems based on heterogeneous multi-core Digital Signal Processors. Multi-core prototyping methods based on algorithm dataflow modeling and architecture system-level modeling are assessed with the goal of automating and optimizing algorithm porting. With its analysis of physical layer processing and proposals of parallel programming methods, which include automatic partitioning and scheduling, Physical Layer Multi-Core Prototyping: A Dataflow-Based Approach is a key resource for researchers and students. This study of LTE algorithms which require dynamic or static assignment and dynamic or static scheduling, allows readers to reassess and expand their knowledge of this vital component of LTE base station design.

General

Imprint:	Springer London
Country of origin:	United Kingdom
Series:	Lecture Notes in Electrical Engineering, 171
Release date:	September 2014
First published:	2013
Authors:	Maxime Pelcat • Slaheddine Aridhi • Jonathan Piat • Jean-Francois Nezan
Dimensions:	235 x 155 x 12mm (L x W x T)
Format:	Paperback
Pages:	212
Edition:	2013 ed.
ISBN-13:	978-1-4471-6105-9
Categories:	Books > Computing & IT > Computer programming > Software engineering Books > Professional & Technical > Technology: general issues > Technical design > General Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components Books > Professional & Technical > Electronics & communications engineering > Communications engineering / telecommunications > General Promotions
LSN:	1-4471-6105-X
Barcode:	9781447161059

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