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This book focusses on the spacer engineering aspects of novel
MOS-based device-circuit co-design in sub-20nm technology node, its
process complexity, variability, and reliability issues. It
comprehensively explores the FinFET/tri-gate architectures with
their circuit/SRAM suitability and tolerance to random statistical
variations.
This book focusses on the spacer engineering aspects of novel
MOS-based device-circuit co-design in sub-20nm technology node, its
process complexity, variability, and reliability issues. It
comprehensively explores the FinFET/tri-gate architectures with
their circuit/SRAM suitability and tolerance to random statistical
variations.
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VLSI Design and Test - 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers (Paperback, 1st ed. 2017)
Brajesh Kumar Kaushik, Sudeb Dasgupta, Virendra Singh
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R3,129
Discovery Miles 31 290
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Ships in 10 - 15 working days
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This book constitutes the refereed proceedings of the 21st
International Symposium on VLSI Design and Test, VDAT 2017, held in
Roorkee, India, in June/July 2017. The 48 full papers presented
together with 27 short papers were carefully reviewed and selected
from 246 submissions. The papers were organized in topical sections
named: digital design; analog/mixed signal; VLSI testing; devices
and technology; VLSI architectures; emerging technologies and
memory; system design; low power design and test; RF circuits;
architecture and CAD; and design verification.
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VLSI Design and Test - 26th International Symposium, VDAT 2022, Jammu, India, July 17-19, 2022, Revised Selected Papers (Paperback, 1st ed. 2022)
Ambika Prasad Shah, Sudeb Dasgupta, Anand Darji, Jaynarayan Tudu
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R3,059
Discovery Miles 30 590
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Ships in 10 - 15 working days
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This book constitutes the proceedings of the 26th International
Symposium on VLSI Design and Test, VDAT 2022, which took place in
Jammu, India, in July 2022. The 32 regular papers and 16 short
papers presented in this volume were carefully reviewed and
selected from 220 submissions. They were organized in topical
sections as follows: Devices and Technology; Sensors; Analog/Mixed
Signal; Digital Design; Emerging Technologies and Memory; System
Design.
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VLSI Design and Test - 23rd International Symposium, VDAT 2019, Indore, India, July 4-6, 2019, Revised Selected Papers (Paperback, 1st ed. 2019)
Anirban Sengupta, Sudeb Dasgupta, Virendra Singh, Rohit Sharma, Santosh Kumar Vishvakarma
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R3,369
Discovery Miles 33 690
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Ships in 10 - 15 working days
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This book constitutes the refereed proceedings of the 23st
International Symposium on VLSI Design and Test, VDAT 2019, held in
Indore, India, in July 2019. The 63 full papers were carefully
reviewed and selected from 199 submissions. The papers are
organized in topical sections named: analog and mixed signal
design; computing architecture and security; hardware design and
optimization; low power VLSI and memory design; device modelling;
and hardware implementation.
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