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Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design
This book introduces a new level of abstraction that closes the gap between the textual specification of embedded systems and the executable model at the Electronic System Level (ESL). Readers will be enabled to operate at this new, Formal Specification Level (FSL), using models which not only allow significant verification tasks in this early stage of the design flow, but also can be extracted semi-automatically from the textual specification in an interactive manner. The authors explain how to use these verification tasks to check conceptual properties, e.g. whether requirements are in conflict, as well as dynamic behavior, in terms of execution traces.
Takes a fresh look at basic digital design. From definition, to example, to graphic illustration, to simulation result, the book progresses through the main themes of digital design. Technically up-to-date, this book covers all the latest topics: Field programmable gate arrays, PALs and ROMs. The latest memory chips for SRAM and DRAM are shown. Software for creating the excitation equations of FSM are covered, as well as LogicWorks and Beige Bag PC and more.
"Modern Compiler Design" makes the topic of compiler design more accessible by focusing on principles and techniques of wide application. By carefully distinguishing between the essential (material that has a high chance of being useful) and the incidental (material that will be of benefit only in exceptional cases) much useful information was packed in this comprehensive volume. The student who has finished this book can expect to understand the workings of and add to a language processor for each of the modern paradigms, and be able to read the literature on how to proceed. The first provides a firm basis, the second potential for growth.
This book is a comprehensive guide to assertion-based verification of hardware designs using System Verilog Assertions (SVA). It enables readers to minimize the cost of verification by using assertion-based techniques in simulation testing, coverage collection and formal analysis. The book provides detailed descriptions of all the language features of SVA, accompanied by step-by-step examples of how to employ them to construct powerful and reusable sets of properties. The book also shows how SVA fits into the broader System Verilog language, demonstrating the ways that assertions can interact with other System Verilog components. The reader new to hardware verification will benefit from general material describing the nature of design models and behaviors, how they are exercised, and the different roles that assertions play. This second edition covers the features introduced by the recent IEEE 1800-2012. System Verilog standard, explaining in detail the new and enhanced assertion constructs. The book makes SVA usable and accessible for hardware designers, verification engineers, formal verification specialists and EDA tool developers. With numerous exercises, ranging in depth and difficulty, the book is also suitable as a text for students.
Unique selling point: * This book proposes several approaches for dynamic Android malware detection based on system calls which do not have the limitations of existing mechanisms. * This book will be useful for researchers, students, developers and security analysts to know how malware behavior represented in the form of system call graphs can effectively detect Android malware. * The malware detection mechanisms in this book can be integrated with commercial antivirus softwares to detect Android malware including obfuscated variants.
The book addresses the need to investigate new approaches to lower energy requirement in multiple application areas and serves as a guide into emerging circuit technologies. It explores revolutionary device concepts, sensors, and associated circuits and architectures that will greatly extend the practical engineering limits of energy-efficient computation. The book responds to the need to develop disruptive new system architectures and semiconductor processes aimed at achieving the highest level of computational energy efficiency for general purpose computing systems. Discusses unique technologies and material only available in specialized journal and conferences. Covers emerging materials and device structures, such as ultra-low power technologies, nanoelectronics, and microsystem manufacturing. Explores semiconductor processing and manufacturing, device design, and performance. Contains practical applications in the engineering field, as well as graduate studies. Written by international experts from both academia and industry.
High-Performance Computing using FPGA covers the area of high performance reconfigurable computing (HPRC). This book provides an overview of architectures, tools and applications for High-Performance Reconfigurable Computing (HPRC). FPGAs offer very high I/O bandwidth and fine-grained, custom and flexible parallelism and with the ever-increasing computational needs coupled with the frequency/power wall, the increasing maturity and capabilities of FPGAs, and the advent of multicore processors which has caused the acceptance of parallel computational models. The Part on architectures will introduce different FPGA-based HPC platforms: attached co-processor HPRC architectures such as the CHREC's Novo-G and EPCC's Maxwell systems; tightly coupled HRPC architectures, e.g. the Convey hybrid-core computer; reconfigurably networked HPRC architectures, e.g. the QPACE system, and standalone HPRC architectures such as EPFL's CONFETTI system. The Part on Tools will focus on high-level programming approaches for HPRC, with chapters on C-to-Gate tools (such as Impulse-C, AutoESL, Handel-C, MORA-C++); Graphical tools (MATLAB-Simulink, NI LabVIEW); Domain-specific languages, languages for heterogeneous computing(for example OpenCL, Microsoft's Kiwi and Alchemy projects). The part on Applications will present case from several application domains where HPRC has been used successfully, such as Bioinformatics and Computational Biology; Financial Computing; Stencil computations; Information retrieval; Lattice QCD; Astrophysics simulations; Weather and climate modeling.
This book provides an overview of modern boot firmware, including the Unified Extensible Firmware Interface (UEFI) and its associated EFI Developer Kit II (EDKII) firmware. The authors have each made significant contributions to developments in these areas. The reader will learn to use the latest developments in UEFI on modern hardware, including open source firmware and open hardware designs. The book begins with an exploration of interfaces exposed to higher-level software and operating systems, and commences to the left of the boot timeline, describing the flow of typical systems, beginning with the machine restart event. Software engineers working with UEFI will benefit greatly from this book, while specific sections of the book address topics relevant for a general audience: system architects, pre-operating-system application developers, operating system vendors (loader, kernel), independent hardware vendors (such as for plug-in adapters), and developers of end-user applications. As a secondary audience, project technical leaders or managers may be interested in this book to get a feel for what their engineers are doing. The reader will find: An overview of UEFI and underlying Platform Initialization (PI) specifications How to create UEFI applications and drivers Workflow to design the firmware solution for a modern platform Advanced usages of UEFI firmware for security and manageability
This book covers layout design and layout migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects. Scaling-dependent models for interconnect power, interconnect delay and crosstalk noise are covered in depth, and several design optimization problems are addressed, such as minimization of interconnect power under delay constraints, or design for minimal delay in wire bundles within a given routing area. A handy reference or a guide for design methodologies and layout automation techniques, this book provides a foundation for physical design challenges of interconnect in advanced integrated circuits.
This four volume set of books constitutes the proceedings of the 36th International Conference Information Systems Architecture and Technology 2015, or ISAT 2015 for short, held on September 20-22, 2015 in Karpacz, Poland. The conference was organized by the Computer Science and Management Systems Departments, Faculty of Computer Science and Management, Wroclaw University of Technology, Poland. The papers included in the proceedings have been subject to a thorough review process by highly qualified peer reviewers. The accepted papers have been grouped into four parts: Part I-addressing topics including, but not limited to, systems analysis and modeling, methods for managing complex planning environment and insights from Big Data research projects. Part II-discoursing about topics including, but not limited to, Web systems, computer networks, distributed computing, and multi-agent systems and Internet of Things. Part III-discussing topics including, but not limited to, mobile and Service Oriented Architecture systems, high performance computing, cloud computing, knowledge discovery, data mining and knowledge based management. Part IV-dealing with topics including, but not limited to, finance, logistics and market problems, and artificial intelligence methods.
This four volume set of books constitutes the proceedings of the 36th International Conference Information Systems Architecture and Technology 2015, or ISAT 2015 for short, held on September 20-22, 2015 in Karpacz, Poland. The conference was organized by the Computer Science and Management Systems Departments, Faculty of Computer Science and Management, Wroclaw University of Technology, Poland. The papers included in the proceedings have been subject to a thorough review process by highly qualified peer reviewers. The accepted papers have been grouped into four parts: Part I-addressing topics including, but not limited to, systems analysis and modeling, methods for managing complex planning environment and insights from Big Data research projects. Part II-discoursing about topics including, but not limited to, Web systems, computer networks, distributed computing, and multi-agent systems and Internet of Things. Part III-discussing topics including, but not limited to, mobile and Service Oriented Architecture systems, high performance computing, cloud computing, knowledge discovery, data mining and knowledge based management. Part IV-dealing with topics including, but not limited to, finance, logistics and market problems, and artificial intelligence methods.
With 26 entirely new and 5 extensively revised chapters out of the total of 39, the Mobile Communications Handbook, Third Edition presents an in-depth and up-to-date overview of the full range of wireless and mobile technologies that we rely on every day. This includes, but is not limited to, everything from digital cellular mobile radio and evolving personal communication systems to wireless data and wireless networks Illustrating the extraordinary evolution of wireless communications and networks in the last 15 years, this book is divided into five sections: Basic Principles provides the essential underpinnings for the wide-ranging mobile communication technologies currently in use throughout the world. Wireless Standards contains technical details of the standards we use every day, as well as insights into their development. Source Compression and Quality Assessment covers the compression techniques used to represent voice and video for transmission over mobile communications systems as well as how the delivered voice and video quality are assessed. Wireless Networks examines the wide range of current and developing wireless networks and wireless methodologies. Emerging Applications explores newly developed areas of vehicular communications and 60 GHz wireless communications. Written by experts from industry and academia, this book provides a succinct overview of each topic, quickly bringing the reader up to date, but with sufficient detail and references to enable deeper investigations. Providing much more than a "just the facts" presentation, contributors use their experience in the field to provide insights into how each topic has emerged and to point toward forthcoming developments in mobile communications.
This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary "User Constraints File". The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students and professionals engaged in the domain of FPGA circuit optimization and implementation.
A Comprehensive Study of SQL - Practice and Implementation is designed as a textbook and provides a comprehensive approach to SQL (Structured Query Language), the standard programming language for defining, organizing, and exploring data in relational databases. It demonstrates how to leverage the two most vital tools for data query and analysis - SQL and Excel - to perform comprehensive data analysis without the need for a sophisticated and expensive data mining tool or application. Features The book provides a complete collection of modeling techniques, beginning with fundamentals and gradually progressing through increasingly complex real-world case studies It explains how to build, populate, and administer high-performance databases and develop robust SQL-based applications It also gives a solid foundation in best practices and relational theory The book offers self-contained lessons on key SQL concepts or techniques at the end of each chapter using numerous illustrations and annotated examples This book is aimed primarily at advanced undergraduates and graduates with a background in computer science and information technology. Researchers and professionals will also find this book useful.
Aimed at electronics industry professionals, this 4th edition of the Boundary Scan Handbook describes recent changes to the IEEE1149.1 Standard Test Access Port and Boundary-Scan Architecture. This updated edition features new chapters on the possible effects of the changes on the work of the practicing test engineers and the new 1149.8.1 standard. Anyone needing to understand the basics of boundary scan and its practical industrial implementation will need this book. Provides an overview of the recent changes to the 1149.1 standard and the effect of the changes on the work of test engineers; Explains the new IEEE 1149.8.1 subsidiary standard and applications; Describes the latest updates on the supplementary IEEE testing standards. In particular, addresses: IEEE Std 1149.1 Digital Boundary-ScanIEEE Std 1149.4 Analog Boundary-ScanIEEE Std 1149.6 Advanced I/O TestingIEEE Std 1149.8.1 Passive Component TestingIEEE Std 1149.1-2013 The 2013 Revision of 1149.1IEEE Std 1532 In-System ConfigurationIEEE Std 1149.6-2015 The 2015 Revision of 1149.6
Teaches you exactly how program memory content and organization is vital for computer security, especially Unix-like operating systems. You will learn how it is manipulated to take control of a computer system, as well as the countermeasures that system designers set up to avoid this. Neither a guide for hackers nor an all-out theory book, this book is ideal for anyone studying computer security who wants to learn by doing. Using a practical approach, you will understand how stack frames relate to hardware and software theory and the various GNU/Linux distributions, before moving on to Base 2, 8 and 16 notations, executables and libraries. Lastly you will go in-depth to understand the intricacies of stack frames. A vital resource for all computer security students and enthusiasts, add Stack Frames: A Look Inside to your library today. What You Will Learn In-depth knowledge on activation records of functions, and how this information can be used. A better understanding on how conventions used by compilers work. Clarify some concepts on libraries and their relationship with executable programs. Get, or recall, technical skills using compilers, debuggers, and other tools. Who This Book Is For The book is suitable for college students with a good knowledge of the C language, who are interested in deepening their study of the content and organization of program memory, namely the activation records of functions, as regards possible implications in computer security. A basic knowledge of both the Assembly language and the UNIX operating system is certainly helpful, as well as some practice with compilers and debuggers; but they are not compulsory.
This book constitutes the refereed proceedings of the Joint 21st International Workshop on Formal Methods for Industrial Critical Systems and the 16th International Workshop on Automated Verification of Critical Systems, FMICS-AVoCS 2016, held in Pisa, Italy, in September 2016.The 11 full papers and 4 short papers presented together with one invited talk were carefully reviewed and selected from 24 submissions. They are organized in the following sections: automated verification techniques; model-based system analysis; and applications and case studies.
This book presents an in-depth description of the Arrowhead Framework and how it fosters interoperability between IoT devices at service level, specifically addressing application. The Arrowhead Framework utilizes SOA technology and the concepts of local clouds to provide required automation capabilities such as: real time control, security, scalability, and engineering simplicity. Arrowhead Framework supports the realization of collaborative automation; it is the only IoT Framework that addresses global interoperability across multiplet SOA technologies. With these features, the Arrowhead Framework enables the design, engineering, and operation of large automation systems for a wide range of applications utilizing IoT and CPS technologies. The book provides application examples from a wide number of industrial fields e.g. airline maintenance, mining maintenance, smart production, electro-mobility, automative test, smart cities-all in response to EU societal challenges. Features Covers the design and implementation of IoT based automation systems. Industrial usage of Internet of Things and Cyber Physical Systems made feasible through Arrowhead Framework. Functions as a design cookbook for building automation systems using IoT/CPS and Arrowhead Framework. Tools, templates, code etc. described in the book will be accessible through open sources project Arrowhead Framework Wiki at forge.soa4d.org/ Written by the leading experts in the European Union and around the globe.
This must-read text presents the pioneering work of the late Professor Jacob (Jack) T. Schwartz on computational logic and set theory and its application to proof verification techniques, culminating in the AEtnaNova system, a prototype computer program designed to verify the correctness of mathematical proofs presented in the language of set theory. Topics and features: describes in depth how a specific first-order theory can be exploited to model and carry out reasoning in branches of computer science and mathematics; presents an unique system for automated proof verification in large-scale software systems; integrates important proof-engineering issues, reflecting the goals of large-scale verifiers; includes an appendix showing formalized proofs of ordinals, of various properties of the transitive closure operation, of finite and transfinite induction principles, and of Zorn's lemma."
This book describes scalable and near-optimal, processor-level design space exploration (DSE) methodologies. The authors present design methodologies for data storage and processing in real-time, cost-sensitive data-dominated embedded systems. Readers will be enabled to reduce time-to-market, while satisfying system requirements for performance, area, and energy consumption, thereby minimizing the overall cost of the final design.
This book provides a systematic and unified methodology, including basic principles and reusable processes, for dynamic memory management (DMM) in embedded systems. The authors describe in detail how to design and optimize the use of dynamic memory in modern, multimedia and network applications, targeting the latest generation of portable embedded systems, such as smartphones. Coverage includes a variety of design and optimization topics in electronic design automation of DMM, from high-level software optimization to microarchitecture-level hardware support. The authors describe the design of multi-layer dynamic data structures for the final memory hierarchy layers of the target portable embedded systems and how to create a low-fragmentation, cost-efficient, dynamic memory management subsystem out of configurable components for the particular memory allocation and de-allocation patterns for each type of application. The design methodology described in this book is based on propagating constraints among design decisions from multiple abstraction levels (both hardware and software) and customizing DMM according to application-specific data access and storage behaviors.
This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.
This book describes how engineers can make optimum use of the two industry standard analysis/design tools, SystemC and SystemC-AMS. The authors use a system-level design approach, emphasizing how SystemC and SystemC-AMS features can be exploited most effectively to analyze/understand a given electronic system and explore the design space. The approach taken by this book enables system engineers to concentrate on only those SystemC/SystemC-AMS features that apply to their particular problem, leading to more efficient design. The presentation includes numerous, realistic and complete examples, which are graded in levels of difficulty to illustrate how a variety of systems can be analyzed with these tools.
This book constitutes the refereed proceedings of the 22nd International Static Analysis Symposium, SAS 2015, held in Saint-Malo, France, in September 2015. The 18 papers presented in this volume were carefully reviewed and selected from 44 submissions. All fields of static analysis as a fundamental tool for program verification, bug detection, compiler optimization, program understanding, and software maintenance are addressed, featuring theoretical, practical, and application advances in the area
This book provides a comprehensive overview of automatic model refinement, which helps readers close the gap between initial textual specification and its desired implementation. The authors enable readers to follow two "directions" for refinement: Vertical refinement, for adding detail and precision to single description for a given model and Horizontal refinement, which considers several views on one level of abstraction, refining the system specification by dedicated descriptions for structure or behavior. The discussion includes several methods which support designers of electronic systems in this refinement process, including verification methods to check automatically whether a refinement has been conducted as intended. |
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