This volume shows how ICT (information and communications technology) can play the role of a driver of business process reengineering (BPR). ICT can aid in enabling improvement in BPR activity cycles as it provides many components that enhance performance that can lead to competitive advantages. IT can interface with BPR to improve business processes in terms of communication, inventory management, data management, management information systems, customer relationship management, computer-aided design, computer-aided manufacturing (CAM), and computer-aided engineering. This volume explores these issues in depth.

Contemporary High Performance Computing: From Petascale toward Exascale, Volume 3 focuses on the ecosystems surrounding the world's leading centers for high performance computing (HPC). It covers many of the important factors involved in each ecosystem: computer architectures, software, applications, facilities, and sponsors. This third volume will be a continuation of the two previous volumes, and will include other HPC ecosystems using the same chapter outline: description of a flagship system, major application workloads, facilities, and sponsors. Features: Describes many prominent, international systems in HPC from 2015 through 2017 including each system's hardware and software architecture Covers facilities for each system including power and cooling Presents application workloads for each site Discusses historic and projected trends in technology and applications Includes contributions from leading experts Designed for researchers and students in high performance computing, computational science, and related areas, this book provides a valuable guide to the state-of-the art research, trends, and resources in the world of HPC.

High-Performance Computing using FPGA covers the area of high performance reconfigurable computing (HPRC). This book provides an overview of architectures, tools and applications for High-Performance Reconfigurable Computing (HPRC). FPGAs offer very high I/O bandwidth and fine-grained, custom and flexible parallelism and with the ever-increasing computational needs coupled with the frequency/power wall, the increasing maturity and capabilities of FPGAs, and the advent of multicore processors which has caused the acceptance of parallel computational models. The Part on architectures will introduce different FPGA-based HPC platforms: attached co-processor HPRC architectures such as the CHREC's Novo-G and EPCC's Maxwell systems; tightly coupled HRPC architectures, e.g. the Convey hybrid-core computer; reconfigurably networked HPRC architectures, e.g. the QPACE system, and standalone HPRC architectures such as EPFL's CONFETTI system. The Part on Tools will focus on high-level programming approaches for HPRC, with chapters on C-to-Gate tools (such as Impulse-C, AutoESL, Handel-C, MORA-C++); Graphical tools (MATLAB-Simulink, NI LabVIEW); Domain-specific languages, languages for heterogeneous computing(for example OpenCL, Microsoft's Kiwi and Alchemy projects). The part on Applications will present case from several application domains where HPRC has been used successfully, such as Bioinformatics and Computational Biology; Financial Computing; Stencil computations; Information retrieval; Lattice QCD; Astrophysics simulations; Weather and climate modeling.

This book covers layout design and layout migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects. Scaling-dependent models for interconnect power, interconnect delay and crosstalk noise are covered in depth, and several design optimization problems are addressed, such as minimization of interconnect power under delay constraints, or design for minimal delay in wire bundles within a given routing area. A handy reference or a guide for design methodologies and layout automation techniques, this book provides a foundation for physical design challenges of interconnect in advanced integrated circuits.

Thomas Ludwig reveals design characteristics when aiming at researching information infrastructures and their diverse information resources, types of users and systems as well as divergent practices. By conducting empirically-based design case studies in the domain of crisis management, the author uncovers methodological and design challenges in understanding new kinds of interconnected information infrastructures from a praxeological perspective. Based on implemented novel ICT tools, he derives design characteristics that focus on integrating objective and subjective queried insights into situated activities of people as well as emphasizing the subjective nature of information quality.

* Targests readers with a background in programming, interested in an introduction/refresher in statistical hypothesis testing * Uses Python throughout * Provides the reader with the opportunity of using the book whenever needed rather than following a sequential path.

This four volume set of books constitutes the proceedings of the 36th International Conference Information Systems Architecture and Technology 2015, or ISAT 2015 for short, held on September 20-22, 2015 in Karpacz, Poland. The conference was organized by the Computer Science and Management Systems Departments, Faculty of Computer Science and Management, Wroclaw University of Technology, Poland. The papers included in the proceedings have been subject to a thorough review process by highly qualified peer reviewers. The accepted papers have been grouped into four parts: Part I-addressing topics including, but not limited to, systems analysis and modeling, methods for managing complex planning environment and insights from Big Data research projects. Part II-discoursing about topics including, but not limited to, Web systems, computer networks, distributed computing, and multi-agent systems and Internet of Things. Part III-discussing topics including, but not limited to, mobile and Service Oriented Architecture systems, high performance computing, cloud computing, knowledge discovery, data mining and knowledge based management. Part IV-dealing with topics including, but not limited to, finance, logistics and market problems, and artificial intelligence methods.

This four volume set of books constitutes the proceedings of the 36th International Conference Information Systems Architecture and Technology 2015, or ISAT 2015 for short, held on September 20-22, 2015 in Karpacz, Poland. The conference was organized by the Computer Science and Management Systems Departments, Faculty of Computer Science and Management, Wroclaw University of Technology, Poland. The papers included in the proceedings have been subject to a thorough review process by highly qualified peer reviewers. The accepted papers have been grouped into four parts: Part I-addressing topics including, but not limited to, systems analysis and modeling, methods for managing complex planning environment and insights from Big Data research projects. Part II-discoursing about topics including, but not limited to, Web systems, computer networks, distributed computing, and multi-agent systems and Internet of Things. Part III-discussing topics including, but not limited to, mobile and Service Oriented Architecture systems, high performance computing, cloud computing, knowledge discovery, data mining and knowledge based management. Part IV-dealing with topics including, but not limited to, finance, logistics and market problems, and artificial intelligence methods.

The papers in this volume are based on lectures given at the IMA workshop on the Parallel Solution of PDE during June 9-13, 1997. The numerical solution of partial differential equations has been of major importance to the development of many technologies and has been the target of much of the development of parallel computer hardware and software. Parallel computer offers the promise of greatly increased performance and the routine calculation of previously intractable problems.This volume contains papers on the development and assessment of new approximation and solution techniques that can take advantage of parallel computers. It will be of interest to applied mathematicians, computer scientists, and engineers concerned with investigating the state of the art and future directions in numerical computing.Topics include domain decomposition methods, parallel multi-grid methods, front tracking methods, sparse matrix techniques, adaptive methods, fictitious domain methods, and novel time and space discretizations. Applications discussed include fluid dynamics, radiative transfer, solid mechanics, and semiconductor simulation.

This book constitutes the thoroughly refereed proceedings of the 11th International Conference on Evaluation of Novel Approaches to Software Engineering, ENASE 2016, held in Rome, Italy, in April 2016. The 11 full papers presented were carefully reviewed and selected from 79 submissions. The mission of ENASE is to be a prime international forum to discuss and publish research findings and IT industry experiences with relation to the evaluation of novel approaches to software engineering. The conference acknowledges necessary changes in systems and software thinking due to contemporary shifts of computing paradigm to e-services, cloud computing, mobile connectivity, business processes, and societal participation.

This book provides a systematic and unified methodology, including basic principles and reusable processes, for dynamic memory management (DMM) in embedded systems. The authors describe in detail how to design and optimize the use of dynamic memory in modern, multimedia and network applications, targeting the latest generation of portable embedded systems, such as smartphones. Coverage includes a variety of design and optimization topics in electronic design automation of DMM, from high-level software optimization to microarchitecture-level hardware support. The authors describe the design of multi-layer dynamic data structures for the final memory hierarchy layers of the target portable embedded systems and how to create a low-fragmentation, cost-efficient, dynamic memory management subsystem out of configurable components for the particular memory allocation and de-allocation patterns for each type of application. The design methodology described in this book is based on propagating constraints among design decisions from multiple abstraction levels (both hardware and software) and customizing DMM according to application-specific data access and storage behaviors.

This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.

Parallel Computing Architectures and APIs: IoT Big Data Stream Processing commences from the point high-performance uniprocessors were becoming increasingly complex, expensive, and power-hungry. A basic trade-off exists between the use of one or a small number of such complex processors, at one extreme, and a moderate to very large number of simpler processors, at the other. When combined with a high-bandwidth, interprocessor communication facility leads to significant simplification of the design process. However, two major roadblocks prevent the widespread adoption of such moderately to massively parallel architectures: the interprocessor communication bottleneck, and the difficulty and high cost of algorithm/software development. One of the most important reasons for studying parallel computing architectures is to learn how to extract the best performance from parallel systems. Specifically, you must understand its architectures so that you will be able to exploit those architectures during programming via the standardized APIs. This book would be useful for analysts, designers and developers of high-throughput computing systems essential for big data stream processing emanating from IoT-driven cyber-physical systems (CPS). This pragmatic book: Devolves uniprocessors in terms of a ladder of abstractions to ascertain (say) performance characteristics at a particular level of abstraction Explains limitations of uniprocessor high performance because of Moore's Law Introduces basics of processors, networks and distributed systems Explains characteristics of parallel systems, parallel computing models and parallel algorithms Explains the three primary categorical representatives of parallel computing architectures, namely, shared memory, message passing and stream processing Introduces the three primary categorical representatives of parallel programming APIs, namely, OpenMP, MPI and CUDA Provides an overview of Internet of Things (IoT), wireless sensor networks (WSN), sensor data processing, Big Data and stream processing Provides introduction to 5G communications, Edge and Fog computing Parallel Computing Architectures and APIs: IoT Big Data Stream Processing discusses stream processing that enables the gathering, processing and analysis of high-volume, heterogeneous, continuous Internet of Things (IoT) big data streams, to extract insights and actionable results in real time. Application domains requiring data stream management include military, homeland security, sensor networks, financial applications, network management, web site performance tracking, real-time credit card fraud detection, etc.

This book offers readers broad coverage of techniques to model, verify and validate the behavior and performance of complex distributed embedded systems. The authors attempt to bridge the gap between the three disciplines of model-based design, real-time analysis and model-driven development, for a better understanding of the ways in which new development flows can be constructed, going from system-level modeling to the correct and predictable generation of a distributed implementation, leveraging current and future research results.

This book provides a comprehensive guide to the design of sustainable and green computing systems (GSC). Coverage includes important breakthroughs in various aspects of GSC, including multi-core architectures, interconnection technology, data centers, high performance computing (HPC), and sensor networks. The authors address the challenges of power efficiency and sustainability in various contexts, including system design, computer architecture, programming languages, compilers and networking.

This book describes how engineers can make optimum use of the two industry standard analysis/design tools, SystemC and SystemC-AMS. The authors use a system-level design approach, emphasizing how SystemC and SystemC-AMS features can be exploited most effectively to analyze/understand a given electronic system and explore the design space. The approach taken by this book enables system engineers to concentrate on only those SystemC/SystemC-AMS features that apply to their particular problem, leading to more efficient design. The presentation includes numerous, realistic and complete examples, which are graded in levels of difficulty to illustrate how a variety of systems can be analyzed with these tools.

• Showcases today's most influential architectural voices who have been instrumental in shifting the direction of design in the last decade • Includes perspectives of influential architects, practitioners and academics, as well as critics including philosophers • Case studies and essays engage and deploy a range of topics and technologies from speculative realism and Object Oriented Ontology to high computation, Big Data, parametricism, digital fabrication, artificial intelligence, augmented reality and virtual reality • A rigorous account of architecture's theoretical and technological concerns over the last decade

This book provides a comprehensive overview of automatic model refinement, which helps readers close the gap between initial textual specification and its desired implementation. The authors enable readers to follow two "directions" for refinement: Vertical refinement, for adding detail and precision to single description for a given model and Horizontal refinement, which considers several views on one level of abstraction, refining the system specification by dedicated descriptions for structure or behavior. The discussion includes several methods which support designers of electronic systems in this refinement process, including verification methods to check automatically whether a refinement has been conducted as intended.

TensorFlow is a one-stop solution for building, monitoring, optimizing,and deploying your models. This practical guide to building deep learning models with the new features of TensorFlow 2.0is filled with engaging projects, simple language, and coverage of the latest algorithms. TensorFlow 2.0 in Action teaches you to use the new features of TensorFlow 2.0 to create advanced deep learning models. You'll learn by building hands-on projects including an image classifier that can recognize objects, a French-to-English machine translator, and even a neural network that can write fiction. You'll dive into the details of modern deep learning techniques including both transformer and attention models, and learn how pretrained models can solve your tricky data science- problems. TensorFlow is the go-to framework for putting deep learning into production. Created by Google, this ground breaking tool handles repetitive low-level operations and frees you up to focus on innovating your AIs.TensorFlow encompasses almost every element of a deep learning pipeline-aone-stop solution for building, monitoring, optimizing, and deploying your models.

This book is intended for senior undergraduate and graduate students as well as practicing engineers who are involved in design and analysis of radio frequency (RF) circuits. Fully-solved, tutorial-like examples are used to put into practice all major topics required to understand the principles underlying the main sub-circuits required to design an RF transceiver and the whole communication system. Starting with review of principles in electromagnetic (EM) transmission and signal propagation, through detailed practical analysis of RF amplifier, mixer, modulator, demodulator, and oscillator circuit topologies, all the way to the system communication theory behind the RF transceiver operation, this book systematically covers all relevant aspects in a way that is suitable for a single semester university level course. Readers will benefit from the author's sharp focus on radio receiver design, demonstrated through hundreds of fully-solved, realistic examples, as opposed to texts that cover many aspects of electronics and electromagnetic without making the required connection to wireless communication circuit design.

Computer Architectures is a collection of multidisciplinary historical works unearthing sites, concepts, and concerns that catalyzed the cross-contamination of computers and architecture in the mid-20th century. Weaving together intellectual, social, cultural, and material histories, this book paints the landscape that brought computing into the imagination, production, and management of the built environment, whilst foregrounding the impact of architecture in shaping technological development. The book is organized into sections corresponding to the classic von Neumann diagram for computer architecture: program (control unit), storage (memory), input/output and computation (arithmetic/logic unit), each acting as a quasi-material category for parsing debates among architects, engineers, mathematicians, and technologists. Collectively, authors bring forth the striking homologies between a computer program and an architectural program, a wall and an interface, computer memory and storage architectures, structures of mathematics and structures of things. The collection initiates new histories of knowledge and technology production that turn an eye toward disciplinary fusions and their institutional and intellectual drives. Constructing the common ground between design and computing, this collection addresses audiences working at the nexus of design, technology, and society, including historians and practitioners of design and architecture, science and technology scholars, and media studies scholars.

This book constitutes the refereed proceedings of the 18th National Conference on Computer Engineering and Technology, NCCET 2014, held in Guiyang, China, during July/August 2014. The 18 papers presented were carefully reviewed and selected from 85 submissions. They are organized in topical sections on processor architecture; computer application and software optimization; technology on the horizon.

Using a unique pedagogical approach, this text introduces mathematical logic by guiding students in implementing the underlying logical concepts and mathematical proofs via Python programming. This approach, tailored to the unique intuitions and strengths of the ever-growing population of programming-savvy students, brings mathematical logic into the comfort zone of these students and provides clarity that can only be achieved by a deep hands-on understanding and the satisfaction of having created working code. While the approach is unique, the text follows the same set of topics typically covered in a one-semester undergraduate course, including propositional logic and first-order predicate logic, culminating in a proof of Goedel's completeness theorem. A sneak peek to Goedel's incompleteness theorem is also provided. The textbook is accompanied by an extensive collection of programming tasks, code skeletons, and unit tests. Familiarity with proofs and basic proficiency in Python is assumed.

Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures. In this dissertation, we study outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs.

This book describes model-based development of adaptive embedded systems, which enable improved functionality using the same resources. The techniques presented facilitate design from a higher level of abstraction, focusing on the problem domain rather than on the solution domain, thereby increasing development efficiency. Models are used to capture system specifications and to implement (manually or automatically) system functionality. The authors demonstrate the real impact of adaptivity on engineering of embedded systems by providing several industrial examples of the models used in the development of adaptive embedded systems.