This book constitutes the proceedings of the 14th International Conference on Applied Reconfigurable Computing, ARC 2018, held in Santorini, Greece, in May 2018. The 29 full papers and 22 short presented in this volume were carefully reviewed and selected from 78 submissions. In addition, the volume contains 9 contributions from research projects. The papers were organized in topical sections named: machine learning and neural networks; FPGA-based design and CGRA optimizations; applications and surveys; fault-tolerance, security and communication architectures; reconfigurable and adaptive architectures; design methods and fast prototyping; FPGA-based design and applications; and special session: research projects.

This book constitutes revised selected papers from the workshops held at 24th International Conference on Parallel and Distributed Computing, Euro-Par 2018, which took place in Turin, Italy, in August 2018. The 64 full papers presented in this volume were carefully reviewed and selected from 109 submissions. Euro-Par is an annual, international conference in Europe, covering all aspects of parallel and distributed processing. These range from theory to practice, from small to the largest parallel and distributed systems and infrastructures, from fundamental computational problems to full-edged applications, from architecture, compiler, language and interface design and implementation to tools, support infrastructures, and application performance aspects.

A hands-on guide to writing a Message Passing Interface, this book takes the reader on a tour across major MPI implementations, best optimization techniques, application relevant usage hints, and a historical retrospective of the MPI world, all based on a quarter of a century spent inside MPI. Readers will learn to write MPI implementations from scratch, and to design and optimize communication mechanisms using pragmatic subsetting as the guiding principle. Inside the Message Passing Interface also covers MPI quirks and tricks to achieve best performance. Dr. Alexander Supalov created the Intel Cluster Tools product line, including the Intel MP Library that he designed and led between 2003 and 2015. He invented the common MPICH ABI and also guided Intel efforts in the MPI Forum during the development of the MPI-2.1, MPI-2.2, and MPI-3 standards. Before that, Alexander designed new finite-element mesh-generation methods, contributing to the PARMACS and PARASOL interfaces, and developed the first full MPI-2 and IMPI implementations in the world. He graduated from the Moscow Institute of Physics and Technology in 1990, and earned his PhD in applied mathematics at the Institute of Numerical Mathematics of the Russian Academy of Sciences in 1995. Alexander holds 26 patents (more pending worldwide).

This book constitutes the refereed proceedings of the 21st CCF Conference on Computer Engineering and Technology, NCCET 2017, held in Xiamen, China, in August 2017. The 13 full papers presented were carefully reviewed and selected from 108 submissions. They address topics such as processor architecture; application specific processors; computer application and software optimization; technology on the horizon.

This book describes algorithmic methods and parallelization techniques to design a parallel sparse direct solver which is specifically targeted at integrated circuit simulation problems. The authors describe a complete flow and detailed parallel algorithms of the sparse direct solver. They also show how to improve the performance by simple but effective numerical techniques. The sparse direct solver techniques described can be applied to any SPICE-like integrated circuit simulator and have been proven to be high-performance in actual circuit simulation. Readers will benefit from the state-of-the-art parallel integrated circuit simulation techniques described in this book, especially the latest parallel sparse matrix solution techniques.

Learn how to institute and implement enterprise architecture in your organisation. You can make a quick start and establish a baseline for your enterprise architecture within ten weeks, then grow and stabilise the architecture over time using the proven Ready, Set, Go Approach. Reading this book will: Give you directions on how to institute and implement enterprise architecture in your organization. You will be able to build close relationships with stakeholders and delivery teams, but you will not need to micromanage the architectures operations; Increase your awareness that enterprise architecture is about business, not information technology; Enable you to initiate and facilitate dramatic business development. The architecture of an enterprise must be tolerant of currently unknown business initiatives; Show you how to get a holistic view of the process of implementing enterprise architecture; Make you aware that information is a key business asset and that information architecture is a key part of the enterprise architecture; Allow you to learn from our experiences. This book is based on our 30 years of work in the enterprise architecture field, colleagues in Europe, customer cases, and students. If your company is about to make a major change and you are looking for a way to reduce the changes into manageable pieces -- and still retain control of how they fit together -- this is your handbook. Maybe you are already acting as an enterprise architect and using a formal method, but you need practical hints. Or maybe you are about to set up an enterprise architect network or group of specialists and need input on how to organise your work. The Ready-Set-Go method for introducing enterprise architecture provides you, the enterprise architect, with an immediate understanding of the basic steps for starting, organising, and operating the entirety of your organisations architecture. Chapter 1 shows how to model and analyse your business operations, assess their current status, construct a future scenario, compare it to the current structure, analyse what you see, and show the result in a city plan. Chapter 2 deals with preparing for the implementation of the architecture with governance, enterprise architecture organisation, staffing, etc. This is the organising step before beginning the actual work. Chapter 3 establishes how to implement a city plan in practice. It deals with the practicalities of working as an enterprise architect and is called the running step. The common thread through all aspects of the enterprise architects work is the architects mastery of a number of tools, such as business models, process models, information models, and matrices. We address how to initiate the architecture process within the organisation in such a way that the overarching enterprise architecture and architecture-driven approach can be applied methodically and gradually improved.

In Synthetic Vision: Using Volume Learning and Visual DNA, a holistic model of the human visual system is developed into a working model in C++, informed by the latest neuroscience, DNN, and computer vision research. The author's synthetic visual pathway model includes the eye, LGN, visual cortex, and the high level PFC learning centers. The corresponding visual genome model (VGM), begun in 2014, is introduced herein as the basis for a visual genome project analogous to the Human Genome Project funded by the US government. The VGM introduces volume learning principles and Visual DNA (VDNA) taking a multivariate approach beyond deep neural networks. Volume learning is modeled as programmable learning and reasoning agents, providing rich methods for structured agent classification networks. Volume learning incorporates a massive volume of multivariate features in various data space projections, collected into strands of Visual DNA, analogous to human DNA genes. VGM lays a foundation for a visual genome project to sequence VDNA as visual genomes in a public database, using collaborative research to move synthetic vision science forward and enable new applications. Bibliographical references are provided to key neuroscience, computer vision, and deep learning research, which form the basis for the biologically plausible VGM model and the synthetic visual pathway. The book also includes graphical illustrations and C++ API reference materials to enable VGM application programming. Open source code licenses are available for engineers and scientists. Scott Krig founded Krig Research to provide some of the world's first vision and imaging systems worldwide for military, industry, government, and academic use. Krig has worked for major corporations and startups in the areas of machine learning, computer vision, imaging, graphics, robotics and automation, computer security and cryptography. He has authored international patents in the areas of computer architecture, communications, computer security, digital imaging, and computer vision, and studied at Stanford. Scott Krig is the author of the English/Chinese Springer book Computer Vision Metrics, Survey, Taxonomy and Analysis of Computer Vision, Visual Neuroscience, and Deep Learning, Textbook Edition, as well as other books, articles, and papers.

This book constitutes the refereed proceedings papers from the 8th International Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computing Systems, PMBS 2017, held in Denver, Colorado, USA, in November 2017. The 10 full papers and 3 short papers included in this volume were carefully reviewed and selected from 36 submissions. They were organized in topical sections named: performance evaluation and analysis; performance modeling and simulation; and short papers.

The Virtual and the Real in Planning and Urban Design: Perspectives, Practices and Applicationsexplores the merging relationship between physical and virtual spaces in planning and urban design. Technological advances such as smart sensors, interactive screens, locative media and evolving computation software have impacted the ways in which people experience, explore, interact with and create these complex spaces. This book draws together a broad range of interdisciplinary researchers in areas such as architecture, urban design, spatial planning, geoinformation science, computer science and psychology to introduce the theories, models, opportunities and uncertainties involved in the interplay between virtual and physical spaces. Using a wide range of international contributors, from the UK, USA, Germany, France, Switzerland, Netherlands and Japan, it provides a framework for assessing how new technology alters our perception of physical space.

This book covers the two broad areas of the electronics and electrical aspects of control applications, highlighting the many different types of control systems of relevance to real-life control system design. The control techniques presented are state-of-the-art. In the electronics section, readers will find essential information on microprocessor, microcontroller, mechatronics and electronics control. The low-level assembly programming language performs basic input/output control techniques as well as controlling the stepper motor and PWM dc motor. In the electrical section, the book addresses the complete elevator PLC system design, neural network plant control, load flow analysis, and process control, as well as machine vision topics. Illustrative diagrams, circuits and programming examples and algorithms help to explain the details of the system function design. Readers will find a wealth of computer control and industrial automation practices and applications for modern industries, as well as the educational sector.

An expert guide to understanding and making optimum use of BSIM

Used by more chip designers worldwide than any other comparable model, the Berkeley Short-Channel IGFET Model (BSIM) has, over the past few years, established itself as the de facto standard MOSFET SPICE model for circuit simulation and CMOS technology development. Yet, until now, there have been no independent expert guides or tutorials to supplement the various BSIM manuals currently available. Written by a noted expert in the field, this book fills that gap in the literature by providing a comprehensive guide to understanding and making optimal use of BSIM3 and BSIM4.

Drawing upon his extensive experience designing with BSIM, William Liu provides a brief history of the model, discusses the various advantages of BSIM over other models, and explores the reasons why BSIM3 has been adopted by the majority of circuit manufacturers. He then provides engineers with the detailed practical information and guidance they need to master all of BSIM’s features. He:

• Summarizes key BSIM3 components
• Represents the BSIM3 model with equivalent circuits for various operating conditions
• Provides a comprehensive glossary of modeling terminology
• Lists alphabetically BSIM3 parameters along with their meanings and relevant equations
• Explores BSIM3’s flaws and provides improvement suggestions
• Describes all of BSIM4’s improvements and new features

This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an engineer to grasp the field before delving into its detail. He then describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, Reuse Methodology from Algorithm/ESL to RTL, and other overall methodologies.

This book constitutes the refereed proceedings of the 12th International Conference on Reachability Problems, RP 2018, held in Marseille, France, in September 2018. The 11 full papers presented were carefully reviewed and selected from 21 submissions. The papers cover topics such as reachability for infinite state systems; rewriting systems; reachability analysis in counter/timed/cellular/communicating automata; Petri nets; computational aspects of semigroups, groups, and rings; reachability in dynamical and hybrid systems; frontiers between decidable and undecidable reachability problems; complexity and decidability aspects; predictability in iterative maps, and new computational paradigms.

This book constitutes the refereed proceedings of the 12th International Conference on Parallel Computational Technologies, PCT 2018, held in Rostov-on-Don, Russia, in April 2018.The 24 revised full papers presented were carefully reviewed and selected from 167 submissions. The papers are organized in topical sections on high performance architectures, tools and technologies; parallel numerical algorithms; supercomputer simulation.

Complete and comprehensive coverage of packet switching concepts and technologies

The rapid growth of Internet traffic has spurred a new concentration on IP routers and ATM, MPLS, and optical switches. This book addresses the basics, theory, architectures, and technologies for implementing ATM switches and IP routers. It focuses on the architecture for the next generation of broadband switches and routers and provides detailed treatment of both theoretical and practical topics for professionals and students alike.

Broadband Packet Switching Technologies is written with engineers and industry researchers in mind. It describes the basic concepts and fundamentals of ATM switches and IP routers, then divides the switches into different categories. In each category, the authors discuss the operations, problems, strengths, and weaknesses of the switches in performance and implementation. Detailed solutions and algorithms are also provided. The authors also extend fundamental packet-switching concepts to wireless and fiber-optic networks.

Broadband Packet Switching Technologies fills the need for a textbook and reference dedicated to high-speed networking technologies that serves the specific needs of professionals in the telecommunications industry and provides expert material for students in related fields.

Utilize a new layers-based development model for embedded systems using Agile techniques for software architecture and management. Firmware is comprised of both hardware and software, but the applicability of Agile in embedded systems development is new. This book provides a step-by-step process showing how this is possible. The book details how the moving parts in embedded systems development affect one another and shows how to properly use both engineering tools and new tools and methods to reduce waste, rework, and product time-to-market. Software is seen not as a commodity but a conduit to facilitate valuable product knowledge flow across the company into the hands of the customer. Embedded Systems Architecture for Agile Development starts off by reviewing the Layers model used in other engineering disciplines, as well as its advantages and applicability to embedded systems development. It outlines development models from project-based methodologies (e.g., collaborative product development) to the newer modern development visions (e.g., Agile) in software and various tools and methods that can help with a Layers model implementation. The book covers requirement modeling for embedded systems (Hatley-Pirbhai Method) and how adapting the HP Method with the help of the tools discussed in this book can be seen as a practical example for a complete embedded system. What You'll Learn Identify the major software parts involved in building a typical modern firmware Assign a layer to each software part so each layer can be separate from another and there won't be interdependencies between them Systematically and logically create these layers based on the customer requirements Use Model-Based Design (MBD) to create an active system architecture that is more accepting of changes Who This Book Is For Firmware engineers; systems architects; hardware and software managers, developers, designers, and architects; program managers; project managers; Agile practitioners; and manufacturing engineers and managers. The secondary audience includes research engineers and managers, and engineering and manufacturing managers.

This three-volume set of books presents advances in the development of concepts and techniques in the area of new technologies and contemporary information system architectures. It guides readers through solving specific research and analytical problems to obtain useful knowledge and business value from the data. Each chapter provides an analysis of a specific technical problem, followed by the numerical analysis, simulation and implementation of the solution to the problem. The books constitute the refereed proceedings of the 2017 38th International Conference "Information Systems Architecture and Technology," or ISAT 2017, held on September 17-19, 2017 in Szklarska Poreba, Poland. The conference was organized by the Computer Science and Management Systems Departments, Faculty of Computer Science and Management, Wroclaw University of Technology, Poland. The papers have been organized into topical parts: Part I- includes discourses on topics including, but not limited to, Artificial Intelligence Methods, Knowledge Discovery and Data Mining, Big Data, Knowledge Discovery and Data Mining, Knowledge Based Management, Internet of Things, Cloud Computing and High Performance Computing, Distributed Computer Systems, Content Delivery Networks, and Service Oriented Computing. Part II-addresses topics including, but not limited to, System Modelling for Control, Recognition and Decision Support, Mathematical Modelling in Computer System Design, Service Oriented Systems and Cloud Computing and Complex Process Modeling. Part III-deals with topics including, but not limited to, Modeling of Manufacturing Processes, Modeling an Investment Decision Process, Management of Innovation, Management of Organization.

This three-volume set of books presents advances in the development of concepts and techniques in the area of new technologies and contemporary information system architectures. It guides readers through solving specific research and analytical problems to obtain useful knowledge and business value from the data. Each chapter provides an analysis of a specific technical problem, followed by the numerical analysis, simulation and implementation of the solution to the problem. The books constitute the refereed proceedings of the 2017 38th International Conference "Information Systems Architecture and Technology," or ISAT 2017, held on September 17-19, 2017 in Szklarska Poreba, Poland. The conference was organized by the Computer Science and Management Systems Departments, Faculty of Computer Science and Management, Wroclaw University of Technology, Poland. The papers have been organized into topical parts: Part I- includes discourses on topics including, but not limited to, Artificial Intelligence Methods, Knowledge Discovery and Data Mining, Big Data, Knowledge Discovery and Data Mining, Knowledge Based Management, Internet of Things, Cloud Computing and High Performance Computing, Distributed Computer Systems, Content Delivery Networks, and Service Oriented Computing. Part II-addresses topics including, but not limited to, System Modelling for Control, Recognition and Decision Support, Mathematical Modelling in Computer System Design, Service Oriented Systems and Cloud Computing and Complex Process Modeling. Part III-deals with topics including, but not limited to, Modeling of Manufacturing Processes, Modeling an Investment Decision Process, Management of Innovation, Management of Organization.

This book constitutes the refereed proceedings of the 8th International Symposium on Parallel Architecture, Algorithm and Programming, PAAP 2017, held in Haikou, China, in June 2017. The 50 revised full papers and 7 revised short papers presented were carefully reviewed and selected from 192 submissions. The papers deal with research results and development activities in all aspects of parallel architectures, algorithms and programming techniques.

This book helps readers to implement their designs on Xilinx (R) FPGAs. The authors demonstrate how to get the greatest impact from using the Vivado (R) Design Suite, which delivers a SoC-strength, IP-centric and system-centric, next generation development environment that has been built from the ground up to address the productivity bottlenecks in system-level integration and implementation. This book is a hands-on guide for both users who are new to FPGA designs, as well as those currently using the legacy Xilinx tool set (ISE) but are now moving to Vivado. Throughout the presentation, the authors focus on key concepts, major mechanisms for design entry, and methods to realize the most efficient implementation of the target design, with the least number of iterations.

This book introduces readers to various threats faced during design and fabrication by today's integrated circuits (ICs) and systems. The authors discuss key issues, including illegal manufacturing of ICs or "IC Overproduction," insertion of malicious circuits, referred as "Hardware Trojans", which cause in-field chip/system malfunction, and reverse engineering and piracy of hardware intellectual property (IP). The authors provide a timely discussion of these threats, along with techniques for IC protection based on hardware obfuscation, which makes reverse-engineering an IC design infeasible for adversaries and untrusted parties with any reasonable amount of resources. This exhaustive study includes a review of the hardware obfuscation methods developed at each level of abstraction (RTL, gate, and layout) for conventional IC manufacturing, new forms of obfuscation for emerging integration strategies (split manufacturing, 2.5D ICs, and 3D ICs), and on-chip infrastructure needed for secure exchange of obfuscation keys- arguably the most critical element of hardware obfuscation.

This book introduces readers to various radiation soft-error mechanisms such as soft delays, radiation induced clock jitter and pulses, and single event (SE) coupling induced effects. In addition to discussing various radiation hardening techniques for combinational logic, the author also describes new mitigation strategies targeting commercial designs. Coverage includes novel soft error mitigation techniques such as the Dynamic Threshold Technique and Soft Error Filtering based on Transmission gate with varied gate and body bias. The discussion also includes modeling of SE crosstalk noise, delay and speed-up effects. Various mitigation strategies to eliminate SE coupling effects are also introduced. Coverage also includes the reliability of low power energy-efficient designs and the impact of leakage power consumption optimizations on soft error robustness. The author presents an analysis of various power optimization techniques, enabling readers to make design choices that reduce static power consumption and improve soft error reliability at the same time.

This book explains for readers how 3D chip stacks promise to increase the level of on-chip integration, and to design new heterogeneous semiconductor devices that combine chips of different integration technologies (incl. sensors) in a single package of the smallest possible size. The authors focus on heterogeneous 3D integration, addressing some of the most important challenges in this emerging technology, including contactless, optics-based, and carbon-nanotube-based 3D integration, as well as signal-integrity and thermal management issues in copper-based 3D integration. Coverage also includes the 3D heterogeneous integration of power sources, photonic devices, and non-volatile memories based on new materials systems.

This book makes powerful Field Programmable Gate Array (FPGA) and reconfigurable technology accessible to software engineers by covering different state-of-the-art high-level synthesis approaches (e.g., OpenCL and several C-to-gates compilers). It introduces FPGA technology, its programming model, and how various applications can be implemented on FPGAs without going through low-level hardware design phases. Readers will get a realistic sense for problems that are suited for FPGAs and how to implement them from a software designer's point of view. The authors demonstrate that FPGAs and their programming model reflect the needs of stream processing problems much better than traditional CPU or GPU architectures, making them well-suited for a wide variety of systems, from embedded systems performing sensor processing to large setups for Big Data number crunching. This book serves as an invaluable tool for software designers and FPGA design engineers who are interested in high design productivity through behavioural synthesis, domain-specific compilation, and FPGA overlays. Introduces FPGA technology to software developers by giving an overview of FPGA programming models and design tools, as well as various application examples; Provides a holistic analysis of the topic and enables developers to tackle the architectural needs for Big Data processing with FPGAs; Explains the reasons for the energy efficiency and performance benefits of FPGA processing; Provides a user-oriented approach and a sense for where and how to apply FPGA technology.

The present book includes a set of selected extended papers from the 12th International Conference on Informatics in Control, Automation and Robotics (ICINCO 2015), held in Colmar, France, from 21 to 23 July 2015. The conference brought together researchers, engineers and practitioners interested in the application of informatics to Control, Automation and Robotics. Four simultaneous tracks will be held, covering Intelligent Control Systems, Optimization, Robotics, Automation, Signal Processing, Sensors, Systems Modelling and Control, and Industrial Engineering, Production and Management. Informatics applications are pervasive in many areas of Control, Automation and Robotics. ICINCO 2015 received 214 submissions, from 42 countries, in all continents. After a double blind paper review performed by the Program Committee, 14% were accepted as full papers and thus selected for oral presentation. Additional papers were accepted as short papers and posters. A further selection was made after the Conference, based also on the assessment of presentation quality and audience interest, so that this book includes the extended and revised versions of the very best papers of ICINCO 2015. Commitment to high quality standards is a major concern of ICINCO that will be maintained in the next editions, considering not only the stringent paper acceptance ratios but also the quality of the program committee, keynote lectures, participation level and logistics.