Based on a symposium honoring the extensive work of Allen Newell -- one of the founders of artificial intelligence, cognitive science, human-computer interaction, and the systematic study of computational architectures -- this volume demonstrates how unifying themes may be found in the diversity that characterizes current research on computers and cognition. The subject matter includes:
* an overview of cognitive and computer science by leading researchers in the field;
* a comprehensive description of Allen Newell's "Soar" -- a computational architecture he developed as a unified theory of cognition;
* commentary on how the Soar theory of cognition relates to important issues in cognitive and computer science;
* rigorous treatments of controversial issues in cognition -- methodology of cognitive science, hybrid approaches to machine learning, word-sense disambiguation in understanding material language, and the role of capability processing constraints in architectural theory;
* comprehensive and systematic methods for studying architectural evolution in both hardware and software;
* a thorough discussion of the use of analytic models in human computer interaction;
* extensive reviews of important experiments in the study of scientific discovery and deduction; and
* an updated analysis of the role of symbols in information processing by Herbert Simon.
Incorporating the research of top scientists inspired by Newell's work, this volume will be of strong interest to a large variety of scientific communities including psychologists, computational linguists, computer scientists and engineers, and interface designers. It will also be valuable to those who study the scientific process itself, as it chronicles the impact of Newell's approach to research, simultaneously delving into each scientific discipline and producing results that transcend the boundaries of those disciplines.

This book provides an overview of current hardware security primitives, their design considerations, and applications. The authors provide a comprehensive introduction to a broad spectrum (digital and analog) of hardware security primitives and their applications for securing modern devices. Readers will be enabled to understand the various methods for exploiting intrinsic manufacturing and temporal variations in silicon devices to create strong security primitives and solutions. This book will benefit SoC designers and researchers in designing secure, reliable, and trustworthy hardware. Provides guidance and security engineers for protecting their hardware designs; Covers a variety digital and analog hardware security primitives and applications for securing modern devices; Helps readers understand PUF, TRNGs, silicon odometer, and cryptographic hardware design for system security.

This book introduces new compilation techniques, using the polyhedron model for the resource-adaptive parallel execution of loop programs on massively parallel processor arrays. The authors show how to compute optimal symbolic assignments and parallel schedules of loop iterations at compile time, for cases where the number of available cores becomes known only at runtime. The compile/runtime symbolic parallelization approach the authors describe reduces significantly the runtime overhead, compared to dynamic or just-in-time compilation. The new, on-demand fault-tolerant loop processing approach described in this book protects loop nests for parallel execution against soft errors.

Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems describes coding approaches for designing fault-tolerant systems, i.e., systems that exhibit structured redundancy that enables them to distinguish between correct and incorrect results or between valid and invalid states. Since redundancy is expensive and counter-intuitive to the traditional notion of system design, the book focuses on resource-efficient methodologies that avoid excessive use of redundancy by exploiting the algorithmic/dynamic structure of a particular combinational or dynamic system. The first part of Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems focuses on fault-tolerant combinational systems providing a review of von Neumann's classical work on Probabilistic Logics (including some more recent work on noisy gates) and describing the use of arithmetic coding and algorithm-based fault-tolerant schemes in algebraic settings. The second part of the book focuses on fault tolerance in dynamic systems. Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems also discusses how, in a dynamic system setting, one can relax the traditional assumption that the error-correcting mechanism is fault-free by using distributed error correcting mechanisms. The final chapter presents a methodology for fault diagnosis in discrete event systems that are described by Petri net models; coding techniques are used to quickly detect and identify failures. From the Foreword "Hadjicostis has significantly expanded the setting to processes occurring in more general algebraic and dynamic systems... The book responds to the growing need to handle faults in complex digital chips and complex networked systems, and to consider the effects of faults at the design stage rather than afterwards." George Verghese, Massachusetts Institute of Technology Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems will be of interest to both researchers and practitioners in the area of fault tolerance, systems design and control.

SRv6 Network Programming, beginning with the challenges for Internet Protocol version 6 (IPv6) network development, describes the background, roadmap design, and implementation of Segment Routing over IPv6 (SRv6), as well as the application of this technology in traditional and emerging services. The book begins with the development of IP technologies by focusing on the problems encountered during MPLS and IPv6 network development, giving readers insights into the problems tackled by SRv6 and the value of SRv6. It then goes on to explain SRv6 fundamentals, including SRv6 packet header design, the packet forwarding process, protocol extensions such as Interior Gateway Protocol (IGP), Border Gateway Protocol (BGP), and Path Computation Element Protocol (PCEP) extensions, and how SRv6 supports existing traffic engineering (TE), virtual private networks (VPN), and reliability requirements. Next, SRv6 network deployment is introduced, covering the evolution paths from existing networks to SRv6 networks, SRv6 network deployment processes, involved O&M technologies, and emerging 5G and cloud services supported by SRv6. Bit Index Explicit Replication IPv6 encapsulation (BIERv6), an SRv6 multicast technology, is then introduced as an important supplement to SRv6 unicast technology. The book concludes with a summary of the current status of the SRv6 industry and provides an outlook for new SRv6-based technologies. SRv6 Network Programming: Ushering in a New Era of IP Networks collects the research results of Huawei SRv6 experts and reflects the latest development direction of SRv6. With rich, clear, practical, and easy-to-understand content, the volume is intended for network planning engineers, technical support engineers and network administrators who need a grasp of the most cutting-edge IP network technology. It is also intended for communications network researchers in scientific research institutions and universities. Authors: Zhenbin Li is the Chief Protocol Expert of Huawei and member of the IETF IAB, responsible for IP protocol research and standards promotion at Huawei. Zhibo Hu is a Senior Huawei Expert in SR and IGP, responsible for SR and IGP planning and innovation. Cheng Li is a Huawei Senior Pre-research Engineer and IP standards representative, responsible for Huawei's SRv6 research and standardization.

This book is written as an introduction to annotated logics. It provides logical foundations for annotated logics, discusses some interesting applications of these logics and also includes the authors' contributions to annotated logics. The central idea of the book is to show how annotated logic can be applied as a tool to solve problems of technology and of applied science. The book will be of interest to pure and applied logicians, philosophers and computer scientists as a monograph on a kind of paraconsistent logic. But, the layman will also take profit from its reading.

This book presents several significant advances in algorithms designed to solve the Do-All problem in distributed message-passing settings under various models of adversity, including processor crashes, asynchrony, message delays, network partitions, and malicious processor behaviors. Upper and lower bounds are presented, demonstrating the extent to which efficiency can be combined with fault-tolerance. This book contains the recent advances in the principles of efficient and fault-tolerant cooperative computing, narrowing the gap between abstract models of dependable network computing and realistic distributed systems.

Grounded in the user-centered design movement, this book offers a broad consideration of how our civilization has evolved its technical infrastructure for human purpose to help us make sense of the contemporary world of information infrastructure and online existence. The author incorporates historical, cultural and aesthetic approaches to situating information and its underlying technologies across time in the collective, lived experiences of humanity. In today's digital information world, user experience is vital to the success of any product or service. Yet as the user population expands to include us all, designing for people who vary in skills, abilities, preferences and backgrounds is challenging. This book provides an integrated understanding of users, and the methods that have evolved to identify usability challenges, that can facilitate cohesive and earlier solutions. The book treats information creation and use as a core human behavior based on acts of representation and recording that humans have always practiced. It suggests that the traditional ways of studying information use, with their origins in the distinct layers of social science theories and models is limiting our understanding of what it means to be an information user and hampers our efforts at being truly user-centric in design. Instead, the book offers a way of integrating the knowledge base to support a richer view of use and users in design education and evaluation. Understanding Users is aimed at those studying or practicing user-centered design and anyone interested in learning how people might be better integrated in the design of new technologies to augment human capabilities and experiences.

This monograph evolved from my Ph. D dissertation completed at the Laboratory of Computer Science, MIT, during the Summer of 1986. In my dissertation I proposed a pipelined code mapping scheme for array operations on static dataflow architectures. The main addition to this work is found in Chapter 12, reflecting new research results developed during the last three years since I joined McGill University-results based upon the principles in my dissertation. The terminology dataflow soft ware pipelining has been consistently used since publication of our 1988 paper on the argument-fetching dataflow architecture model at McGill University 43]. In the first part of this book we describe the static data flow graph model as an operational model for concurrent computation. We look at timing considerations for program graph execution on an ideal static dataflow computer, examine the notion of pipe lining, and characterize its performance. We discuss balancing techniques used to transform certain graphs into fully pipelined data flow graphs. In particular, we show how optimal balancing of an acyclic data flow graph can be formulated as a linear programming problem for which an optimal solution exists. As a major result, we show the optimal balancing problem of acyclic data flow graphs is reduceable to a class of linear programming problem, the net work flow problem, for which well-known efficient algorithms exist. This result disproves the conjecture that such problems are computationally hard."

Within the Smart Grid, the combination of automation equipment, communication technology and IT is crucial. Interoperability of devices and systems can be seen as the key enabler of smart grids. Therefore, international initiatives have been started in order to identify interoperability core standards for Smart Grids. IEC 62357, the so called Seamless Integration Architecture, is one of these very core standards, which has been identified by recent Smart Grid initiatives and roadmaps to be essential for building and managing intelligent power systems. The Seamless Integration Architecture provides an overview of the interoperability and relations between further standards from IEC TC 57 like the IEC 61970/61968: Common Information Model - CIM. CIM has proven to be a mature standard for interoperability and engineering; consequently, it is a cornerstone of the IEC Smart Grid Standardization Roadmap. This book provides an overview on how the CIM developed, in which international projects and roadmaps is has already been covered and describes the basic use cases for CIM. This book has been written for both Power Engineers trying to get to know the EMS and business IT part of Smart Grid and for Computer Scientist finding out where ICT technology is applied in EMS and DMS Systems. The book is divided into two parts dealing with the theoretical foundations and a practical part describing tools and use cases for CIM.

This book presents a wide-band and technology independent, SPICE-compatible RLC model for through-silicon vias (TSVs) in 3D integrated circuits. This model accounts for a variety of effects, including skin effect, depletion capacitance and nearby contact effects. Readers will benefit from in-depth coverage of concepts and technology such as 3D integration, Macro modeling, dimensional analysis and compact modeling, as well as closed form equations for the through silicon via parasitics. Concepts covered are demonstrated by using TSVs in applications such as a spiral inductorand inductive-based communication system and bandpass filtering."

This book describes analytical models and estimation methods to enhance performance estimation of pipelined multiprocessor systems-on-chip (MPSoCs). A framework is introduced for both design-time and run-time optimizations. For design space exploration, several algorithms are presented to minimize the area footprint of a pipelined MPSoC under a latency or a throughput constraint. A novel adaptive pipelined MPSoC architecture is described, where idle processors are transitioned into low-power states at run-time to reduce energy consumption. Multi-mode pipelined MPSoCs are introduced, where multiple pipelined MPSoCs optimized separately are merged into a single pipelined MPSoC, enabling further reduction of the area footprint by sharing the processors and communication buffers. Readers will benefit from the authors' combined use of analytical models, estimation methods and exploration algorithms and will be enabled to explore billions of design points in a few minutes.

With the fast pace of change in today's business environment, the need to transform organizations into agile enterprises that can respond quickly to change has never been greater. Methods and computer technologies are needed to enable rapid business and system change, and this practical book shows professionals how to achieve this agility. The solution lies in Enterprise Integration (both business and technology integration). For business integration, the book explains how to use enterprise architecture methods to integrate data, processes, locations, people, events and business plans throughout an organization.

The book covers a range of topics dealing with emerging computing technologies which are being developed in response to challenges faced due to scaling CMOS technologies. It provides a sneak peek into the capabilities unleashed by these technologies across the complete system stack, with contributions by experts discussing device technology, circuit, architecture and design automation flows. Presenting a gradual progression of the individual sub-domains and the open research and adoption challenges, this book will be of interest to industry and academic researchers, technocrats and policymakers. Chapters "Innovative Memory Architectures Using Functionality Enhanced Devices" and "Intelligent Edge Biomedical Sensors in the Internet of Things (IoT) Era" are available open access under a Creative Commons Attribution 4.0 International License via link.springer.com.

This book discusses the implementation of digital circuits by using MCML gates. Although digital circuit implementation is possible with other elements, such as CMOS gates, MCML implementations can provide superior performance in certain applications. This book provides a complete automation methodology for the implementation of digital circuits in MCML and provides an extensive explanation on the technical details of design of MCML. A systematic methodology is presented to build efficient MCML standard-cell libraries, and a complete top-down design flow is shown to implement complex systems using such building blocks.

The advent of very large scale integrated circuit technology has enabled the construction of very complex and large interconnection networks. By most accounts, the next generation of supercomputers will achieve its gains by increasing the number of processing elements, rather than by using faster processors. The most difficult technical problem in constructing a supercom puter will be the design of the interconnection network through which the processors communicate. Selecting an appropriate and adequate topological structure of interconnection networks will become a critical issue, on which many research efforts have been made over the past decade. The book is aimed to attract the readers' attention to such an important research area. Graph theory is a fundamental and powerful mathematical tool for de signing and analyzing interconnection networks, since the topological struc ture of an interconnection network is a graph. This fact has been univer sally accepted by computer scientists and engineers. This book provides the most basic problems, concepts and well-established results on the topological structure and analysis of interconnection networks in the language of graph theory. The material originates from a vast amount of literature, but the theory presented is developed carefully and skillfully. The treatment is gen erally self-contained, and most stated results are proved. No exercises are explicitly exhibited, but there are some stated results whose proofs are left to the reader to consolidate his understanding of the material."

This book provides a comprehensive introduction to processing-in-memory (PIM) technology, from its architectures to circuits implementations on multiple memory types and describes how it can be a viable computer architecture in the era of AI and big data. The authors summarize the challenges of AI hardware systems, processing-in-memory (PIM) constraints and approaches to derive system-level requirements for a practical and feasible PIM solution. The presentation focuses on feasible PIM solutions that can be implemented and used in real systems, including architectures, circuits, and implementation cases for each major memory type (SRAM, DRAM, and ReRAM).

This book provides an introduction to digital storage for consumer electronics. It discusses the various types of digital storage, including emerging non-volatile solid-state storage technologies and their advantages and disadvantages. It discusses the best practices for selecting, integrating, and using storage devices for various applications. It explores the networking of devices into an overall organization that results in always-available home storage combined with digital storage in the cloud to create an infrastructure to support emerging consumer applications and the Internet of Things. It also looks at the role of digital storage devices in creating security and privacy in consumer products.

This second edition focuses on the thought process of digital design and implementation in the context of VLSI and system design. It covers the Verilog 2001 and Verilog 2005 RTL design styles, constructs and the optimization at the RTL and synthesis level. The book also covers the logic synthesis, low power, multiple clock domain design concepts and design performance improvement techniques. The book includes 250 design examples/illustrations and 100 exercise questions. This volume can be used as a core or supplementary text in undergraduate courses on logic design and as a text for professional and vocational coursework. In addition, it will be a hands-on professional reference and a self-study aid for hobbyists.

It has been widely recognized that artificial intelligence computations offer large potential for distributed and parallel processing. Unfortunately, not much is known about designing parallel AI algorithms and efficient, easy-to-use parallel computer architectures for AI applications. The field of parallel computation and computers for AI is in its infancy, but some significant ideas have appeared and initial practical experience has become available. The purpose of this book has been to collect in one volume contributions from several leading researchers and pioneers of AI that represent a sample of these ideas and experiences. This sample does not include all schools of thought nor contributions from all leading researchers, but it covers a relatively wide variety of views and topics and in this sense can be helpful in assessing the state ofthe art. We hope that the book will serve, at least, as a pointer to more specialized literature and that it will stimulate interest in the area of parallel AI processing. It has been a great pleasure and a privilege to cooperate with all contributors to this volume. They have my warmest thanks and gratitude. Mrs. Birgitta Knapp has assisted me in the editorial task and demonstrated a great deal of skill and patience. Janusz S. Kowalik vii INTRODUCTION Artificial intelligence (AI) computer programs can be very time-consuming.

For courses in Logic and Computer design. Understanding Logic and Computer Design for All Audiences Logic and Computer Design Fundamentals is a thoroughly up-to-date text that makes logic design, digital system design, and computer design available to students of all levels. The Fifth Edition brings this widely recognised source to modern standards by ensuring that all information is relevant and contemporary. The material focuses on industry trends and successfully bridges the gap between the much higher levels of abstraction students in the field must work with today than in the past. Broadly covering logic and computer design, Logic and Computer Design Fundamentals is a flexibly organised source material that allows instructors to tailor its use to a wide range of student audiences.

Securing Cloud Services - A pragmatic guide gives an overview of security architecture processes and explains how they may be used to derive an appropriate set of security controls to manage the risks associated with working in the Cloud. Manage the risks associated with Cloud computing - buy this book today!

It has become clear in recent years from such major forums as the various international conferences on flexible manufacruring systems (FMSs) that the computer-controlled and -integrated "factory of the furure" is now being considered as a commercially viable and technically achievable goal. To date, most attention has been given to the design, development, and evalu ation of flexible machining systems. Now, with the essential support of increasing numbers of industrial examples, the general concepts, technical requirements, and cost-effectiveness of responsive, computer-integrated, flexible machining systems are fast becoming established knowledge. There is, of course, much still to be done in the development of modular com puter hardware and software, and the scope for cost-effective developments in pro gramming systems, workpiece handling, and quality control will ensure that contin uing development will occur over the next decade. However, international attention is now increasingly rurning toward the flexible computer control of the assembly process as the next logical step in progressive factory automation. It is here at this very early stage that Tony Owen has bravely set out to encompass the future field of flexible assembly systems (FASs) in his own distinctive, wide-ranging style."

This book comprehensively covers the state-of-the-art security applications of machine learning techniques. The first part explains the emerging solutions for anti-tamper design, IC Counterfeits detection and hardware Trojan identification. It also explains the latest development of deep-learning-based modeling attacks on physically unclonable functions and outlines the design principles of more resilient PUF architectures. The second discusses the use of machine learning to mitigate the risks of security attacks on cyber-physical systems, with a particular focus on power plants. The third part provides an in-depth insight into the principles of malware analysis in embedded systems and describes how the usage of supervised learning techniques provides an effective approach to tackle software vulnerabilities.