Network calculus is a theory dealing with queuing systems found in computer networks. Its focus is on performance guarantees. Central to the theory is the use of alternate algebras such as the min-plus algebra to transform complex network systems into analytically tractable systems. To simplify the ana- sis, another idea is to characterize tra?c and service processes using various bounds. Since its introduction in the early 1990s, network calculus has dev- oped along two tracks-deterministic and stochastic. This book is devoted to summarizing results for stochastic network calculus that can be employed in the design of computer networks to provide stochastic service guarantees. Overview and Goal Like conventional queuing theory, stochastic network calculus is based on properly de?ned tra?c models and service models. However, while in c- ventional queuing theory an arrival process is typically characterized by the inter-arrival times of customers and a service process by the service times of customers, the arrival process and the service process are modeled in n- work calculus respectively by some arrival curve that (maybe probabilis- cally) upper-bounds the cumulative arrival and by some service curve that (maybe probabilistically) lower-bounds the cumulative service. The idea of usingboundstocharacterizetra?candservicewasinitiallyintroducedfor- terministic network calculus. It has also been extended to stochastic network calculus by exploiting the stochastic nature of arrival and service processes.

Three approaches can be applied to determine the performance of parallel and distributed computer systems: measurement, simulation, and mathematical methods. This book introduces various network architectures for parallel and distributed systems as well as for systems-on-chips, and presents a strategy for developing a generator for automatic model derivation. It will appeal to researchers and students in network architecture design and performance analysis.

The book provides complete coverage of fundamental IP networking in Java. It introduces the concepts behind TCP/IP and UDP and their intended use and purpose; gives complete coverage of Java networking APIs, includes an extended discussion of advanced server design, so that the various design principles and tradeoffs concerned are discussed and equips the reader with analytic queuing-theory tools to evaluate design alternatives; covers UDP multicasting, and covers multi-homed hosts, leading the reader to understand the extra programming steps and design considerations required in such environments.

After reading this book the reader will have an advanced knowledge of fundamental network design and programming concepts in the Java language, enabling them to design and implement distributed applications with advanced features and to predict their performance. Special emphasis is given to the scalable I/O facilities of Java 1.4 as well as complete treatments of multi-homing and UDP both unicast and multicast.

Operating systems kernels are central to the functioning of computers. Security of the overall system, as well as its reliability and responsiveness, depend upon the correct functioning of the kernel. This unique approach - presenting a formal specification of a kernel - starts with basic constructs and develops a set of kernels; proofs are included as part of the text.

This book constitutes thoroughly refereed post-conference proceedings of the workshops of the 16th International Conference on Parallel Computing, Euro-Par 2010, held in Ischia, Italy, in August/September 2010. The papers of these 9 workshops HeteroPar, HPCC, HiBB, CoreGrid, UCHPC, HPCF, PROPER, CCPI, and VHPC focus on promotion and advancement of all aspects of parallel and distributed computing.

Euro-Par is an annual series of international conferences dedicated to the p- motion and advancementof allaspects of parallelcomputing. The major themes can be divided into four broad categories: theory, high-performance, cluster and grid,distributedandmobilecomputing.Thesecategoriescomprise14topicsthat focus on particular issues. The objective of Euro-Paris to provide a forum within which to promote the development of parallel computing both as an industrial technique and an a- demic discipline, extending the frontier of both the state of the art and the state of practice. The main audience for and participants in Euro-Par are researchers inacademicdepartments,governmentlaboratories,andindustrialorganizations. Euro-Par2010 was the 16th conference in the Euro-Parseries, and was or- nizedbythe Institute forHigh-PerformanceComputingandNetworking(ICAR) of the Italian National Research Council (CNR), in Ischia, Italy. Previous Euro- ParconferencestookplaceinStockholm,Lyon,Passau,Southampton,Toulouse, Munich, Manchester, Padderborn, Klagenfurt, Pisa, Lisbon, Dresden, Rennes, Las Palmas, and Delft. Next year the conference will take place in Bordeaux, France. More information on the Euro-Par conference series and organization is available on the wesite http://www.europar.org. As mentioned before, the conference was organized in 14 topics. The paper review process for each topic was managed and supervised by a committee of at least four persons: a Global Chair, a Local Chair, and two members. Some speci?c topics with a high number of submissions were managed by a larger committeewithmoremembers.The?naldecisionsontheacceptanceorrejection ofthesubmitted papersweremadein ameeting ofthe ConferenceCo-chairsand Local Chairs of the topics.

Suitable for a one- or two-semester undergraduate or beginning graduate course in computer science and computer engineering, Computer Organization, Design, and Architecture, Fifth Edition presents the operating principles, capabilities, and limitations of digital computers to enable the development of complex yet efficient systems. With 11 new sections and four revised sections, this edition takes students through a solid, up-to-date exploration of single- and multiple-processor systems, embedded architectures, and performance evaluation. See What's New in the Fifth Edition Expanded coverage of embedded systems, mobile processors, and cloud computing Material for the "Architecture and Organization" part of the 2013 IEEE/ACM Draft Curricula for Computer Science and Engineering Updated commercial machine architecture examples The backbone of the book is a description of the complete design of a simple but complete hypothetical computer. The author then details the architectural features of contemporary computer systems (selected from Intel, MIPS, ARM, Motorola, Cray and various microcontrollers, etc.) as enhancements to the structure of the simple computer. He also introduces performance enhancements and advanced architectures including networks, distributed systems, GRIDs, and cloud computing. Computer organization deals with providing just enough details on the operation of the computer system for sophisticated users and programmers. Often, books on digital systems' architecture fall into four categories: logic design, computer organization, hardware design, and system architecture. This book captures the important attributes of these four categories to present a comprehensive text that includes pertinent hardware, software, and system aspects.

This year, the IFIP Working Conference on Distributed and Parallel Embedded Sys tems (DIPES 2008) is held as part of the IFIP World Computer Congress, held in Milan on September 7 10, 2008. The embedded systems world has a great deal of experience with parallel and distributed computing. Many embedded computing systems require the high performance that can be delivered by parallel computing. Parallel and distributed computing are often the only ways to deliver adequate real time performance at low power levels. This year's conference attracted 30 submissions, of which 21 were accepted. Prof. Jor ] g Henkel of the University of Karlsruhe graciously contributed a keynote address on embedded computing and reliability. We would like to thank all of the program committee members for their diligence. Wayne Wolf, Bernd Kleinjohann, and Lisa Kleinjohann Acknowledgements We would like to thank all people involved in the organization of the IFIP World Computer Congress 2008, especially the IPC Co Chairs Judith Bishop and Ivo De Lotto, the Organization Chair Giulio Occhini, as well as the Publications Chair John Impagliazzo. Further thanks go to the authors for their valuable contributions to DIPES 2008. Last but not least we would like to acknowledge the considerable amount of work and enthusiasm spent by our colleague Claudius Stern in preparing theproceedingsofDIPES2008. Hemadeitpossibletoproducethemintheircurrent professional and homogeneous style."

The Second International Workshop on Traffic Monitoring and Analysis (TMA 2010) was an initiative of the COST Action IC0703 "Data Traffic Monitoring and Analysis: Theory, Techniques, Tools and Applications for the Future Networks" (http: // www.tma-portal.eu/cost-tma-action). The COST program is an intergovernmental framework for European cooperation in science and technology, promoting the coordination of nationally funded research on a European level. Each COST Action aims at reducing the fragmentation in - search and opening the European research area to cooperation worldwide. Traffic monitoring and analysis (TMA) is nowadays an important research topic within the field of computer networks. It involves many research groups worldwide that are collectively advancing our understanding of the Internet. The importance of TMA research is motivated by the fact that modern packet n- works are highly complex and ever-evolving objects. Understanding, developing and managing such environments is difficult and expensive in practice. Traffic monitoring is a key methodology for understanding telecommunication technology and improving its operation, and the recent advances in this field suggest that evolved TMA-based techniques can play a key role in the operation of real networks.

Collections of digital documents can nowadays be found everywhere in institutions, universities or companies. Examples are Web sites or intranets. But searching them for information can still be painful. Searches often return either large numbers of matches or no suitable matches at all.

Such document collections can vary a lot in size and how much structure they carry. What they have in common is that they typically do have some structure and that they cover a limited range of topics. The second point is significantly different from the Web in general.

The type of search system that we propose in this book can suggest ways of refining or relaxing the query to assist a user in the search process. In order to suggest sensible query modifications we would need to know what the documents are about. Explicit knowledge about the document collection encoded in some electronic form is what we need. However, typically such knowledge is not available. So we construct it automatically.

The Second International Conference on High-Performance Computing and Appli- tions (HPCA 2009) was a follow-up event of the successful HPCA 2004. It was held in Shanghai, a beautiful, active, and modern city in China, August 10-12, 2009. It served as a forum to present current work by researchers and software developers from around the world as well as to highlight activities in the high-performance c- puting area. It aimed to bring together research scientists, application pioneers, and software developers to discuss problems and solutions and to identify new issues in this area. This conference emphasized the development and study of novel approaches for high-performance computing, the design and analysis of high-performance - merical algorithms, and their scientific, engineering, and industrial applications. It offered the conference participants a great opportunity to exchange the latest research results, heighten international collaboration, and discuss future research ideas in HPCA. In addition to 24 invited presentations, the conference received over 300 contr- uted submissions from over ten countries and regions worldwide, about 70 of which were accepted for presentation at HPCA 2009. The conference proceedings contain some of the invited presentations and contributed submissions, and cover such research areas of interest as numerical algorithms and solutions, high-performance and grid c- puting, novel approaches to high-performance computing, massive data storage and processing, hardware acceleration, and their wide applications.

Welcome to the proceedings of the 19th International Workshop on Power and TimingModeling, OptimizationandSimulation, PATMOS2009.Overtheyears, PATMOShasevolvedintoanimportantEuropeanevent, whereresearchersfrom both industry and academia discuss and investigate the emerging challenges in future and contemporary applications, design methodologies, and tools required for the development of the upcoming generations of integrated circuits and s- tems. PATMOS 2009 was organized by TU Delft, The Netherlands, with sp- sorship by the NIRICT Design Lab and Cadence Design Systems, and technical co-sponsorshipbytheIEEE.Furtherinformationabouttheworkshopisavailable athttp: //ens.ewi.tudelft.nl/patmos09. The technical programof PATMOS 2009 contained state-of-the-arttechnical contributions, three invited keynotes, and a special session on SystemC-AMS Extensions. The technical program focused on timing, performance, and power consumption, as well as architectural aspects with particular emphasis on m- eling, design, characterization, analysis, and optimization in the nanometer era. The Technical Program Committee, with the assistance of additional expert reviewers, selected the 36 papers presented at PATMOS. The papers were - ganized into 7 oral sessions (with a total of 26 papers) and 2 poster sessions (with a total of 10 papers). As is customary for the PATMOS workshops, full papers were required for review, and a minimum of three reviews were received per manuscr

Companies and institutions depend more than ever on the availability of their Information Technology, and most mission critical business processes are IT-based. Business Continuity is the ability to do business under any circumstances and is an essential requirement faced by modern companies. Both concepts - High Availability and Disaster Recovery - are realized by redundant systems. This book presents requirements, concepts, and realizations of redundant systems on all abstraction levels, and all given examples refer to UNIX and Linux Systems.

Since its original inception back in 1989 the Web has changed into an environment where Web applications range from small-scale information dissemination applications, often developed by non-IT professionals, to large-scale, commercial, enterprise-planning and scheduling applications, developed by multidisciplinary teams of people with diverse skills and backgrounds and using cutting-edge, diverse technologies.

As an engineering discipline, Web engineering must provide principles, methodologies and frameworks to help Web professionals and researchers develop applications and manage projects effectively. Mendes and Mosley have selected experts from numerous areas in Web engineering, who contribute chapters where important concepts are presented and then detailed using real industrial case studies. After an introduction into the discipline itself and its intricacies, the contributions range from Web effort estimation, productivity benchmarking and conceptual and model-based application development methodologies, to other important principles such as usability, reliability, testing, process improvement and quality measurement. This is the first book that looks at Web engineering from a measurement perspective.

The result is a self-containing, comprehensive overview detailing the role of measurement and metrics within the context of Web engineering. This book is ideal for professionals and researchers who want to know how to use sound principles for the effective management of Web projects, as well as for courses at an advanced undergraduate or graduate level.

Recent accidents in a range of industries have increased concern over the design, development, management and control of safety-critical systems. Attention has now focused upon the role of human error both in the development and in the operation of complex processes.
Human Error, Safety and Systems Development gathers contributions from practitioners and researchers presenting and discussing leading edge techniques that can be used to mitigate the impact of error (both system and human) on safety-critical systems. Some of these contributions can be easily integrated into existing systems engineering practices while others provide a more theoretical and fundamental perspective on the issues raised by these kinds of interactive systems. More precisely the contributions cover the following themes:
-Techniques for incident and accident analysis;
-Empirical studies of operator behaviour in safety-critical systems;
-Observational studies of safety-critical systems;
-Risk assessment techniques for interactive systems;
-Safety-related interface design, development and testing;
-Formal description techniques for the design and development of safety-critical interactive systems.
Many diverse sectors are covered, including but not limited to aviation, maritime and the other transportation industries, the healthcare industry, process and power generation and military applications.

This volume contains 20 original and significant contributions addressing these critical questions. The papers were presented at the 7th IFIP Working Group 13.5 Working Conference on Human Error, Safety and Systems Development, which was held in August 2004 in conjunction with the 18th IFIP World Computer Congress in Toulouse, France, and sponsored by the International Federation for Information Processing (IFIP).

Parallel and distributed computation has been gaining a great lot of attention in the last decades. During this period, the advances attained in computing and communication technologies, and the reduction in the costs of those technolo gies, played a central role in the rapid growth of the interest in the use of parallel and distributed computation in a number of areas of engineering and sciences. Many actual applications have been successfully implemented in various plat forms varying from pure shared-memory to totally distributed models, passing through hybrid approaches such as distributed-shared memory architectures. Parallel and distributed computation differs from dassical sequential compu tation in some of the following major aspects: the number of processing units, independent local dock for each unit, the number of memory units, and the programming model. For representing this diversity, and depending on what level we are looking at the problem, researchers have proposed some models to abstract the main characteristics or parameters (physical components or logical mechanisms) of parallel computers. The problem of establishing a suitable model is to find a reasonable trade-off among simplicity, power of expression and universality. Then, be able to study and analyze more precisely the behavior of parallel applications."

A family of internationally popular microcontrollers, the Atmel AVR microcontroller series is a low-cost hardware development platform suitable for an educational environment. Until now, no text focused on the assembly language programming of these microcontrollers. Through detailed coverage of assembly language programming principles and techniques, Some Assembly Required: Assembly Language Programming with the AVR Microcontroller teaches the basic system capabilities of 8-bit AVR microcontrollers.

The text illustrates fundamental computer architecture and programming structures using AVR assembly language. It employs the core AVR 8-bit RISC microcontroller architecture and a limited collection of external devices, such as push buttons, LEDs, and serial communications, to describe control structures, memory use and allocation, stacks, and I/O. Each chapter contains numerous examples and exercises, including programming problems.

By studying assembly languages, computer scientists gain an understanding of the functionality of basic processors and how their capabilities support high level languages and applications. Exploring this connection between hardware and software, this book provides a foundation for understanding compilers, linkers, loaders, and operating systems in addition to the processors themselves.

Knowledge science is an emerging discipline resulting from the demands of a knowledge-based economy and information revolution. Explaining how to improve our knowledge-based society, Knowledge Science: Modeling the Knowledge Creation Process addresses problems in collecting, synthesizing, coordinating, and creating knowledge. The book introduces several key concepts in knowledge science: Knowledge technology, which encompasses classification, representation, modeling, identification, acquisition, searching, organization, storage, conversion, and dissemination Knowledge management, which covers three different yet related areas (knowledge assets, knowing processes, knower relations) Knowledge discovery and data mining, which combine databases, statistics, machine learning, and related areas to discover and extract valuable knowledge from large volumes of data Knowledge synthesis, knowledge justification, and knowledge construction, which are important in solving real-life problems Specialists in decision science, artificial intelligence, systems engineering, behavioral science, and management science, the book's contributors present their own original ideas, including an Oriental systems philosophy, a new episteme in the knowledge-based society, and a theory of knowledge construction. They emphasize the importance of systemic thinking for developing a better society in the current knowledge-based era.

Networks on Chip presents a variety of topics, problems and approaches with the common theme to systematically organize the on-chip communication in the form of a regular, shared communication network on chip, an NoC for short.

As the number of processor cores and IP blocks integrated on a single chip is steadily growing, a systematic approach to design the communication infrastructure becomes necessary. Different variants of packed switched on-chip networks have been proposed by several groups during the past two years. This book summarizes the state of the art of these efforts and discusses the major issues from the physical integration to architecture to operating systems and application interfaces. It also provides a guideline and vision about the direction this field is moving to. Moreover, the book outlines the consequences of adopting design platforms based on packet switched network. The consequences may in fact be far reaching because many of the topics of distributed systems, distributed real-time systems, fault tolerant systems, parallel computer architecture, parallel programming as well as traditional system-on-chip issues will appear relevant but within the constraints of a single chip VLSI implementation.

The book is organized in three parts. The first deals with system design and methodology issues. The second presents problems and solutions concerning the hardware and the basic communication infrastructure. Finally, the third part covers operating system, embedded software and application. However, communication from the physical to the application level is a central theme throughout the book.

The book serves as an excellent reference source and may be used as a text for advanced courses on the subject.

Memory Architecture Exploration for Programmable Embedded Systems addresses efficient exploration of alternative memory architectures, assisted by a "compiler-in-the-loop" that allows effective matching of the target application to the processor-memory architecture. This new approach for memory architecture exploration replaces the traditional black-box view of the memory system and allows for aggressive co-optimization of the programmable processor together with a customized memory system.
The book concludes with a set of experiments demonstrating the utility of this exploration approach. The authors perform architecture and compiler exploration for a set of large, real-life benchmarks, uncovering promising memory configurations from different perspectives, such as cost, performance and power.

Innovation in Manufacturing Networks A fundamental concept of the emergent business, scientific and technological paradigms ces area, innovation the ability to apply new ideas to products, processes, organizational practices and business models - is crucial for the future competitiveness of organizations in a continually increasingly globalised, knowledge-intensive marketplace. Responsiveness, agility as well as the high performance of manufacturing systems is responsible for the recent changes in addition to the call for new approaches to achieve cost-effective responsiveness at all the levels of an enterprise. Moreover, creating appropriate frameworks for exploring the most effective synergies between human potential and automated systems represents an enormous challenge in terms of processes characterization, modelling, and the development of adequate support tools. The implementation and use of Automation Systems requires an ever increasing knowledge of enabling technologies and Business Practices. Moreover, the digital and networked world will surely trigger new business practices. In this context and in order to achieve the desired effective and efficiency performance levels, it is crucial to maintain a balance between both the technical aspects and the human and social aspects when developing and applying new innovations and innovative enabling technologies. BASYS conferences have been developed and organized so as to promote the development of balanced automation systems in an attempt to address the majority of the current open issues.

This book synthesizes the results of the seventh in a successful series of workshops that were established by Shanghai Jiao Tong University and Technische Universitat Berlin, bringing together researchers from both universities in order to present research results to an international community. Aspects covered here include, among others, Models and specification; Simulation of different properties; Middleware for distributed real-time systems; Signal Analysis; Control methods; Applications in airborne and medical systems."

This book is a practical guide to IPv6 addressing Unix and network administrators with experience in TCP/IP(v4) but not necessarily any IPv6 knowledge. It focuses on reliable and efficient operation of IPv6 implementations available today rather than on protocol specifications. Consequently, it covers the essential concepts, using instructive and thoroughly tested examples, on how to configure, administrate, and debug IPv6 setups. These foundations are complemented by discussions of best practices and strategic considerations aimed at overall efficiency, reliability, maintainability, and interoperation.

Ad hoc networks refer to the wireless networking paradigm that covers a variety of network forms for specific purposes, such as mobile ad hoc networks, sensor n- works, vehicular networks, underwater networks, underground networks, personal area networks, and home networks. The various forms of ad hoc networks promise a broad scope of applications in civilian, commercial, and military areas, which have led to significant new research problems and challenges, and have attracted great efforts from academia, industry, and government. This unique networking paradigm neces- tates re-examination of many established wireless networking concepts and protocols, and calls for developing new fundamental understanding of problems such as interf- ence, mobility, connectivity, capacity, and security, among others. While it is ess- tial to advance theoretical research on fundamentals and practical research on efficient algorithms and protocols, it is also critical to develop useful applications, experim- tal prototypes, and real-world deployments to achieve a practical impact on our so- ety for the success of this networking paradigm. The annual International Conference on Ad Hoc Networks (AdHocNets) is a new event that aims at providing a forum to bring together researchers from academia as well as practitioners from industry and government to meet and exchange ideas and recent research work on all aspects of ad hoc networks. As the first edition of this event, AdHocNets 2009 was successfully held in Niagara Falls, Ontario, Canada, during September 22-25, 2009.

Computer-Hardware ist heute zwar erschwinglich, dennoch spielt Performance nach wie vor eine wichtige Rolle - auch wegen der Beanspruchung grosser Ressourcen bei komplexen Anwendungen. In dem Band werden drei Ebenen unterschieden (Systeme, Anwendungen und Geschaftsprozesse), auf denen sich Optimierungen erzielen und Kostenpotenziale erschliessen lassen. Entsprechende Theorien, Messmethoden sowie Loesungsvorschlage zur Umsetzung von Optimierungsmassnahmen auf der jeweiligen Ebene werden erlautert. Mit Checklisten fur Messungen und Optimierungsmassnahmen.