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Books > Computing & IT > Computer hardware & operating systems > Computer architecture & logic design > General
Many real-time systems rely on static scheduling algorithms. This includes cyclic scheduling, rate monotonic scheduling and fixed schedules created by off-line scheduling techniques such as dynamic programming, heuristic search, and simulated annealing. However, for many real-time systems, static scheduling algorithms are quite restrictive and inflexible. For example, highly automated agile manufacturing, command, control and communications, and distributed real-time multimedia applications all operate over long lifetimes and in highly non-deterministic environments. Dynamic real-time scheduling algorithms are more appropriate for these systems and are used in such systems. Many of these algorithms are based on earliest deadline first (EDF) policies. There exists a wealth of literature on EDF-based scheduling with many extensions to deal with sophisticated issues such as precedence constraints, resource requirements, system overload, multi-processors, and distributed systems.Deadline Scheduling for Real-Time Systems: EDF and Related Algorithms aims at collecting a significant body of knowledge on EDF scheduling for real-time systems, but it does not try to be all-inclusive (the literature is too extensive). The book primarily presents the algorithms and associated analysis, but guidelines, rules, and implementation considerations are also discussed, especially for the more complicated situations where mathematical analysis is difficult. In general, it is very difficult to codify and taxonomize scheduling knowledge because there are many performance metrics, task characteristics, and system configurations. Also, adding to the complexity is the fact that a variety of algorithms have been designed for different combinations of these considerations. In spite of the recent advances there are still gaps in the solution space and there is a need to integrate the available solutions.For example, a list of issues to consider includes: * preemptive versus non-preemptive tasks, * uni-processors versus multi-processors, * using EDF at dispatch time versus EDF-based planning, * precedence constraints among tasks, * resource constraints, * periodic versus aperiodic versus sporadic tasks, * scheduling during overload, * fault tolerance requirements, and * providing guarantees and levels of guarantees (meeting quality of service requirements). Deadline Scheduling for Real-Time Systems: EDF and Related Algorithms should be of interest to researchers, real-time system designers, and instructors and students, either as a focussed course on deadline-based scheduling for real-time systems, or, more likely, as part of a more general course on real-time computing. The book serves as an invaluable reference in this fast-moving field.
The last decade has seen tremendous growth in usage of the World Wide Web. Web caching is a technology aimed at reducing the transmission of redundant network traffic and improving access to the Web. The key idea in Web caching is to cache frequently- accessed content so that it may be used profitably later. This leads to cost savings, reduction in network traffic, improved access and better content availability. Web Caching and Its Applications gives the reader an understanding of the latest developments in Web caching research. Topics covered include architectural aspects, aspects requiring coordination among caches, aspects related to network traffic, techniques that complement caching, practical aspects, and aspects related to performance. While Web Caching and Its Applications is designed for a professional audience, students will appreciate the exercises for applying the knowledge to solving practical problems related to Web caching and Internet performance. The book includes an exhaustive list of references for further study.
Load Balancing in Parallel Computers: Theory and Practice is about the essential software technique of load balancing in distributed memory message-passing parallel computers, also called multicomputers. Each processor has its own address space and has to communicate with other processors by message passing. In general, a direct, point-to-point interconnection network is used for the communications. Many commercial parallel computers are of this class, including the Intel Paragon, the Thinking Machine CM-5, and the IBM SP2. Load Balancing in Parallel Computers: Theory and Practice presents a comprehensive treatment of the subject using rigorous mathematical analyses and practical implementations. The focus is on nearest-neighbor load balancing methods in which every processor at every step is restricted to balancing its workload with its direct neighbours only. Nearest-neighbor methods are iterative in nature because a global balanced state can be reached through processors' successive local operations. Since nearest-neighbor methods have a relatively relaxed requirement for the spread of local load information across the system, they are flexible in terms of allowing one to control the balancing quality, effective for preserving communication locality, and can be easily scaled in parallel computers with a direct communication network. Load Balancing in Parallel Computers: Theory and Practice serves as an excellent reference source and may be used as a text for advanced courses on the subject.
Formal Methods for Open Object-Based Distributed Systems V brings together research in three important and related fields: * Formal methods; * Distributed systems; * Object-based technology. Such a convergence is representative of recent advances in the field of distributed systems, and provides links between several scientific and technological communities. The wide scope of topics covered in this volume range in subject from UML to object-based languages and calculi and security, and in approach from specification to case studies and verification. This volume comprises the proceedings of the Fifth International Conference on Formal Methods for Open Object-Based Distributed Systems (FMOODS 2002), which was sponsored by the International Federation for Information Processing (IFIP) and held in Enschede, The Netherlands in March 2002.
Automatic transformation of a sequential program into a parallel form is a subject that presents a great intellectual challenge and promises great practical rewards. There is a tremendous investment in existing sequential programs, and scientists and engineers continue to write their application programs in sequential languages (primarily in Fortran),but the demand for increasing speed is constant. The job of a restructuring compiler is to discover the dependence structure of a given program and transform the program in a way that is consistent with both that dependence structure and the characteristics of the given machine. Much attention in this field of research has been focused on the Fortran do loop. This is where one expects to find major chunks of computation that need to be performed repeatedly for different values of the index variable. Many loop transformations have been designed over the years, and several of them can be found in any parallelizing compiler currently in use in industry or at a university research facility. Loop Transformations for Restructuring Compilers: The Foundations provides a rigorous theory of loop transformations. The transformations are developed in a consistent mathematical framework using objects like directed graphs, matrices and linear equations. The algorithms that implement the transformations can then be precisely described in terms of certain abstract mathematical algorithms. The book provides the general mathematical background needed for loop transformations (including those basic mathematical algorithms), discusses data dependence, and introduces the major transformations. The next volume will build a detailed theory of loop transformations based on the material developed here. Loop Transformations for Restructuring Compilers: The Foundations presents a theory of loop transformations that is rigorous and yet reader-friendly.
Active networking is an exciting new paradigm in digital networking that has the potential to revolutionize the manner in which communication takes place. It is an emerging technology, one in which new ideas are constantly being formulated and new topics of research are springing up even as this book is being written. This technology is very likely to appeal to a broad spectrum of users from academia and industry. Therefore, this book was written in a way that enables all these groups to understand the impact of active networking in their sphere of interest. Information services managers, network administrators, and e-commerce developers would like to know the potential benefits of the new technology to their businesses, networks, and applications. The book introduces the basic active networking paradigm and its potential impacts on the future of information handling in general and on communications in particular. This is useful for forward-looking businesses that wish to actively participate in the development of active networks and ensure a head start in the integration of the technology in their future products, be they applications or networks. Areas in which active networking is likely to make significant impact are identified, and the reader is pointed to any related ongoing research efforts in the area. The book also provides a deeper insight into the active networking model for students and researchers, who seek challenging topics that define or extend frontiers of the technology. It describes basic components of the model, explains some of the terms used by the active networking community, and provides the reader with taxonomy of the research being conducted at the time this book was written. Current efforts are classified based on typical research areas such as mobility, security, and management. The intent is to introduce the serious reader to the background regarding some of the models adopted by the community, to outline outstanding issues concerning active networking, and to provide a snapshot of the fast-changing landscape in active networking research. Management is a very important issue in active networks because of its open nature. The latter half of the book explains the architectural concepts of a model for managing active networks and the motivation for a reference model that addresses limitations of the current network management framework by leveraging the powerful features of active networking to develop an integrated framework. It also describes a novel application enabled by active network technology called the Active Virtual Network Management Prediction (AVNMP) algorithm. AVNMP is a pro-active management system; in other words, it provides the ability to solve a potential problem before it impacts the system by modeling network devices within the network itself and running that model ahead of real time.
High Performance Data Mining: Scaling Algorithms, Applications and Systems brings together in one place important contributions and up-to-date research results in this fast moving area. High Performance Data Mining: Scaling Algorithms, Applications and Systems serves as an excellent reference, providing insight into some of the most challenging research issues in the field.
Analog Integrated Circuits deals with the design and analysis of modem analog circuits using integrated bipolar and field-effect transistor technologies. This book is suitable as a text for a one-semester course for senior level or first-year graduate students as well as a reference work for practicing engin eers. Advanced students will also find the text useful in that some of the material presented here is not covered in many first courses on analog circuits. Included in this is an extensive coverage of feedback amplifiers, current-mode circuits, and translinear circuits. Suitable background would be fundamental courses in electronic circuits and semiconductor devices. This book contains numerous examples, many of which include commercial analog circuits. End-of-chapter problems are given, many illustrating practical circuits. Chapter 1 discuses the models commonly used to represent devices used in modem analog integrated circuits. Presented are models for bipolar junction transistors, junction diodes, junction field-effect transistors, and metal-oxide semiconductor field-effect transistors. Both large-signal and small-signal models are developed as well as their implementation in the SPICE circuit simulation program. The basic building blocks used in a large variety of analog circuits are analyzed in Chapter 2; these consist of current sources, dc level-shift stages, single-transistor gain stages, two-transistor gain stages, and output stages. Both bipolar and field-effect transistor implementations are presented. Chapter 3 deals with operational amplifier circuits. The four basic op-amp circuits are analyzed: (1) voltage-feedback amplifiers, (2) current-feedback amplifiers, (3) current-differencing amplifiers, and (4) transconductance ampli fiers. Selected applications are also presented.
In this volume, designed for computational scientists and engineers working on applications requiring the memories and processing rates of large-scale parallelism, leading algorithmicists survey their own field-defining contributions, together with enough historical and bibliographical perspective to permit working one's way to the frontiers. This book is distinguished from earlier surveys in parallel numerical algorithms by its extension of coverage beyond core linear algebraic methods into tools more directly associated with partial differential and integral equations - though still with an appealing generality - and by its focus on practical medium-granularity parallelism, approachable through traditional programming languages. Several of the authors used their invitation to participate as a chance to stand back and create a unified overview, which nonspecialists will appreciate.
Welcome to the third International Conference on Management of Multimedia Networks and Services (MMNS'2000) in Fortaleza (Brazil)! The first MMNS was held in Montreal ( Canada) in july 1997 and the second MMNS was held in Versailles (France) in November 1998. The MMNS conference takes place every year and a half and is aimed to be a truly international event by bringing together researchers and practitioners from all around the world and by organising the conference each time in a different continent/country. Over the past several years, there has been a considerable amount of research within the fields of multimedia networking and network management. Much of that work has taken place within the context of managing Quality-of Service in broadband integrated services digital networks such as the A TM, and more recently in IP-based networks, to respond to the requirements of emerging multimedia applications. A TM networks were designed to support multimedia traffic with diverse characteristics and can be used as the transfer mode for both wired and wireless networks. A new set of Internet protocols is being developed to provide better quality of service, which is a prerequisite for supporting multimedia applications. Multimedia applications have a different set of requirements, which impacts the design of the underlying communication network as well as its management. Several QoS management mechanisms intervening at different layers of the communication network are required including QoS-routing, QoS-based transport, QoS negotiation, QoS adaptation, FCAPS management, and mobility management.
Testing of Communicating Systems XIV presents the latest international results in both the theory and industrial practice of the testing of communicating systems, ranging from tools and techniques for testing to test standards, frameworks, notations, algorithms, fundamentals of testing, and industrial experiences and issues. The tools and techniques discussed apply to conformance testing, interoperability testing, performance testing, Internet protocols and applications, and multimedia and distributed systems in general.
Along with the increasingly important runtime engines pervasive in our daily-life computing, there is a strong demand from the software community for a solid presentation on the design and implementation of modern virtual machines, including the Java virtual machine, JavaScript engine and Android execution engine. The community expects to see not only formal algorithm description, but also pragmatic code snippets; to understand not only research topics, but also engineering solutions. This book meets these demands by providing a unique description that combines high level design with low level implementations and academic advanced topics with commercial solutions. This book takes a holistic approach to the design of VM architecture, with contents organized into a consistent framework, introducing topics and algorithms in an easily understood step by step process. It focuses on the critical aspects of VM design, which are often overlooked in other works, such as runtime helpers, stack unwinding and native interface. The algorithms are fully illustrated in figures and implemented in easy to digest code snippets, making the abstract concepts tangible and programmable for system software developers.
Computing systems are of growing importance because of their wide use in many areas including those in safety-critical systems. This book describes the basic models and approaches to the reliability analysis of such systems. An extensive review is provided and models are categorized into different types. Some Markov models are extended to the analysis of some specific computing systems such as combined software and hardware, imperfect debugging processes, failure correlation, multi-state systems, heterogeneous subsystems, etc. One of the aims of the presentation is that based on the sound analysis and simplicity of the approaches, the use of Markov models can be better implemented in the computing system reliability.
High Performance Networking is a state-of-the-art book that deals with issues relating to the fast-paced evolution of public, corporate and residential networks. It focuses on the practical and experimental aspects of high performance networks and introduces novel approaches and concepts aimed at improving the performance, usability, interoperability and scalability of such systems. Among others, the topics covered include: * Java applets and applications; * distributed virtual environments; * new internet streaming protocols; * web telecollaboration tools; * Internet, Intranet; * real-time services like multimedia; * quality of service; * mobility. High Performance Networking comprises the proceedings of the Eighth International Conference on High Performance Networking, sponsored by the International Federation for Information Processing (IFIP), and was held at Vienna Univrsity of Technology, Vienna, Austria, in September 1998. High Performance Networking is suitable as a secondary text for a graduate level course on high performance networking, and as a reference for researchers and practitioners in industry.
Following an exchange of correspondence, I met Ross in Adelaide in June 1988. I was approached by the University of Adelaide about being an external examiner for this dissertation and willingly agreed. Upon receiving a copy of this work, what struck me most was the scholarship with which Ross approaches and advances this relatively new field of adaptive data compression. This scholarship, coupled with the ability to express himself clearly using figures, tables, and incisive prose, demanded that Ross's dissertation be given a wider audience. And so this thesis was brought to the attention of Kluwer. The modern data compression paradigm furthered by this work is based upon the separation of adaptive context modelling, adaptive statistics, and arithmetic coding. This work offers the most complete bibliography on this subject I am aware of. It provides an excellent and lucid review of the field, and should be equally as beneficial to newcomers as to those of us already in the field.
JR is an extension of the Java programming language with additional concurrency mechanisms based on those in the SR (Synchronizing Resources) programming language. The JR implementation executes on UNIX-based systems (Linux, Mac OS X, and Solaris) and Windows-based systems. It is available free from the JR webpage. This book describes the JR programming language and illustrates how it can be used to write concurrent programs for a variety of applications. This text presents numerous small and large example programs. The source code for all programming examples and the given parts of all programming exercises are available on the JR webpage. Dr. Ronald A. Olsson and Dr. Aaron W. Keen, the authors of this text, are the designers and implementors of JR.
This textbook serves as an introduction to the subject of embedded
systems design, with emphasis on integration of custom hardware
components with software. The key problem addressed in the book is
the following: how can an embedded systems designer strike a
balance between flexibility and efficiency? The book describes how
combining hardware design with software design leads to a solution
to this important computer engineering problem. The book covers
four topics in hardware/software codesign: fundamentals, the design
space of custom architectures, the hardware/software interface and
application examples. The book comes with an associated design
environment that helps the reader to perform experiments in
hardware/software codesign. Each chapter also includes exercises
and further reading suggestions.
This volume is a monograph on parallel optical interconnects. It presents not only the state of-the-art in this domain but also the necessary physical and chemical background. It also provides a discussion of the potential for future devices. Both experts and newcomers to the area will appreciate the authors' proficiency in providing the complete picture of this rapidly growing field. Optical interconnects are already established in telecommunications and should eventually find their way being applied to chip and even gate level connections in integrated systems. The inspiring environment of the Basic Research Working Group on Optical Information Technology WOIT (3199), together with the excellent and complementary skills of its participants, make this contribution highly worthwhile. G. Metakides Table of contents 1 Perspectives for parallel optical interconnects: introduction . . . . . . . . . . . . . . . . . . . . . . . . . l Pierre Chavel and Philippe lAlanne 1. 1 Optical Interconnects and ESPRIT BRA WOIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1. 2 What are optical interconnects? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1. 3 Optical interconnects: how ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1. 3. 1 Passive devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1. 3. 2 Active devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1. 3. 3 Schemes for parallel optical interconnects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1. 3. 4 Limits of optical interconnects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1. 4 Optical interconnects: why ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Acknowledgetnents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 First Section: Components Part 1. 1 Passive interconnect components 2 Free space interconnects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Philippe Lalanne and Pierre ChaveZ 2. 1 Introduction: 3D optical interconnects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2. 2 Optical free space channels and their implementations . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2. 2. 1 Diffraction and degrees of freedom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2. 2. 2 Two Qasic interconnect setups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ."
This book introduces Open Core Protocol (OCP) not as a conventional hardware communications protocol but as a meta-protocol: a means for describing and capturing the communications requirements of an IP core, and mapping them to a specific set of signals with known semantics. Readers will learn the capabilities of OCP as a semiconductor hardware interface specification that allows different System-On-Chip (SoC) cores to communicate. The OCP methodology presented enables intellectual property designers to design core interfaces in standard ways. This facilitates reusing OCP-compliant cores across multiple SoC designs which, in turn, drastically reduces design times, support costs, and overall cost for electronics/SoCs.
1 This year marks the l0 h anniversary of the IFIP International Workshop on Protocols for High-Speed Networks (PfHSN). It began in May 1989, on a hillside overlooking Lake Zurich in Switzerland, and arrives now in Salem Massachusetts 6,000 kilometers away and 10 years later, in its sixth incarnation, but still with a waterfront view (the Atlantic Ocean). In between, it has visited some picturesque views of other lakes and bays of the world: Palo Alto (1990 - San Francisco Bay), Stockholm (1993 - Baltic Sea), Vancouver (1994- the Strait of Georgia and the Pacific Ocean), and Sophia Antipolis I Nice (1996- the Mediterranean Sea). PfHSN is a workshop providing an international forum for the exchange of information on high-speed networks. It is a relatively small workshop, limited to 80 participants or less, to encourage lively discussion and the active participation of all attendees. A significant component of the workshop is interactive in nature, with a long history of significant time reserved for discussions. This was enhanced in 1996 by Christophe Diot and W allid Dabbous with the institution of Working Sessions chaired by an "animator," who is a distinguished researcher focusing on topical issues of the day. These sessions are an audience participation event, and are one of the things that makes PfHSN a true "working conference.
Image and Video Compression Standards: Algorithms and Architectures presents an introduction to the algorithms and architectures that underpin the image and video compression standards, including JPEG (compression of still images), H.261 (video teleconferencing), MPEG-1 and MPEG-2 (video storage and broadcasting). In addition, the book covers the MPEG and Dolby AC-3 audio encoding standards, as well as emerging techniques for image and video compression, such as those based on wavelets and vector quantization. The book emphasizes the foundations of these standards, i.e. techniques such as predictive coding, transform-based coding, motion compensation, and entropy coding, as well as how they are applied in the standards. How each standard is implemented is not dealt with, but the book does provide all the material necessary to understand the workings of each of the compression standards, including information that can be used to evaluate the efficiency of various software and hardware implementations conforming to the standards. Particular emphasis is placed on those algorithms and architectures that have been found to be useful in practical software or hardware implementations. Audience: A valuable reference for the graduate student, researcher or engineer. May also be used as a text for a course on the subject.
Design and Analysis of Distributed Embedded Systems is organized similar to the conference. Chapters 1 and 2 deal with specification methods and their analysis while Chapter 6 concentrates on timing and performance analysis. Chapter 3 describes approaches to system verification at different levels of abstraction. Chapter 4 deals with fault tolerance and detection. Middleware and software reuse aspects are treated in Chapter 5. Chapters 7 and 8 concentrate on the distribution related topics such as partitioning, scheduling and communication. The book closes with a chapter on design methods and frameworks.
Real-time computer systems are very often subject to dependability requirements because of their application areas. Fly-by-wire airplane control systems, control of power plants, industrial process control systems and others are required to continue their function despite faults. Fault-tolerance and real-time requirements thus constitute a kind of natural combination in process control applications. Systematic fault-tolerance is based on redundancy, which is used to mask failures of individual components. The problem of replica determinism is thereby to ensure that replicated components show consistent behavior in the absence of faults. It might seem trivial that, given an identical sequence of inputs, replicated computer systems will produce consistent outputs. Unfortunately, this is not the case. The problem of replica non-determinism and the presentation of its possible solutions is the subject of Fault-Tolerant Real-Time Systems: The Problem of Replica Determinism. The field of automotive electronics is an important application area of fault-tolerant real-time systems. Systems like anti-lock braking, engine control, active suspension or vehicle dynamics control have demanding real-time and fault-tolerance requirements. These requirements have to be met even in the presence of very limited resources since cost is extremely important. Because of its interesting properties Fault-Tolerant Real-Time Systems gives an introduction to the application area of automotive electronics. The requirements of automotive electronics are a topic of discussion in the remainder of this work and are used as a benchmark to evaluate solutions to the problem of replica determinism.
th The 20 anniversary of the IFIP WG6. 1 Joint International Conference on Fonna! Methods for Distributed Systems and Communication Protocols (FORTE XIII / PSTV XX) was celebrated by the year 2000 edition of the Conference, which was held for the first time in Italy, at Pisa, October 10-13, 2000. In devising the subtitle for this special edition --'Fonna! Methods Implementation Under Test' --we wanted to convey two main concepts that, in our opinion, are reflected in the contents of this book. First, the early, pioneering phases in the development of Formal Methods (FM's), with their conflicts between evangelistic and agnostic attitudes, with their over optimistic applications to toy examples and over-skeptical views about scalability to industrial cases, with their misconceptions and myths . . . , all this is essentially over. Many FM's have successfully reached their maturity, having been 'implemented' into concrete development practice: a number of papers in this book report about successful experiences in specifYing and verifYing real distributed systems and protocols. Second, one of the several myths about FM's - the fact that their adoption would eventually eliminate the need for testing - is still quite far from becoming a reality, and, again, this book indicates that testing theory and applications are still remarkably healthy. A total of 63 papers have been submitted to FORTEIPSTV 2000, out of which the Programme Committee has selected 22 for presentation at the Conference and inclusion in the Proceedings.
This book constitutes the thoroughly refereed conference proceedings of the 9th International Symposium on Reconfigurable Computing: Architectures, Tools and Applications, ARC 2013, held in Los Angeles, CA, USA, in March 2013. The 28 revised papers presented, consisting of 20 full papers and 11 poster papers were carefully selected from 41 submissions. The topics covered are applications, arithmetic, design optimization for FPGAs, architectures, place and routing. |
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