It is written in simple language, easy style and elaborate use of diagram make this text book self-explanatory. It discusses the subject in detail covering all major topics.

The well constructed and well explained examples focus your attention on key properties, methods, and events related to each tag or class. The book covers events in Flex and provides tips on debugging event logic. Readers will find their knowledge of JavaScript or ActionScript to be helpful, but not required. And no previous experience with Flex is assumed. * Application Basics * Application Flow and Structure

In 1998-99, at the dawn of the SoC Revolution, we wrote Surviving the SOC Revolution: A Guide to Platform Based Design. In that book, we focused on presenting guidelines and best practices to aid engineers beginning to design complex System-on-Chip devices (SoCs). Now, in 2003, facing the mid-point of that revolution, we believe that it is time to focus on winning.

In this book, Winning the SoC Revolution: Experiences in Real Design, we gather the best practical experiences in how to design SoCs from the most advanced design groups, while setting the issues and techniques in the context of SoC design methodologies. As an edited volume, this book has contributions from the leading design houses who are winning in SoCs - Altera, ARM, IBM, Philips, TI, UC Berkeley, and Xilinx. These chapters present the many facets of SoC design - the platform based approach, how to best utilize IP, Verification, FPGA fabrics as an alternative to ASICs, and next generation process technology issues. We also include observations from Ron Wilson of CMP Media on best practices for SoC design team collaboration. We hope that by utilizing this book, you too, will win the SoC Revolution.

SECIII-Social, Ethical and Cognitive Issues of Informatics and ICT Welcome to the post-conference book of SECIII, the IFIP Open Conference on Social, Ethical and Cognitive Issues of Informatics and ICT (Information and Communication Technology) which took place from July 22-26, 2002 at the University of Dortmund, Germany, in co-operation with the German computer society (Gesellschaft flir Informatik). Unlike most international conferences, those organised within the IFIP education community are active events. This wasn't a dry academic conference - teachers, lecturers and curriculum experts, policy makers, researchers and manufacturers mingled and worked together to explore, reflect and discuss social, ethical and cognitive issues. The added value lies in what they, the participants, took away in new ideas for future research and practice, and in the new networks that were formed, both virtual and real. In addition to Keynote Addresses and Paper Presentations from international authors, there were Provocative Paper sessions, Case Studies, Focussed Debates and Creative Exchange sessions as well as professional Working Groups who debated particular themes. The Focussed Debate sessions helped to stimulate the sense of engagement among conference participants. A Market Place with follow-up Working Groups was a positive highlight and galvanised participants to produce interesting reports. These were presented to the conference on its last day. Cross-fertilisation between the papers generated some surprising and useful cross-referencing and a plethora of social, ethical and cognitive issues emerged in the discussions that followed the paper presentations.

Several aspects of informatics curricula and teaching methods at the university level are reported in this volume, including:
*Challenges in defining an international curriculum;
*The diversity in informatics curricula;
*Computing programs for scientists and engineers;
*Patterns of curriculum design;
*Student interaction;
*Teaching of programming;
*Peer review in education.

This book contains a selection of the papers presented at the Working Conference on Informatics Curricula, Teaching Methods and Best Practice (ICTEM 2002), which was sponsored by the International Federation for Information Processing (IFIP) Working Group 3.2, and held in Florian polis, Brazil in July 2002.

The working groups were organized in three parallel tracks. Working Group 1 discussed the "Directions and Challenges in Informatics Education." The focus of Working Group 2 was "Teaching Programming and Problem Solving." Working Group 3 discussed "Computing: The Shape of an Evolving Discipline." Each working group worked actively and prepared a report with the results of the discussions; these reports are included as the second part of this book.

This unique book deals with the migration of existing hard IP from one technology to another, using repeatable procedures. It will allow CAD practitioners to quickly develop methodologies that capitalize on the large volumes of legacy data available within a company today.

Today more than 90% of all programmable processors are employed in embedded systems. This number is actually not surprising, contemplating that in a typical home you might find one or two PCs equipped with high-performance standard processors, and probably dozens of embedded systems, including electronic entertainment, household, and telecom devices, each of them equipped with one or more embedded processors. The question arises why programmable processors are so popular in embedded system design. The answer lies in the fact that they help to narrow the gap between chip capacity and designer productivity. Embedded processors cores are nothing but one step further towards improved design reuse, just along the lines of standard cells in logic synthesis and macrocells in RTL synthesis in earlier times of IC design. Additionally, programmable processors permit to migrate functionality from hardware to software, resulting in an even improved reuse factor as well as greatly increased flexibility.

The LISA processor design platform (LPDP) presented in Architecture Exploration for Embedded Processors with LISA addresses recent design challenges and results in highly satisfactory solutions. The LPDP covers all major high-level phases of embedded processor design and is capable of automatically generating almost all required software development tools from processor models in the LISA language. It supports a profiling-based, stepwise refinement of processor models down to cycle-accurate and even RTL synthesis models. Moreover, it elegantly avoids model inconsistencies otherwise omnipresent in traditional design flows.

The next step in design reuse is already in sight: SoC platforms, i.e., partially pre-designed multi-processor templates that can be quickly tuned towards given applications thereby guaranteeing a high degree of hardware/software reuse in system-level design. Consequently, the LPDP approach goes even beyond processor architecture design. The LPDP solution explicitly addresses SoC integration issues by offering comfortable APIs for external simulation environments as well as clever solutions for the problem of both efficient and user-friendly heterogeneous multiprocessor debugging.

The design process of digital circuits is often carried out in individual steps, like logic synthesis, mapping, and routing. Since originally the complete process was too complex, it has been split up in several - more or less independent - phases. In the last 40 years powerful algorithms have been developed to find optimal solutions for each of these steps. However, the interaction of these different algorithms has not been considered for a long time. This leads to quality loss e.g. in cases where highly optimized netlists fit badly onto the target architecture. Since the resulting circuits are often far from being optimal and insufficient regarding the optimization criteria, like area and delay, several iterations of the complete design process have to be carried out to get high quality results. This is a very time consuming and costly process. For this reason, some years ago the idea of one-pass synthesis came up. There were two main approaches how to guarantee that a design got "first time right": Combining levels that were split before, e.g. to use layout information already during the logic synthesis phase; Restricting the optimization in one level such that it better fits to the next one. So far, several approaches in these two directions have been presented and new techniques are under development. In Towards One-Pass Synthesis we describe the new paradigm that is used in one-pass synthesis and present examples for the two techniques above. Theoretical and practical aspects are discussed and minimization algorithms are given. This will help people working with synthesis tools and circuit design in general (in industry and academia) to keep informed about recent developments andnew trends in this area.

OmeGA: A Competent Genetic Algorithm for Solving Permutation and Scheduling Problems addresses two increasingly important areas in GA implementation and practice. OmeGA, or the ordering messy genetic algorithm, combines some of the latest in competent GA technology to solve scheduling and other permutation problems. Competent GAs are those designed for principled solutions of hard problems, quickly, reliably, and accurately. Permutation and scheduling problems are difficult combinatorial optimization problems with commercial import across a variety of industries.

This book approaches both subjects systematically and clearly. The first part of the book presents the clearest description of messy GAs written to date along with an innovative adaptation of the method to ordering problems. The second part of the book investigates the algorithm on boundedly difficult test functions, showing principled scale up as problems become harder and longer. Finally, the book applies the algorithm to a test function drawn from the literature of scheduling.

Learning is a critical worldwide problem for humans, essential to create a peaceful and happy world. We have serious problems in learning in both wealthy and poor areas. New approaches to learning are needed, as the current system may not rise to the new challenges. This book proposes a new strategy for learning, worldwide and for all ages of students. Computer-based distance learning would be the major delivery mechanism, with very large numbers of students. The very frequent interactions between the student and the computer would be like that with a skilled human teacher. These interactions would take place in the student's native language, in both directions. A typical interaction would be a question to a student, and a free-form student response. Both voice and keyboard student input would be possible. The learning programs would work with each student until mastery is achieved, adapting to the needs of each. Students would be active learners. The book begins with the problems and goals of learning. It considers possible forms of distance learning, looking at the variables involved, current examples of distance learning, and possible future forms including examples from science fiction. It then investigates student interactions, considering both frequency of interactions and the quality of each interaction. Programs developed in the Educational Technology Center at the University of California, Irvine, illustrate the critical idea of tutorial learning with computers. Production of tutorial learning material and costs for a student hour of learning is discussed. The book ends with suggestions for future progress. Current hardware and software is fully adequate for the tasks described. Development of all required learning units is a major activity. After this development, both better quality of learning and lower costs are very likely. Further experimental work is essential to understand the possibilities.

This book aims at providing a view of the current trends in the development of research on Synthesis and Control of Discrete Event Systems. Papers col lected in this volume are based on a selection of talks given in June and July 2001 at two independent meetings: the Workshop on Synthesis of Concurrent Systems, held in Newcastle upon Tyne as a satellite event of ICATPN/ICACSD and organized by Ph. Darondeau and L. Lavagno, and the Symposium on the Supervisory Control of Discrete Event Systems (SCODES), held in Paris as a satellite event of CAV and organized by B. Caillaud and X. Xie. Synthesis is a generic term that covers all procedures aiming to construct from specifications given as input objects matching these specifications. The ories and applications of synthesis have been studied and developped for long in connection with logics, programming, automata, discrete event systems, and hardware circuits. Logics and programming are outside the scope of this book, whose focus is on Discrete Event Systems and Supervisory Control. The stress today in this field is on a better applicability of theories and algorithms to prac tical systems design. Coping with decentralization or distribution and caring for an efficient realization of the synthesized systems or controllers are of the utmost importance in areas so diverse as the supervision of embedded or man ufacturing systems, or the implementation of protocols in software or in hard ware."

Design automation of electronic and hybrid systems is a steadily growing field of interest and a permanent challenge for researchers in Electronics, Computer Engineering and Computer Science. System Design Automation presents some recent results in design automation of different types of electronic and mechatronic systems. It deals with various topics of design automation, ranging from high level digital system synthesis, through analogue and heterogeneous system analysis and design, up to system modeling and simulation. Design automation is treated from the aspects of its theoretical fundamentals, its basic approach and its methods and tools. Several application cases are presented in detail. The book consists of three chapters: High-Level System Synthesis (Digital Hardware/Software Systems). Here embedded systems, distributed systems and processor arrays as well as hardware-software codesign are treated. Also three special application cases are discussed in detail; Analog and Heterogeneous System Design (System Approach and Methodology). This chapter copes with the analysis and design of hybrid systems comprised of analog and digital, electronic and mechanical components; System Simulation and Evaluation (Methods and Tools). In this chapter object-oriented Modelling, analog system simulation including fault-simulation, parameter optimization and system validation are regarded. The contents of the book are based on material presented at the Workshop System Design Automation (SDA 2000) organised by the Sonderforschungsbereich 358 of the Deutsche Forschungsgemeinschaft at TU Dresden.

This is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign-off. All the verification aspects in this exciting new book are illustrated with a single reference design for Bluetooth application.

The building blocks of today's embedded systems-on-a-chip are complex IP components and programmable processor cores. This means that more and more system functionality is implemented in software rather than in custom hardware. In turn, this indicates a growing need for high-level language compilers, capable of generating efficient code for embedded processors. However, traditional compiler technology hardly keeps pace with new developments in embedded processor architectures. Many existing compilers for DSPs and multimedia processors therefore produce code of insufficient quality with respect to performance and/or code size, and a large part of software for embedded systems is still being developed in assembly languages. As both embedded software as well as processors architectures are getting more and more complex, assembly programming clearly violates the demands for a short time-to-market and high dependability in embedded system design. The goal of this book is to provide new methods and techniques to software and compiler developers, that help to make the necessary step from assembly programming to the use of compilers also in embedded system design. Code Optimization Techniques for Embedded Processors discusses the state-of-the-art in the area of compilers for embedded processors. It presents a collection of new code optimization techniques, dedicated to DSP and multimedia processors. These include: compiler support for DSP address generation units, efficient mapping of data flow graphs to irregular architectures, exploitation of SIMD and conditional instructions, as well as function inlining under code size constraints. Comprehensive experimental evaluations are given forreal-life processors, that indicate the code quality improvements which can be achieved as compared to earlier techniques. In addition, C compiler frontend issues are discussed from a practical viewpoint. Code Optimization Techniques for Embedded Processors is intended for researchers and engineers active in software development for embedded systems, and for compiler developers in academia and industry.

ConieD is the biannual Congress on Computers in Education, organised by the Spanish Association for the Development of Computers in Education (ADIE). The last Congress, held in Puertollano (Ciudad Real), brought together researchers in different areas, ranging from web applications, educational environments, or Human-Computer Interaction to Artificial Intelligence in Education. The common leitmotiv of the major part of the lectures was the World Wide Web. In particular, the focus was on the real possibilities that this media presents in order to make the access of students to educational resources possible anywhere and anytime. This fact was highlighted in the Conclusions of the Congress following this Preface as the Introduction. From the full 92 papers presented to the Programme Committee we have selected the best 24 papers that we are presenting in this book. The selection of papers was a very difficult process, taking into account that the papers presented in the Congress (60) were all good enough to appear in this book. Only the restrictions of the extension of this book have limited the number of papers to 24. These papers represent the current high-quality contributions of Spanish research groups in Computers in Education. Manuel Ortega Cantero Jose Bravo Rodriguez Editors xiii Introduction ConieD'99 (1st National Congress on Computers in Education) has brought together a very important group of Spanish and Latin American researchers devoted to studying the application and use of computers in education."

This is a personal story of the educational process at one of the world's great technological universities. Pepper White entered MIT in 1981 and received his master's degree in mechanical engineering in 1984. His account of his experiences, written in diary form, offers insight into graduate school life in general--including the loneliness and even desperation that can result from the intense pressure to succeed--and the purposes of engineering education in particular. The first professor White met at MIT told him that it did not really matter what he learned there, but that MIT would teach him how to think. This, then, is the story of how one student learned how to think. There have of course been changes at MIT since 1984, but its essence is still the same. White has added a new preface and concluding chapter to this edition to bring the story of his continuing education up to date.

Silicon technology now allows us to build chips consisting of tens of millions of transistors. This technology not only promises new levels of system integration onto a single chip, but also presents significant challenges to the chip designer. As a result, many ASIC developers and silicon vendors are re-examining their design methodologies, searching for ways to make effective use of the huge numbers of gates now available. These designers see current design tools and methodologies as inadequate for developing million-gate ASICs from scratch. There is considerable pressure to keep design team size and design schedules constant even as design complexities grow. Tools are not providing the productivity gains required to keep pace with the increasing gate counts available from deep submicron technology. Design reuse - the use of pre-designed and pre-verified cores - is the most promising opportunity to bridge the gap between available gate-count and designer productivity. Reuse Methodology Manual for System-On-A-Chip Designs, Second Edition outlines an effective methodology for creating reusable designs for use in a System-on-a-Chip (Soe design methodology. Silicon and tool technologies move so quickly that no single methodology can provide a permanent solution to this highly dynamic problem. Instead, this manual is an attempt to capture and incrementally improve on current best practices in the industry, and to give a coherent, integrated view of the design process. Reuse Methodology Manual for System-On-A-Chip Designs, Second Edition will be updated on a regular basis as a result of changing technology and improved insight into the problems of design reuse and its role in producinghigh-quality SoC designs.

From the reviews: "This book crystallizes what may become a defining moment in the electronics industry - the shift to platform-based design. It provides the first comprehensive guidebook for those who will build, and use, the integration platforms that may soon drive the system-on-chip revolution." Electronic Engineering Times