This book provides students and practicing chip designers with an easy-to-follow yet thorough, introductory treatment of the most promising emerging memories under development in the industry. Focusing on the chip designer rather than the end user, this book offers expanded, up-to-date coverage of emerging memories circuit design. After an introduction on the old solid-state memories and the fundamental limitations soon to be encountered, the working principle and main technology issues of each of the considered technologies (PCRAM, MRAM, FeRAM, ReRAM) are reviewed and a range of topics related to design is explored: the array organization, sensing and writing circuitry, programming algorithms and error correction techniques are reviewed comparing the approach followed and the constraints for each of the technologies considered. Finally the issue of radiation effects on memory devices has been briefly treated. Additionally some considerations are entertained about how emerging memories can find a place in the new memory paradigm required by future electronic systems. This book is an up-to-date and comprehensive introduction for students in courses on memory circuit design or advanced digital courses in VLSI or CMOS circuit design. It also serves as an essential, one-stop resource for academics, researchers and practicing engineers.

Microcantilevers for Atomic Force Microscope Data Storage describes a research collaboration between IBM Almaden and Stanford University in which a new mass data storage technology was evaluated. This technology is based on the use of heated cantilevers to form submicron indentations on a polycarbonate surface, and piezoresistive cantilevers to read those indentations. Microcantilevers for Atomic Force Microscope Data Storage describes how silicon micromachined cantilevers can be used for high-density topographic data storage on a simple substrate such as polycarbonate. The cantilevers can be made to incorporate resistive heaters (for thermal writing) or piezoresistive deflection sensors (for data readback). The primary audience for Microcantilevers for Atomic Force Microscope Data Storage is industrial and academic workers in the microelectromechanical systems (MEMS) area. It will also be of interest to researchers in the data storage industry who are investigating future storage technologies.

Smart cards or IC cards offer a huge potential for information processing purposes. The portability and processing power of IC cards allow for highly secure conditional access and reliable distributed information processing. IC cards that can perform highly sophisticated cryptographic computations are already available. Their application in the financial services and telecom industries are well known. But the potential of IC cards go well beyond that. Their applicability in mainstream Information Technology and the Networked Economy is limited mainly by our imagination; the information processing power that can be gained by using IC cards remains as yet mostly untapped and is not well understood. Here lies a vast uncovered research area which we are only beginning to assess, and which will have a great impact on the eventual success of the technology. The research challenges range from electrical engineering on the hardware side to tailor-made cryptographic applications on the software side, and their synergies. This volume comprises the proceedings of the Fourth Working Conference on Smart Card Research and Advanced Applications (CARDIS 2000), which was sponsored by the International Federation for Information Processing (IFIP) and held at the Hewlett-Packard Labs in the United Kingdom in September 2000. CARDIS conferences are unique in that they bring together researchers who are active in all aspects of design of IC cards and related devices and environments, thus stimulating synergy between different research communities from both academia and industry. This volume presents the latest advances in smart card research and applications, and will be essential reading for smart card developers, smart card application developers, and computer science researchers involved in computer architecture, computer security, and cryptography.

This definitive new volume brings together scientists from government, industry, and the academic worlds to explore ways in which to capitalize on resources for new ventures into the next generation of supercomputers. The wealth of information on state-of-the-art scientific developments contained in this single volume makes Supercomputers an invaluable resource for management scholars and government policymakers interested in high technology companies and strategic planning.

CMOS Memory Circuits is a systematic and comprehensive reference work designed to aid in the understanding of CMOS memory circuits, architectures, and design techniques. CMOS technology is the dominant fabrication method and almost the exclusive choice for semiconductor memory designers. Both the quantity and the variety of complementary-metal-oxide-semiconductor (CMOS) memories are staggering. CMOS memories are traded as mass-products worldwide and are diversified to satisfy nearly all practical requirements in operational speed, power, size, and environmental tolerance. Without the outstanding speed, power, and packing density characteristics of CMOS memories, neither personal computing, nor space exploration, nor superior defense systems, nor many other feats of human ingenuity could be accomplished. Electronic systems need continuous improvements in speed performance, power consumption, packing density, size, weight, and costs. These needs continue to spur the rapid advancement of CMOS memory processing and circuit technologies. CMOS Memory Circuits is essential for those who intend to (1) understand, (2) apply, (3) design and (4) develop CMOS memories.

Written for scientists, researchers, and engineers, Non-volatile Memories describes the recent research and implementations in relation to the design of a new generation of non-volatile electronic memories. The objective is to replace existing memories (DRAM, SRAM, EEPROM, Flash, etc.) with a universal memory model likely to reach better performances than the current types of memory: extremely high commutation speeds, high implantation densities and retention time of information of about ten years.

Now in its fifth edition, bridges the gap between the technical specifications and the real world of designing and programming devices that connect over the Universal Serial Bus (USB). Readers will learn how to select the appropriate USB speed, device class, and hardware for a device; communicate with devices using Visual C# and Visual Basic; use standard host drivers to access devices, including devices that perform vendor-defined tasks; save power with USB's built-in power-conserving protocols; and create robust designs using testing and debugging tools. This fully revised edition also includes instruction on how to increase bus speed with SuperSpeed and SuperSpeedPlus, implement wireless communications, and develop for USB On-The-Go and embedded hosts.

The recent boom in the mobile telecommunication market has captured the interest of electronic and communication companies worldwide. In order to cut costs, and to decrease volume and power consumption, research is ongoing which focuses on the integration of a complete RF transceiver on a single die. This book discusses for the first time an important building block in such a single-chip wireless transceiver, that is, the frequency synthesizer. CMOS Wireless Frequency Synthesizer Design starts off with a comprehensive overview of possible synthesizer architectures together with a discussion of the general PLL theory. It goes on to present an easy calculation method of predicting LC-tuned VCO phase noise. Practical designs are presented which illustrate in detail the implementation of monolithic LC-tuned VCOs, using either bonding-wire inductors or hollow planar inductors. It is demonstrated that such designs can achieve the required phase noise specifications using standard CMOS technology. CMOS Wireless Frequency Synthesizer Design also discusses the other PLL building blocks such as the high-speed frequency divider. The phase-switching multi-modulus prescaler architecture, which combines high input frequencies with a programmable division factor, is presented in chapter 6. A concluding chapter combines all the gathered knowledge and presents the first monolithic standard CMOS frequency synthesizer that achieves the DCS-1800 specifications. CMOS Wireless Frequency Synthesizer Design is essential reading for all researchers and practicing engineers working in the design of wireless communication systems requiring highly integrated RF transceivers and frequency synthesizers.

Floating Gate Devices: Operation and Compact Modeling focuses on standard operations and compact modeling of memory devices based on Floating Gate architecture. Floating Gate devices are the building blocks of Flash, EPROM, EEPROM memories. Flash memories, which are the most versatile nonvolatile memories, are widely used to store code (BIOS, Communication protocol, Identification code, ) and data (solid-state Hard Disks, Flash cards for digital cameras, ).
The reader, who deals with Floating Gate memory devices at different levels - from test-structures to complex circuit design - will find an essential explanation on device physics and technology, and also circuit issues which must be fully understood while developing a new device. Device engineers will use this book to find simplified models to design new process steps or new architectures. Circuit designers will find the basic theory to understand the use of compact models to validate circuits against process variations and to evaluate the impact of parameter variations on circuit performances.
Floating Gate Devices: Operation and Compact Modeling is meant to be a basic tool for designing the next generation of memory devices based on FG technologies.

Storage Management in Data Centers helps administrators tackle the complexity of data center mass storage. It shows how to exploit the potential of Veritas Storage Foundation by conveying information about the design concepts of the software as well as its architectural background. Rather than merely showing how to use Storage Foundation, it explains why to use it in a particular way, along with what goes on inside. Chapters are split into three sections: An introductory part for the novice user, a full-featured part for the experienced, and a technical deep dive for the seasoned expert. An extensive troubleshooting section shows how to fix problems with volumes, plexes, disks and disk groups. A snapshot chapter gives detailed instructions on how to use the most advanced point-in-time copies. A tuning chapter will help you speed up and benchmark your volumes. And a special chapter on split data centers discusses latency issues as well as remote mirroring mechanisms and cross-site volume maintenance. All topics are covered with the technical know how gathered from an aggregate thirty years of experience in consulting and training in data centers all over the world.

Magnetic random-access memory (MRAM) is poised to replace traditional computer memory based on complementary metal-oxide semiconductors (CMOS). MRAM will surpass all other types of memory devices in terms of nonvolatility, low energy dissipation, fast switching speed, radiation hardness, and durability. Although toggle-MRAM is currently a commercial product, it is clear that future developments in MRAM will be based on spin-transfer torque, which makes use of electrons spin angular momentum instead of their charge. MRAM will require an amalgamation of magnetics and microelectronics technologies. However, researchers and developers in magnetics and in microelectronics attend different technical conferences, publish in different journals, use different tools, and have different backgrounds in condensed-matter physics, electrical engineering, and materials science. This book is an introduction to MRAM for microelectronics engineers written by specialists in magnetic materials and devices. It presents the basic phenomena involved in MRAM, the materials and film stacks being used, the basic principles of the various types of MRAM (toggle and spin-transfer torque; magnetized in-plane or perpendicular-to-plane), the back-end magnetic technology, and recent developments toward logic-in-memory architectures. It helps bridge the cultural gap between the microelectronics and magnetics communities.

This book examines the field of parallel database management systems and illustrates the great variety of solutions based on a shared-storage or a shared-nothing architecture. Constantly dropping memory prices and the desire to operate with low-latency responses on large sets of data paved the way for main memory-based parallel database management systems. However, this area is currently dominated by the shared-nothing approach in order to preserve the in-memory performance advantage by processing data locally on each server. The main argument this book makes is that such an unilateral development will cease due to the combination of the following three trends: a) Today's network technology features remote direct memory access (RDMA) and narrows the performance gap between accessing main memory on a server and of a remote server to and even below a single order of magnitude. b) Modern storage systems scale gracefully, are elastic and provide high-availability. c) A modern storage system such as Stanford's RAM Cloud even keeps all data resident in the main memory. Exploiting these characteristics in the context of a main memory-based parallel database management system is desirable. The book demonstrates that the advent of RDMA-enabled network technology makes the creation of a parallel main memory DBMS based on a shared-storage approach feasible.

Compact Low-Voltage and High-Speed CMOS, BiCMOS and Bipolar Operational Amplifiers discusses the design of integrated operational amplifiers that approach the limits of low supply voltage or very high bandwidth. The resulting realizations span the whole field of applications from micro-power CMOS VLSI amplifiers to 1-GHz bipolar amplifiers. The book presents efficient circuit topologies in order to combine high performance with simple solutions. In total twelve amplifier realizations are discussed. Two bipolar amplifiers are discussed, a 1-GHz operational amplifier and an amplifier with a high ratio between the maximum output current and the quiescent current. Five amplifiers have been designed in CMOS technology, extremely compact circuits that can operate on supply voltages down to one gate-source voltage and two saturation voltages which equals about 1.4 V and, ultimate-low-voltage amplifiers that can operate on supply voltages down to one gate-source voltage and one saturation voltage which amounts to about 1.2 V. In BiCMOS technology five amplifiers have been designed. The first two amplifiers are based on a compact topology. Two other amplifiers are designed to operate on low supply voltages down to 1.3 V. The final amplifier has a unity-gain frequency of 200 MHz and can operate down to 2.5 V. Compact Low-Voltage and High-Speed CMOS, BiCMOS and Bipolar Operational Amplifiers is intended for the professional analog designer. Also, it is suitable as a text book for advanced courses in amplifier design.

This book provides an introduction to digital storage for consumer electronics. It discusses the various types of digital storage, including emerging non-volatile solid-state storage technologies and their advantages and disadvantages. It discusses the best practices for selecting, integrating, and using storage devices for various applications. It explores the networking of devices into an overall organization that results in always-available home storage combined with digital storage in the cloud to create an infrastructure to support emerging consumer applications and the Internet of Things. It also looks at the role of digital storage devices in creating security and privacy in consumer products.

In fabrication of FeRAMs, various academic and technological backgrounds are necessary, which include ferroelectric materials, thin film formation, device physics, circuit design, and so on. This book covers from fundamentals to applications of ferroelectric random access memories (FeRAMs). The book consists of 5 parts: (1) ferroelectric thin films, (2) deposition and characterization methods, (3) fabrication process and circuit design, (4) advanced-type memories, and (5) applications and future prospects; each part is further divided into several chapters. Because of the wide range of topics discussed, each chapter in this book was written by one of the best authors knowing the specific topic very well. Thus, this is a good introductory book on FeRAM for graduate students and newcomers to this field; it also helps specialists to understand FeRAMs more deeply.

With the multiple overwrite feature, rewritable optical discs have found application in consumer DVD+RW video recorders, professional archiving systems and computer drives for data storage, replacing the floppy disc in the latter case. Optical Data Storage provides an overview of the recording principles, materials aspects, and application areas of phase-change optical storage. Some theoretical background is given to familiarize the reader with the basics of the phase-change processes. Elements of data recording, including mark formation, eraseability, direct overwrite strategies, data quality and data stability, etc. are explained and extensively discussed. A mark formation model is described and used throughout the whole book to back up measurement results and support the applications discussed. Two major aspects - high-speed and dual-layer recording are considered in depth and solutions to achieve higher performance are analyzed.

The primary goal of The Design and Implementation of Low-Power CMOS Radio Receivers is to explore techniques for implementing wireless receivers in an inexpensive complementary metal-oxide-semiconductor (CMOS) technology. Although the techniques developed apply somewhat generally across many classes of receivers, the specific focus of this work is on the Global Positioning System (GPS). Because GPS provides a convenient vehicle for examining CMOS receivers, a brief overview of the GPS system and its implications for consumer electronics is presented. The GPS system comprises 24 satellites in low earth orbit that continuously broadcast their position and local time. Through satellite range measurements, a receiver can determine its absolute position and time to within about 100m anywhere on Earth, as long as four satellites are within view. The deployment of this satellite network was completed in 1994 and, as a result, consumer markets for GPS navigation capabilities are beginning to blossom. Examples include automotive or maritime navigation, intelligent hand-off algorithms in cellular telephony, and cellular emergency services, to name a few. Of particular interest in the context of this book are embedded GPS applications where a GPS receiver is just one component of a larger system. Widespread proliferation of embedded GPS capability will require receivers that are compact, cheap and low-power. The Design and Implementation of Low-Power CMOS Radio Receivers will be of interest to professional radio engineers, circuit designers, professors and students engaged in integrated radio research and other researchers who work in the radio field.

This book provides a comprehensive introduction to embedded flash memory, describing the history, current status, and future projections for technology, circuits, and systems applications. The authors describe current main-stream embedded flash technologies from floating-gate 1Tr, floating-gate with split-gate (1.5Tr), and 1Tr/1.5Tr SONOS flash technologies and their successful creation of various applications. Comparisons of these embedded flash technologies and future projections are also provided. The authors demonstrate a variety of embedded applications for auto-motive, smart-IC cards, and low-power, representing the leading-edge technology developments for eFlash. The discussion also includes insights into future prospects of application-driven non-volatile memory technology in the era of smart advanced automotive system, such as ADAS (Advanced Driver Assistance System) and IoE (Internet of Everything). Trials on technology convergence and future prospects of embedded non-volatile memory in the new memory hierarchy are also described. Introduces the history of embedded flash memory technology for micro-controller products and how embedded flash innovations developed; Includes comprehensive and detailed descriptions of current main-stream embedded flash memory technologies, sub-system designs and applications; Explains why embedded flash memory requirements are different from those of stand-alone flash memory and how to achieve specific goals with technology development and circuit designs; Describes a mature and stable floating-gate 1Tr cell technology imported from stand-alone flash memory products - that then introduces embedded-specific split-gate memory cell technologies based on floating-gate storage structure and charge-trapping SONOS technology and their eFlash sub-system designs; Describes automotive and smart-IC card applications requirements and achievements in advanced eFlash beyond 4 0nm node.

This book describes the technology of charge-trapping non-volatile memories and their uses. The authors explain the device physics of each device architecture and provide a concrete description of the materials involved and the fundamental properties of the technology. Modern material properties, used as charge-trapping layers, for new applications are introduced. Provides a comprehensive overview of the technology for charge-trapping non-volatile memories; Details new architectures and current modeling concepts for non-volatile memory devices; Focuses on conduction through multi-layer gate dielectrics stacks.

The more rapid rate of increase in the speed of microprocessor technology than in memory speeds has created a serious 'memory gap' for computer designers and manufacturers. "High Performance Memory Systems" addresses this issue and examines all aspects of improving the memory system performance of general-purpose programs. Current research highlights from both industry and academia focus on: coherence, synchronization, and allocation; power-awareness, reliability, and reconfigurability; software-based memory tuning; architecture design issues; and workload considerations. Topics and features: *both harware and software approaches to scalability and speed disparities are considered *introductory chapter provides broad examination of high performance memory systems *includes coverage of topics from several important international conferences Edited by leading international authorities in the field, this new work provides a survey from researchers and practitioners on advances in technology, architecture, and algorithms that address scalability needs in multiprocessors and the expanding gap between CPU/network and memory speeds. It is ideally suited to researchers and R & D professionals with interests or practice in computer engineering, computer architecture, and processor architecture.

Verification of real-time requirements in systems-on-chip becomes more complex as more applications are integrated. Predictable and composable systems can manage the increasing complexity using formal verification and simulation. This book explains the concepts of predictability and composability and shows how to apply them to the design and analysis of a memory controller, which is a key component in any real-time system.

This book presents the basics of both NAND flash storage and machine learning, detailing the storage problems the latter can help to solve. At a first sight, machine learning and non-volatile memories seem very far away from each other. Machine learning implies mathematics, algorithms and a lot of computation; non-volatile memories are solid-state devices used to store information, having the amazing capability of retaining the information even without power supply. This book will help the reader understand how these two worlds can work together, bringing a lot of value to each other. In particular, the book covers two main fields of application: analog neural networks (NNs) and solid-state drives (SSDs). After reviewing the basics of machine learning in Chapter 1, Chapter 2 shows how neural networks can mimic the human brain; to accomplish this result, neural networks have to perform a specific computation called vector-by-matrix (VbM) multiplication, which is particularly power hungry. In the digital domain, VbM is implemented by means of logic gates which dictate both the area occupation and the power consumption; the combination of the two poses serious challenges to the hardware scalability, thus limiting the size of the neural network itself, especially in terms of the number of processable inputs and outputs. Non-volatile memories (phase change memories in Chapter 3, resistive memories in Chapter 4, and 3D flash memories in Chapter 5 and Chapter 6) enable the analog implementation of the VbM (also called "neuromorphic architecture"), which can easily beat the equivalent digital implementation in terms of both speed and energy consumption. SSDs and flash memories are strictly coupled together; as 3D flash scales, there is a significant amount of work that has to be done in order to optimize the overall performances of SSDs. Machine learning has emerged as a viable solution in many stages of this process. After introducing the main flash reliability issues, Chapter 7 shows both supervised and un-supervised machine learning techniques that can be applied to NAND. In addition, Chapter 7 deals with algorithms and techniques for a pro-active reliability management of SSDs. Last but not least, the last section of Chapter 7 discusses the next challenge for machine learning in the context of the so-called computational storage. No doubt that machine learning and non-volatile memories can help each other, but we are just at the beginning of the journey; this book helps researchers understand the basics of each field by providing real application examples, hopefully, providing a good starting point for the next level of development.

Gain a thorough understanding of today's sometimes daunting, ever-changing world of technology as you learn how to apply the latest technology to your academic, professional and personal life with TECHNOLOGY FOR SUCCESS: COMPUTER CONCEPTS. Written by a team of best-selling technology authors and based on extensive research and feedback from students like you, this edition breaks each topic into brief, inviting lessons that address the "what, why and how" behind digital advancements to ensure deep understanding and application to today's real world. Optional online MindTap and SAM (Skills Assessment Manager) learning tools offer hands-on and step-by-step training, videos that cover the more difficult concepts and simulations that challenge you to solve problems in the actual world. You leave this course able to read the latest technology news and understand its impact on your daily life, the economy and society.

This book pioneers the field of gain-cell embedded DRAM (GC-eDRAM) design for low-power VLSI systems-on-chip (SoCs). Novel GC-eDRAMs are specifically designed and optimized for a range of low-power VLSI SoCs, ranging from ultra-low power to power-aware high-performance applications. After a detailed review of prior-art GC-eDRAMs, an analytical retention time distribution model is introduced and validated by silicon measurements, which is key for low-power GC-eDRAM design. The book then investigates supply voltage scaling and near-threshold voltage (NTV) operation of a conventional gain cell (GC), before presenting novel GC circuit and assist techniques for NTV operation, including a 3-transistor full transmission-gate write port, reverse body biasing (RBB), and a replica technique for optimum refresh timing. Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy.