A Flash memory is a Non Volatile Memory (NVM) whose "unit cells" are fabricated in CMOS technology and programmed and erased electrically. In 1971, Frohman-Bentchkowsky developed a folating polysilicon gate tran sistor [1, 2], in which hot electrons were injected in the floating gate and removed by either Ultra-Violet (UV) internal photoemission or by Fowler Nordheim tunneling. This is the "unit cell" of EPROM (Electrically Pro grammable Read Only Memory), which, consisting of a single transistor, can be very densely integrated. EPROM memories are electrically programmed and erased by UV exposure for 20-30 mins. In the late 1970s, there have been many efforts to develop an electrically erasable EPROM, which resulted in EEPROMs (Electrically Erasable Programmable ROMs). EEPROMs use hot electron tunneling for program and Fowler-Nordheim tunneling for erase. The EEPROM cell consists of two transistors and a tunnel oxide, thus it is two or three times the size of an EPROM. Successively, the combination of hot carrier programming and tunnel erase was rediscovered to achieve a single transistor EEPROM, called Flash EEPROM. The first cell based on this concept has been presented in 1979 [3]; the first commercial product, a 256K memory chip, has been presented by Toshiba in 1984 [4]. The market did not take off until this technology was proven to be reliable and manufacturable [5].

The primary goal of The Design and Implementation of Low-Power CMOS Radio Receivers is to explore techniques for implementing wireless receivers in an inexpensive complementary metal-oxide-semiconductor (CMOS) technology. Although the techniques developed apply somewhat generally across many classes of receivers, the specific focus of this work is on the Global Positioning System (GPS). Because GPS provides a convenient vehicle for examining CMOS receivers, a brief overview of the GPS system and its implications for consumer electronics is presented. The GPS system comprises 24 satellites in low earth orbit that continuously broadcast their position and local time. Through satellite range measurements, a receiver can determine its absolute position and time to within about 100m anywhere on Earth, as long as four satellites are within view. The deployment of this satellite network was completed in 1994 and, as a result, consumer markets for GPS navigation capabilities are beginning to blossom. Examples include automotive or maritime navigation, intelligent hand-off algorithms in cellular telephony, and cellular emergency services, to name a few. Of particular interest in the context of this book are embedded GPS applications where a GPS receiver is just one component of a larger system. Widespread proliferation of embedded GPS capability will require receivers that are compact, cheap and low-power. The Design and Implementation of Low-Power CMOS Radio Receivers will be of interest to professional radio engineers, circuit designers, professors and students engaged in integrated radio research and other researchers who work in the radio field.

Now presenting extra product specific material on the new DDR SDRAMs, ESDRAMs and DDR ESDRAMs, Direct Rambus DRAMs, SLDRAM, VCDRAM, SGRAM and DDR SGRAM, and DP-DRAM. Fully updated to incorporate the latest industry achievements in this fast-moving field, High Performance Memories, Revised provides an overview of the issues involved in advanced memory design. Drawing on her work at the cutting edge of memory technology, Prince surveys the latest trends in development and assesses the range of memory devices and systems available. New features include:

• Examination of the latest DRAMs standards
• Discussion of electrical characteristics of high speed memories including SSTL interfaces and techniques in the testing of fast RAMS
• Coverage of the effect of packaging on memory speed, encompassing DDR DRAM, DR-DRAM and SLDRAM

Written by an internationally respected author, this comprehensively revised edition will be a boon to practising engineers involved in the design and manufacture of high speed systems and semiconductor memories. Advanced students of electrical engineering and researchers in computing and telecommunications will find High Performance Memories, Revised an invaluable reference.

This is a book for the PC user who would like to understand how their PCs work. It is written for the reader who is not a computer or electrical engineer but who wants enough information so that they can make intelligent buying or upgrading decisions, maximize their productivity, and become less dependant on others for help with their computer questions and problems. The book provides a thorough yet concise description of the entire IBM-type PC, including its subsystems, components, and peripherals. The book concentrates on PCs based on the Pentium and Petium Pro class processors. The book contains easy-to-do experiments that readers can perform to actually see how things work. Understanding PC Computer Hardware can be read cover to cover or used as reference source.

Microcantilevers for Atomic Force Microscope Data Storage describes a research collaboration between IBM Almaden and Stanford University in which a new mass data storage technology was evaluated. This technology is based on the use of heated cantilevers to form submicron indentations on a polycarbonate surface, and piezoresistive cantilevers to read those indentations. Microcantilevers for Atomic Force Microscope Data Storage describes how silicon micromachined cantilevers can be used for high-density topographic data storage on a simple substrate such as polycarbonate. The cantilevers can be made to incorporate resistive heaters (for thermal writing) or piezoresistive deflection sensors (for data readback). The primary audience for Microcantilevers for Atomic Force Microscope Data Storage is industrial and academic workers in the microelectromechanical systems (MEMS) area. It will also be of interest to researchers in the data storage industry who are investigating future storage technologies.

The Compact Disc (CD), as a standardized information carrier, has become one of the most successful consumer products ever marketed. Although the original disc was intended for audio playback, its specific advantages opened very quickly the way towards various computer applications. The standardization of the Compact Disc Read-Only Memory (CD-ROM) and of all succeeding similar products, like Compact Disc interactive (CD-i), Photo and Video CD, CD Recordable (CD-R), and CD Rewritable (CD R/W), has substantially enlarged the range of possible applications. The plastic disc represented from the very beginning a removable medium of large storage capacity. The advent of the personal computer accompa nied by the increasing demand for both data distribution and exchange have strongly marked the evolution of the CD-ROM drive. The number of sold CD-ROM units exceeded 60 millions in 1997 when compared to about 2.5 millions in 1992. As computing power continuously improved over the years, computer pe ripherals have also targeted better performance specifications. In particular, the speed of CD-ROM drives increased from the so-called 1X in 1984 to dou ble speed in 1992, and further to 32X at the beginning of 1998. The average time needed to access data on disc has dropped from about 300 ms to less than 90 ms within the same period of time."

The recent boom in the mobile telecommunication market has captured the interest of electronic and communication companies worldwide. In order to cut costs, and to decrease volume and power consumption, research is ongoing which focuses on the integration of a complete RF transceiver on a single die. This book discusses for the first time an important building block in such a single-chip wireless transceiver, that is, the frequency synthesizer. CMOS Wireless Frequency Synthesizer Design starts off with a comprehensive overview of possible synthesizer architectures together with a discussion of the general PLL theory. It goes on to present an easy calculation method of predicting LC-tuned VCO phase noise. Practical designs are presented which illustrate in detail the implementation of monolithic LC-tuned VCOs, using either bonding-wire inductors or hollow planar inductors. It is demonstrated that such designs can achieve the required phase noise specifications using standard CMOS technology. CMOS Wireless Frequency Synthesizer Design also discusses the other PLL building blocks such as the high-speed frequency divider. The phase-switching multi-modulus prescaler architecture, which combines high input frequencies with a programmable division factor, is presented in chapter 6. A concluding chapter combines all the gathered knowledge and presents the first monolithic standard CMOS frequency synthesizer that achieves the DCS-1800 specifications. CMOS Wireless Frequency Synthesizer Design is essential reading for all researchers and practicing engineers working in the design of wireless communication systems requiring highly integrated RF transceivers and frequency synthesizers.

This state-of-the-art monograph presents a coherent survey of a variety of methods and systems for formal hardware verification. It emphasizes the presentation of approaches that have matured into tools and systems usable for the actual verification of nontrivial circuits. All in all, the book is a representative and well-structured survey on the success and future potential of formal methods in proving the correctness of circuits. The various chapters describe the respective approaches supplying theoretical foundations as well as taking into account the application viewpoint. By applying all methods and systems presented to the same set of IFIP WG10.5 hardware verification examples, a valuable and fair analysis of the strenghts and weaknesses of the various approaches is given.

This book constitutes the refereed proceedings of the 7th International Workshop on Field Programmable Logic and Applications, FPL '97, held in London, UK, in September 1997. The 51 revised full papers in the volume were carefully selected from a large number of high-quality papers. The book is divided into sections on devices and architectures, devices and systems, reconfiguration, design tools, custom computing and codesign, signal processing, image and video processing, sensors and graphics, color and robotics, and applications.

Formal methods for hardware design still find limited use in industry. Yet current practice has to change to cope with decreasing design times and increasing quality requirements. This research report presents results from the Esprit project FORMAT (formal methods in hardware verification) which involved the collaboration of the enterprises Siemens, Italtel, Telefonica I+D, TGI, and AHL, the research institute OFFIS, and the universities of Madrid and Passau. The work presented involves advanced specification languages for hardware design that are intuitive to the designer, like timing diagrams and state based languages, as well as their relation to VHDL and formal languages like temporal logic and a process-algebraic calculus. The results of experimental tests of the tools are also presented.

We first began looking at pointing devices and human performance in 1990 when the senior author, Sarah Douglas, was asked to evaluate the human performance ofa rather novel device: a finger-controlled isometric joystick placed under a key on the keyboard. Since 1990 we have been involved in the development and evaluation ofother isometric joysticks, a foot-controlled mouse, a trackball, and a wearable computer with head mounted display. We unabashedly believe that design and evaluation of pointing devices should evolve from a broad spectrum of values which place the human being at the center. These values include performance iss ues such as pointing-time and errors, physical issues such as comfort and health, and contextual issues such as task usabilityand user acceptance. This book chronicles this six-year history of our relationship as teacher (Douglas) and student (Mithal), as we moved from more traditional evalu ation using Fitts' law as the paradigm, to understanding the basic research literature on psychomotor behavior. During that process we became pro foundly aware that many designers of pointing devices fail to understand the constraints of human performance, and often do not even consider experimental evaluation critical to usability decisions before marketing a device. We also became aware ofthe fact that, contraryto popularbeliefin the human-computer interaction community, the problem of predicting pointing device performance has not been solved by Fitts' law. Similarly, our expectations were biased by the cognitive revolution of the past 15 years with the beliefpointing device research was 'low-level' and uninter esting."

This book constitutes the refereed proceedings of the First International Conference on Formal Methods in Computer-Aided Design, FMCAD '96, held in Palo Alto, California, USA, in November 1996.
The 25 revised full papers presented were selected from a total of 65 submissions; also included are three invited survey papers and four tutorial contributions. The volume covers all relevant formal aspects of work in computer-aided systems design, including verification, synthesis, and testing.

This book constitutes the refereed proceedings of the Second International Workshop on Memory Management, IWMM '95, held in Kinross, Scotland, in September 1995. It contains 17 full revised papers on all current aspects of memory management; among the topics addressed are garbage collection for parallel, real-time, and distributed memory systems, memory management of distributed and of persistent objects, programming language aspects, hardware-assisted garbage collection, and open-network garbage collection.
In addition, the book presents the invited paper "Dynamic Storage Allocation: A Survey and Review" by a team of four authors from the University of Texas at Austin, which surveys the literature on allocators between 1961 and 1995.

The SISDEP 93 conference proceedings present outstanding research and development results in the area of numerical process and device simulation. The miniaturization of today's semiconductor devices, the usage of new materials and advanced process steps in the development of new semiconductor technologies suggests the design of new computer programs. This trend towards more complex structures and increasingly sophisticated processes demands advanced simulators, such as fully three-dimensional tools for almost arbitrarily complicated geometries. With the increasing need for better models and improved understanding of physical effects, these proceedings support the simulation community and the process- and device engineers who need reliable numerical simulation tools for characterization, prediction, and development. This book covers the following topics: process simulation and equipment modeling, device modeling and simulation of complex structures, device simulation and parameter extraction for circuit models, integration of process, device and circuit simulation, practical applications of simulation, algorithms and software.

Digital Hardware Testing presents realistic transistor-level fault models and testing methods for all types of circuits. The discussion details design-for-testability and built-in self-test methods, with coverage of boundary scan and emerging technologies such as partial scan, cross check, and circular self-test-path.

BiCMOS Technology and Applications, Second Edition provides a synthesis of available knowledge about the combination of bipolar and MOS transistors in a common integrated circuit - BiCMOS. In this new edition all chapters have been updated and completely new chapters on emerging topics have been added. In addition, BiCMOS Technology and Applications, Second Edition provides the reader with a knowledge of either CMOS or Bipolar technology/design a reference with which they can make educated decisions regarding the viability of BiCMOS in their own application. BiCMOS Technology and Applications, Second Edition is vital reading for practicing integrated circuit engineers as well as technical managers trying to evaluate business issues related to BiCMOS. As a textbook, this book is also appropriate at the graduate level for a special topics course in BiCMOS. A general knowledge in device physics, processing and circuit design is assumed. Given the division of the book, it lends itself well to a two-part course; one on technology and one on design. This will provide advanced students with a good understanding of tradeoffs between bipolar and MOS devices and circuits.

This is the first book entirely dedicated to the problem of memory management in programming language implementation. Its originality stems from the diversity of languages and approaches presented: functional programming, logic programming, object oriented programming, and parallel and sequential programming. The book contains 29 selected and refereed papers including 3 survey papers, 4 on distributed systems, 4 on parallelism, 4 on functional languages, 3 on logic programming languages, 3 on object oriented languages, 3 on incremental garbage collection, 2 on improving locality, 2 on massively parallel architectures, and an invited paper on the thermodynamics of garbage collection. The book provides a snapshot of the latest research in the domain of memory management for high-level programming language implementations.

Verilog HDL is the standard hardware description language for the design of digital systems and VLSI devices. This volume shows designers how to describe pieces of hardware functionally in Verilog using a top-down design approach, which is illustrated with a number of large design examples. The work is organized to present material in a progressive manner, beginning with an introduction to Verilog HDL and ending with a complete example of the modelling and testing of a large subsystem.

These proceedings contain the papers presented at a workshop on Designing Correct Circuits, jointly organised by the Universities of Oxford and Glasgow, and held in Oxford on 26-28 September 1990. There is a growing interest in the application to hardware design of the techniques of software engineering. As the complexity of hardware systems grows, and as the cost both in money and time of making design errors becomes more apparent, so there is an eagerness to build on the success of mathematical techniques in program develop ment. The harsher constraints on hardware designers mean both that there is a greater need for good abstractions and rigorous assurances of the trustworthyness of designs, and also that there is greater reason to expect that these benefits can be realised. The papers presented at this workshop consider the application of mathematics to hardware design at several different levels of abstraction. At the lowest level of this spectrum, Zhou and Hoare show how to describe and reason about synchronous switching circuits using UNilY, a formalism that was developed for reasoning about parallel programs. Aagaard and Leeser use standard mathematical tech niques to prove correct their implementation of an algorithm for Boolean simplification. The circuits generated by their formal synthesis system are thus correct by construction. Thuau and Pilaud show how the declarative language LUSTRE, which was designed for program ming real-time systems, can be used to specify synchronous circuits.

This book is a collection of the finalized versions of the papers presented at the third Eurographics Workshop on Graphics Hardware. The diversity of the contributions reflects the widening range of options for graphics hardware that can be exploited due to the constant evolution of VLSI and software technologies. The first part of the book deals with the algorithmic aspects of graphics systems in a hardware-oriented context. Topics are: VLSI design strategies, data distribution for ray-tracing, the advantages of point-driven image generation with respect to VLSI implementation, use of memory and ease of parallelization, ray-tracing, and image reconstruction. The second part is on specific hardware, on content addressable memories and voxel-based systems. The third part addresses parallel systems: massively parallel object-based architectures, two systems in which image generated by individual rendering systems are composited, a transputer-based parallel display processor.

This book provides an introduction to many aspects of computer control. It covers techniques or control algorithm design and tuning of controllers; computer communications; parallel processing; and software design and implementation. The theoretical material is supported by case studies co ering power systems control, robot manipulators, liquid natural as vaporisers, batch control of chemical processes; and active control of aircraft. The book is suitable for practising engineers, postgraduate students and third year undergraduates specialising in control systems. It assumes some knowledge of control systems theory and computer hardware.

An authoritative book for hardware and software designers. Caches are by far the simplest and most effective mechanism for improving computer performance. This innovative book exposes the characteristics of performance-optimal single and multi-level cache hierarchies by approaching the cache design process through the novel perspective of minimizing execution times. It presents useful data on the relative performance of a wide spectrum of machines and offers empirical and analytical evaluations of the underlying phenomena. This book will help computer professionals appreciate the impact of caches and enable designers to maximize performance given particular implementation constraints.

Dieses Buch enthalt die Beitrage der 4. GI/ITG/GMA-Fachtagung uber Fehlertolerierende Rechensysteme, die im September 1989 in einer Reihe von Tagungen in Munchen 1982, Bonn 1984 sowie Bremerhaven 1987 veranstaltet wurde. Die 31 Beitrage, darunter 4 eingeladene, sind teils in deutscher, uberwiegend aber in englischer Sprache verfasst. Insgesamt wird durch diese Beitrage die Entwicklung der Konzeption und Implementierung fehlertoleranter Systeme in den letzten zwei Jahren vor allem in Europa dokumentiert. Samtliche Beitrage berichten uber neue Forschungs- oder Entwicklungsergebnisse.

Of related interest … Digital Telephony John Bellamy "As a departure from conventional treatment of communication theory, the book stresses how systems operate and the rationale behind their design, rather than presenting rigorous analytical formulations." —Telecommunications Journal Both a reference for telecommunication engineers and a text for graduate level engineering and computer science students, this book provides an introduction to all aspects of digital communication, with emphasis on voice digitization, digital transmission, digital switching, network synchronization, network control, and network analysis. Its aim is to present system level design considerations, and then relate the specific equipment to telephone networks around the world, particularly North America. 526 pp. (0 471-08089-6) 1982 A Reference Manual for Telecommunications Engineering Roger L. Freeman Here’s a comprehensive reference for those who design, build, purchase, use, or maintain telecommunications systems, offering the only system design database devoted exclusively to the field. It pulls together a vast amount of information from such diverse sources as CCITT/CCIR, EIA, US Military Standards and Handbooks, NBS, BTL/ATT, REA, and periodicals and monographs published by over twenty principal manufacturers. Covers telephone traffic, transmission factors in telephony, outside plant-metallic pair systems, noise and modulation, radio-frequency data and regulatory information, facsimile transmission, and more. 1504 pp. (0 471-86753-5) 1985