This book provides an engineering insight into how to provide a scalable and robust verification solution with ever increasing design complexity and sizes. It describes SAT-based model checking approaches and gives engineering details on what makes model checking practical. The book brings together the various SAT-based scalable emerging technologies and techniques covered can be synergistically combined into a scalable solution.

Ultra-thin chips are the "smart skin" of a conventional silicon chip. This book shows how very thin and flexible chips can be fabricated and used in many new applications in microelectronics, Microsystems, biomedical and other fields. It provides a comprehensive reference to the fabrication technology, post processing, characterization and the applications of ultra-thin chips.

This book covers the practical application of dependable electronic systems in real industry, such as space, train control and automotive control systems, and network servers/routers. The impact from intermittent errors caused by environmental radiation (neutrons and alpha particles) and EMI (Electro-Magnetic Interference) are introduced together with their most advanced countermeasures. Power Integration is included as one of the most important bases of dependability in electronic systems. Fundamental technical background is provided, along with practical design examples. Readers will obtain an overall picture of dependability from failure causes to countermeasures for their relevant systems or products, and therefore, will be able to select the best choice for maximum dependability.

Cognitive Informatics (CI) is the science of cognitive information processing and its applications in cognitive computing. CI is a transdisciplinary enquiry of computer science, information science, cognitive science, and intelligence science that investigates into the internal information processing mechanisms and processes of the brain. Advances and engineering applications of CI have led to the emergence of cognitive computing and the development of Cognitive Computers (CCs) that reason and learn. As initiated by Yingxu Wang and his colleagues, CC has emerged and developed based on the transdisciplinary research in CI, abstract intelligence (aI), and denotational mathematics after the inauguration of the series of IEEE International Conference on Cognitive Informatics since 2002 at Univ. of Calgary, Stanford Univ., and Tsinghua Univ., etc. This volume in LNCS (subseries of Computational Intelligence), LNCI 323, edited by Y. Wang, D. Zhang, and W. Kinsner, presents the latest development in cognitive informatics and cognitive computing. The book focuses on the explanation of cognitive models of the brain, the layered reference model of the brain, the fundamental mechanisms of abstract intelligence, and the implementation of computational intelligence by autonomous inference and learning engines based on CCs.

Intelligent agents are one of the most promising business tools in our information rich world. An intelligent agent consists of a software system capable of performing intelligent tasks within a dynamic and unpredictable environment. They can be characterised by various attributes including: autonomous, adaptive, collaborative, communicative, mobile, and reactive. Many problems are not well defined and the information needed to make decisions is not available. These problems are not easy to solve using conventional computing approaches. Here, the intelligent agent paradigm may play a major role in helping to solve these problems. This book, written for application researchers, covers a broad selection of research results that demonstrate, in an authoritative and clear manner, the applications of agents within our information society.

Despite the spectacular breakthroughs of the semiconductor industry, the ability to design integrated circuits under stringent time-to-market requirements is lagging behind integration capacity, so far keeping pace with still valid Moore s Law. The resulting gap is threatening with slowing down such a phenomenal growth. The design community believes that it is only by means of powerful CAD tools, design methodologies and even a design paradigm shift, that this design gap can be bridged. In this sense, reuse-based design is seen as a promising solution, and concepts such as IP Block, Virtual Component, and Design Reuse have become commonplace thanks to the significant advances in the digital arena. Unfortunately, the very nature of analog and mixed-signal (AMS) design more subtle, hierarchically loose, and handicraft-demanding has hindered a similar level of consensus and development.

Aiming at the core of the problem, Reuse Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits presents a framework for the reuse-based design of AMS circuits. The framework is founded on three key elements: (1) a CAD-supported hierarchical design flow that facilitates the incorporation of AMS reusable blocks, reduces the overall design time, and expedites the management of increasing AMS design complexity; (2) a complete, clear definition of the AMS reusable block, structured into three separate facets or views: the behavioral, structural, and layout facets, the first two for top-down electrical synthesis and bottom-up verification, the latter used during bottom-up physical synthesis; (3) the design for reusability set of tools, methods, and guidelines that, relying on intensive parameterization as well as on design knowledge capture and encapsulation, allows to produce fully reusable AMS blocks.

Reuse Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits features a very detailed, tutorial, and in-depth coverage of all issues and must-have properties of reusable AMS blocks, as well as a thorough description of the methods and tools necessary to implement them. For the first time, this has been done hierarchically, covering one by one the different stages of the design flow, allowing us to examine how the reusable block yields its benefits, both in design time and correct performance."

This book contains an edited version of the lectures and selected contributions presented during the Advanced Summer Institute (ASI) on "Product Engineering: Tools and Methods based on Virtual Reality" held at Chania (Greece), 30th May - 6th June 2007. The ASI was devoted to the Product Engineering field, with particular attention being given to the aspects related to Virtual Reality (VR) technologies, and their use and added value in engineering.

This book brings together diverse voices from across the field of sustainable human computer interaction (SHCI) to discuss what it means for digital technology to support sustainability and how humans and technology can work together optimally for a more sustainable future. Contemporary digital technologies are hailed by tech companies, governments and academics as leading-edge solutions to the challenges of environmental sustainability; smarter homes, more persuasive technologies, and a robust Internet of Things hold the promise for creating a greener world. Yet, deployments of interactive technologies for such purposes often lead to a paradox: they algorithmically "optimize" heating and lighting of houses without regard to the dynamics of daily life in the home; they can collect and display data that allow us to reflect on energy and emissions, yet the same information can cause us to raise our expectations for comfort and convenience; they might allow us to share best practice for sustainable living through social networking and online communities, yet these same systems further our participation in consumerism and contribute to an ever-greater volume of electronic waste.By acknowledging these paradoxes, this book represents a significant critical inquiry into digital technology's longer-term impact on ideals of sustainability. Written by an interdisciplinary team of contributors this book will be of great interest to students and scholars of human computer interaction and environmental studies.

Networks on Chip presents a variety of topics, problems and approaches with the common theme to systematically organize the on-chip communication in the form of a regular, shared communication network on chip, an NoC for short.

As the number of processor cores and IP blocks integrated on a single chip is steadily growing, a systematic approach to design the communication infrastructure becomes necessary. Different variants of packed switched on-chip networks have been proposed by several groups during the past two years. This book summarizes the state of the art of these efforts and discusses the major issues from the physical integration to architecture to operating systems and application interfaces. It also provides a guideline and vision about the direction this field is moving to. Moreover, the book outlines the consequences of adopting design platforms based on packet switched network. The consequences may in fact be far reaching because many of the topics of distributed systems, distributed real-time systems, fault tolerant systems, parallel computer architecture, parallel programming as well as traditional system-on-chip issues will appear relevant but within the constraints of a single chip VLSI implementation.

The book is organized in three parts. The first deals with system design and methodology issues. The second presents problems and solutions concerning the hardware and the basic communication infrastructure. Finally, the third part covers operating system, embedded software and application. However, communication from the physical to the application level is a central theme throughout the book.

The book serves as an excellent reference source and may be used as a text for advanced courses on the subject.

This book details timing analysis and optimization techniques for circuits with level-sensitive memory elements. It contains a linear programming formulation applicable to the timing analysis of large scale circuits and includes a delay insertion methodology that improves the efficiency of clock skew scheduling. Coverage also provides a framework for and results from implementing timing optimization algorithms in a parallel computing environment.

The Integrated Circuit (IC) industry has gone without a standardized verification approach for decades. This book defines a uniform, standardizable methodology for verifying the logical behavior of an integrated circuit, whether an I/O controller, a microprocessor, or a complete digital system. This book will help Engineers and managers responsible for IC development to bring a single, standards-based methodology to their R & D efforts, cutting costs and improving results.

Analog design is one of the more difficult aspects of electrical engineering. The main reason is the apparently vague decisions an experienced designer makes in optimizing his circuit. To enable fresh designers, like students electrical engineering, to become acquainted with analog circuit design, structuring the analog design process is of utmost importance. Structured Electronic Design: Negative-Feedback Amplifiers presents a design methodology for negative-feedback amplifiers. The design methodology enables to synthesize a topology and to, at the same time, optimize the performance of that topology. Key issues in the design methodology are orthogonalization, hierarchy and simple models. Orthogonalization enables the separate optimization of the three fundamental quality aspects: noise, distortion and bandwidth. Hierarchy ensures that the right decisions are made at the correct level of abstraction. The use of simple models, results in simple calculations yielding maximum-performance indicators that can be used to reject wrong circuits relatively fast. The presented design methodology divides the design of negative-feedback amplifiers in six independent steps. In the first two steps, the feedback network is designed. During those design steps, the active part is assumed to be a nullor, i.e. the performance with respect to noise, distortion and bandwidth is still ideal. In the subsequent four steps, an implementation for the active part is synthesized. During those four steps the topology of the active part is synthesized such that optimum performance is obtained. Firstly, the input stage is designed with respect to noise performance. Secondly, the output stage is designed with respect to clipping distortion. Thirdly, the bandwidth performance is designed, which may require the addition of an additional amplifying stage. Finally, the biasing circuitry for biasing the amplifying stages is designed. By dividing the design in independent design steps, the total global optimization is reduced to several local optimizations. By the specific sequence of the design steps, it is assured that the local optimizations yield a circuit that is close to the global optimum. On top of that, because of the separate dedicated optimizations, the resource use, like power, is tracked clearly. Structured Electronic Design: Negative-Feedback Amplifiers presents in two chapters the background and an overview of the design methodology. Whereafter, in six chapters the separate design steps are treated with great detail. Each chapter comprises several exercises. An additional chapter is dedicated to how to design current sources and voltage source, which are required for the biasing. The final chapter in the book is dedicated to a thoroughly described design example, showing clearly the benefits of the design methodology. In short, this book is valuable for M.Sc.-curriculum Electrical Engineering students, and of course, for researchers and designers who want to structure their knowledge about analog design further.

The development of any Software (Industrial) Intensive System, e.g. critical embedded software, requires both different notations, and a strong devel- ment process. Different notations are mandatory because different aspects of the Software System have to be tackled. A strong development process is mandatory as well because without a strong organization we cannot warrantee the system will meet its requirements. Unfortunately, much more is needed! The different notations that can be used must all possess at least one property: formality. The development process must also have important properties: a exha- tive coverage of the development phases, and a set of well integrated support tools. In Computer Science it is now widely accepted that only formal notations can guarantee a perfect de?ned meaning. This becomes a more and more important issue since software systems tend to be distributed in large systems (for instance in safe public transportation systems), and in small ones (for instance numerous processors in luxury cars). Distribution increases the complexity of embedded software while safety criteria get harder to be met. On the other hand, during the past decade Software Engineering techniques have been improved a lot, and are now currently used to conduct systematic and rigorous development of large software systems. UML has become the de facto standard notation for documenting Software Engineering projects. UML is supported by many CASE tools that offer graphical means for the UML notation.

The updated second edition of this book provides practical information for hardware and software engineers using the SystemVerilog language to verify electronic designs. The author explains methodology concepts for constructing testbenches that are modular and reusable. The book includes extensive coverage of the SystemVerilog 3.1a constructs such as classes, program blocks, randomization, assertions, and functional coverage. This second edition contains a new chapter that covers programs and interfaces as well as chapters with updated information on directed testbench and OOP, layered, and random testbench for an ATM switch.

This book will help engineers write better Verilog/SystemVerilog design and verification code as well as deliver digital designs to market more quickly. It shows over 100 common coding mistakes that can be made with the Verilog and SystemVerilog languages. Each example explains in detail the symptoms of the error, the languages rules that cover the error, and the correct coding style to avoid the error. The book helps digital design and verification engineers to recognize, and avoid, these common coding mistakes. Many of these errors are very subtle, and can potentially cost hours or days of lost engineering time trying to find and debug them.

Verification is increasingly complex, and SystemVerilog is one of the languages that the verification community is turning to. However, no language by itself can guarantee success without proper techniques. Object-oriented programming (OOP), with its focus on managing complexity, is ideally suited to this task.

With this handbook-the first to focus on applying OOP to SystemVerilog-we'll show how to manage complexity by using layers of abstraction and base classes. By adapting these techniques, you will write more "reasonable" code, and build efficient and reusable verification components.

Both a learning tool and a reference, this handbook contains hundreds of real-world code snippets and three professional verification-system examples. You can copy and paste from these examples, which are all based on an open-source, vendor-neutral framework (with code freely available at www.trusster.com).

Learn about OOP techniques such as these:

• Creating classes-code interfaces, factory functions, reuse
• Connecting classes-pointers, inheritance, channels
• Using "correct by construction"-strong typing, base classes
• Packaging it up-singletons, static methods, packages

This book presents a new set of embedded system design techniques called multidimensional data flow, which combine the various benefits offered by existing methodologies such as block-based system design, high-level simulation, system analysis and polyhedral optimization. It describes a novel architecture for efficient and flexible high-speed communication in hardware that can be used both in manual and automatic system design and that offers various design alternatives, balancing achievable throughput with required hardware size. This book demonstrates multidimensional data flow by showing its potential for modeling, analysis, and synthesis of complex image processing applications. These applications are presented in terms of their fundamental properties and resulting design constraints. Coverage includes a discussion of how far the latter can be met better by multidimensional data flow than alternative approaches. Based on these results, the book explains the principles of fine-grained system level analysis and high-speed communication synthesis. Additionally, an extensive review of related techniques is given in order to show their relation to multidimensional data flow.

This self-contained book addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits. The material deals primarily with high-level (architectural or behavioral) energy dissipation.

This book provides insight into the behavior and design of power distribution systems for high speed, high complexity integrated circuits. Also presented are criteria for estimating minimum required on-chip decoupling capacitance. Techniques and algorithms for computer-aided design of on-chip power distribution networks are also described; however, the emphasis is on developing circuit intuition and understanding the principles that govern the design and operation of power distribution systems.

This is the first book to focus on emerging technologies for distributed intelligent decision-making in process planning and dynamic scheduling. It has two sections: a review of several key areas of research, and an in-depth treatment of particular techniques. Each chapter addresses a specific problem domain and offers practical solutions to solve it. The book provides a better understanding of the present state and future trends of research in this area.

Efficient assembly line design is a problem of considerable industrial importance. Assembly Line Design will be bought by technical personnel working in design, planning and production departments in industry as well as managers in industry who want to learn more about concurrent engineering. This book will also be purchased by researchers and postgraduate students in mechanical, manufacturing or micro-engineering.

A set of original results in the ?eld of high-level design of logical control devices and systems is presented in this book. These concern different aspects of such important and long-term design problems, including the following, which seem to be the main ones. First, the behavior of a device under design must be described properly, and some adequate formal language should be chosen for that. Second, effective algorithmsshouldbeusedforcheckingtheprepareddescriptionforcorrectness, foritssyntacticandsemanticveri?cationattheinitialbehaviorlevel.Third, the problem of logic circuit implementation must be solved using some concrete technological base; ef?cient methods of logic synthesis, test, and veri?cation should be developed for that. Fourth, the task of the communication between the control device and controlled objects (and maybe between different control devices)waitsforitssolution.Alltheseproblemsarehardenoughandcannotbe successfully solved without ef?cient methods and algorithms oriented toward computer implementation. Some of these are described in this book. The languages used for behavior description have been descended usually from two well-known abstract models which became classic: Petri nets and ?nite state machines (FSMs). Anyhow, more detailed versions are developed and described in the book, which enable to give more complete information concerningspeci?cqualitiesoftheregardedsystems.Forexample, themodelof parallelautomatonispresented, whichunliketheconventional?niteautomaton can be placed simultaneously into several places, calledpartial. As a base for circuit implementation of control algorithms, FPGA is accepted in majority of cas

In today's competitive world, industries focus on shorter lead times, improved quality, reduced cost, improved productivity and better customer service. This book offers an overview of intelligent computing in manufacturing, discussing modeling, data processing, algorithms and computational analysis of problems encountered in advanced manufacturing. Coverage includes techniques to aid decision makers dealing with multiple, conflicting objectives. Readers will gain knowledge of computational technologies for improving the performance of manufacturing systems.

The book provides a comprehensive description and implementation methodology for the Philips/NXP Aethereal/aelite Network-on-Chip (NoC). The presentation offers a systems perspective, starting from the system requirements and deriving and describing the resulting hardware architectures, embedded software, and accompanying design flow. Readers get an in depth view of the interconnect requirements, not centered only on performance and scalability, but also the multi-faceted, application-driven requirements, in particular composability and predictability. The book shows how these qualitative requirements are implemented in a state-of-the-art on-chip interconnect, and presents the realistic, quantitative costs.

Condition modelling and control is a technique used to enable decision-making in manufacturing processes of interest to researchers and practising engineering. Condition Monitoring and Control for Intelligent Manufacturing will be bought by researchers and graduate students in manufacturing and control and engineering, as well as practising engineers in industries such as automotive and packaging manufacturing.