Johan H. Huijsing This book contains 18 tutorial papers concentrated on 3 topics, each topic being covered by 6 papers. The topics are: Low-Noise, Low-Power, Low-Voltage Mixed-Mode Design with CAD Tools Voltage, Current, and Time References The papers of this book were written by top experts in the field, currently working at leading European and American universities and companies. These papers are the reviewed versions of the papers presented at the Workshop on Advances in Analog Circuit Design. which was held in Villach, Austria, 26-28 April 1995. The chairman of the Workshop was Dr. Franz Dielacher from Siemens, Austria. The program committee existed of Johan H. Huijsing from the Delft University of Technology, Prof.Willy Sansen from the Catholic University of Leuven, and Dr. Rudy 1. van der Plassche from Philips Eindhoven. This book is the fourth of aseries dedicated to the design of analog circuits. The topics which were covered earlier were: Operational Amplifiers Analog to Digital Converters Analog Computer Aided Design Mixed AlD Circuit Design Sensor Interface Circuits Communication Circuits Low-Power, Low-Voltage Integrated Filters Smart Power As the Workshop will be continued year by year, a valuable series of topics will be built up from all the important areas of analog circuit design. I hope that this book will help designers of analog circuits to improve their work and to speed it up.

It is well known that embedded systems have to be implemented efficiently. This requires that processors optimized for certain application domains are used in embedded systems. Such an optimization requires a careful exploration of the design space, including a detailed study of cost/performance tradeoffs. In order to avoid time-consuming assembly language programming during design space exploration, compilers are needed. In order to analyze the effect of various software or hardware configurations on the performance, retargetable compilers are needed that can generate code for numerous different potential hardware configurations. This book provides a comprehensive and up-to-date overview of the fast developing area of retargetable compilers for embedded systems. It describes a large set important tools as well as applications of retargetable compilers at different levels in the design flow. Retargetable Compiler Technology for Embedded Systems is mostly self-contained and requires only fundamental knowledge in software and compiler design. It is intended to be a key reference for researchers and designers working on software, compilers, and processor optimization for embedded systems.

"CAAD Futures" is a bi-annual conference that aims to promote the advancement of computer-aided architectural design in the service of those concerned with the quality of the built environment. The conferences are organized under the auspices of the CAAD Futures Foundation, which has its secretariat at the Eindhoven University of Technology in the Netherlands.

This book contains papers prepared for the 10th CAAD Futures conference that took place at the National Cheng Kung University, 28 to 30 April, 2003. The chapters provide an overview of the state-of-the-art in research on computer-aided architectural design at that time. Information on the CAAD Futures Foundation and its conferences can be found at http: //www.caadfutures.arch.tue.nl

In VLSI CAD, difficult optimization problems have to be solved on a constant basis. Various optimization techniques have been proposed in the past. While some of these methods have been shown to work well in applications and have become somewhat established over the years, other techniques have been ignored. Recently, there has been a growing interest in optimization algorithms based on principles observed in nature, termed Evolutionary Algorithms (EAs). Evolutionary Algorithms in VLSI CAD presents the basic concepts of EAs, and considers the application of EAs in VLSI CAD. It is the first book to show how EAs could be used to improve IC design tools and processes. Several successful applications from different areas of circuit design, like logic synthesis, mapping and testing, are described in detail. Evolutionary Algorithms in VLSI CAD consists of two parts. The first part discusses basic principles of EAs and provides some easy-to-understand examples. Furthermore, a theoretical model for multi-objective optimization is presented. In the second part a software implementation of EAs is supplied together with detailed descriptions of several EA applications. These applications cover a wide range of VLSI CAD, and different methods for using EAs are described. Evolutionary Algorithms in VLSI CAD is intended for CAD developers and researchers as well as those working in evolutionary algorithms and techniques supporting modern design tools and processes.

A major advantage of a direct digital synthesizer is that its output frequency, phase and amplitude can be precisely and rapidly manipulated under digital processor control. This book was written to find possible applications for radio communication systems.

During the last few years Field Programmable Gate Arrays (FPGAs) have become increasingly important. Thanks to recent breakthroughs in technology, FPGAs offer millions of system gates at low cost and considerable speed. Functional decomposition has emerged as an essential technique in automatic logic synthesis for FPGAs. Functional decomposition as a technique to find realizations for Boolean functions was already introduced in the late fifties and early sixties by Ashenhurst, Curtis, Roth and Karp. In recent years, however, it has attracted a great deal of renewed attention, for several reasons. First, it is especially well suited for the synthesis of lookup-table based FPGAs. Also, the increased capacities of today's computers as well as the development of new methods have made the method applicable to larger-scale problems. Modern techniques for functional decomposition profit from the success of Reduced Ordered Binary Decision Diagrams (ROBDDs), data structures that provide compact representations for many Boolean functions occurring in practical applications. We have now seen the development of algorithms for functional decomposition which work directly based on ROBDDs, so that the decomposition algorithm works based on compact representations and not on function tables or decomposition matrices as in previous approaches. The book presents, in a consistent manner, a comprehensive presentation of a multitude of results stemming from the author's as well as various researchers' work in the field. Apart from the basic method, it also covers functional decomposition for incompletely specified functions, decomposition for multi-output functions and non-disjoint decomposition. Functional Decomposition with Application to FPGA Synthesis will be of interest both to researchers and advanced students in logic synthesis, VLSI CAD, and Design Automation as well as professionals working in FPGA design and the development of algorithms for FPGA synthesis.

Today more than 90% of all programmable processors are employed in embedded systems. This number is actually not surprising, contemplating that in a typical home you might find one or two PCs equipped with high-performance standard processors, and probably dozens of embedded systems, including electronic entertainment, household, and telecom devices, each of them equipped with one or more embedded processors. The question arises why programmable processors are so popular in embedded system design. The answer lies in the fact that they help to narrow the gap between chip capacity and designer productivity. Embedded processors cores are nothing but one step further towards improved design reuse, just along the lines of standard cells in logic synthesis and macrocells in RTL synthesis in earlier times of IC design. Additionally, programmable processors permit to migrate functionality from hardware to software, resulting in an even improved reuse factor as well as greatly increased flexibility.

The LISA processor design platform (LPDP) presented in Architecture Exploration for Embedded Processors with LISA addresses recent design challenges and results in highly satisfactory solutions. The LPDP covers all major high-level phases of embedded processor design and is capable of automatically generating almost all required software development tools from processor models in the LISA language. It supports a profiling-based, stepwise refinement of processor models down to cycle-accurate and even RTL synthesis models. Moreover, it elegantly avoids model inconsistencies otherwise omnipresent in traditional design flows.

The next step in design reuse is already in sight: SoC platforms, i.e., partially pre-designed multi-processor templates that can be quickly tuned towards given applications thereby guaranteeing a high degree of hardware/software reuse in system-level design. Consequently, the LPDP approach goes even beyond processor architecture design. The LPDP solution explicitly addresses SoC integration issues by offering comfortable APIs for external simulation environments as well as clever solutions for the problem of both efficient and user-friendly heterogeneous multiprocessor debugging.

This new book on Analog Circuit Design contains the revised contributions of all the tutorial speakers of the eight workshop AACD (Advances in Analog Circuit Design), which was held at Nice, France on March 23-25, 1999. The workshop was organized by Yves Leduc of TI Nice, France. The program committee consisted of Willy Sansen, K.U.Leuven, Belgium, Han Huijsing, T.U.Delft, The Netherlands and Rudy van de Plassche, T.U.Eindhoven, The Netherlands. The aim of these AACD workshops is to bring together a restricted group of about 100 people who are personally advancing the frontiers of analog circuit design to brainstorm on new possibilities and future developments in a restricted number of fields. They are concentrated around three topics. In each topic six speakers give a tutorial presentation. Eighteen papers are thus included in this book. The topics of 1999 are: (X)DSL and other communication systems RF MOST models Integrated filters and oscillators The other topics, which have been coverd before, are: 1992 Operational amplifiers A-D Converters Analog CAD 1993 Mixed-mode A]D design Sensor interfaces Communication circuits 1994 Low-power low-voltage design Integrated filters Smart power 1995 Low-noise low-power low-voltge design Mixed-mode design with CAD tools Voltage, current and time references vii viii 1996 RF CMOS circuit design Bandpass sigma-delta and other data converters Translinear circuits 1997 RF A-D Converters Sensor and actuator interfaces Low-noise oscillators, PLL's and synthesizers 1998 I-Volt electronics Design and implementation of mixed-mode systems Low-noise amplifiers and RF power amplifiers for telecommunications

This book aims at providing a view of the current trends in the development of research on Synthesis and Control of Discrete Event Systems. Papers col lected in this volume are based on a selection of talks given in June and July 2001 at two independent meetings: the Workshop on Synthesis of Concurrent Systems, held in Newcastle upon Tyne as a satellite event of ICATPN/ICACSD and organized by Ph. Darondeau and L. Lavagno, and the Symposium on the Supervisory Control of Discrete Event Systems (SCODES), held in Paris as a satellite event of CAV and organized by B. Caillaud and X. Xie. Synthesis is a generic term that covers all procedures aiming to construct from specifications given as input objects matching these specifications. The ories and applications of synthesis have been studied and developped for long in connection with logics, programming, automata, discrete event systems, and hardware circuits. Logics and programming are outside the scope of this book, whose focus is on Discrete Event Systems and Supervisory Control. The stress today in this field is on a better applicability of theories and algorithms to prac tical systems design. Coping with decentralization or distribution and caring for an efficient realization of the synthesized systems or controllers are of the utmost importance in areas so diverse as the supervision of embedded or man ufacturing systems, or the implementation of protocols in software or in hard ware."

Web Personalization can be de?ned as any set of actions that can tailor the Webexperiencetoaparticularuserorsetofusers. Toachievee?ectivepers- alization, organizationsmustrelyonallavailabledata, includingtheusageand click-stream data (re?ecting user behaviour), the site content, the site str- ture, domainknowledge, aswellasuserdemographicsandpro?les. Inaddition, e?cient and intelligent techniques are needed to mine this data for actionable knowledge, and to e?ectively use the discovered knowledge to enhance the users' Web experience. These techniques must address important challenges emanating from the size and the heterogeneous nature of the data itself, as wellasthedynamicnatureofuserinteractionswiththeWeb. Thesechallenges include the scalability of the personalization solutions, data integration, and successful integration of techniques from machine learning, information - trievaland?ltering, databases, agentarchitectures, knowledgerepresentation, data mining, text mining, statistics, user modelling and human-computer - teraction. The Semantic Web adds one more dimension to this. The workshop will focus on the semantic web approach to personalization and adaptation. The Web has been formed to be an integral part of numerous applications inwhichauserinteractswithaserviceprovider, productsellers, governmental organisations, friends and colleagues. Content and services are available at di?erent sources and places. Hence, Web applications need to combine all available knowledge in order to form personalized, user-friendly, and busine- optimal servi

The chapters of this book summarize the lectures delivered du ring the NATO Advanced Study Institute (ASI) on Computational Methods in Mechanisms, that took place in the Sts. Constantin and Elena Resort, near Varna, on the Bulgarian Coast of the Black Sea, June 16-28, 1997. The purpose of the ASI was to bring together leading researchers in the area of mechanical systems at large, with special emphasis in the computational issues around their analysis, synthesis, and optimization, during two weeks of lectures and discussion. A total of 89 participants from 23 count ries played an active role during the lectures and sessions of contributed papers. Many of the latter are being currently reviewed for publication in specialized journals. The subject of the book is mechanical systems, Le., systems composed of rigid and flexible bodies, coupled by mechanical means so as to constrain their various bodies in a goal-oriented manner, usually driven under computer con trol. Applications of the discipline are thus of the most varied nature, ranging from transportation systems to biomedical devices. U nder normal operation conditions, the constitutive bodies of a mechanical system can be consid ered to be rigid, the rigidity property then easing dramatically the analysis of the kinematics and dynamics of the system at hand. Examples of these systems are the suspension of a terrestrial vehicle negotiating a curve at speeds within the allowed or recommended limits and the links of multiaxis industrial robots performing conventional pick-and-place operations."

Hardware veri?cation is the process of checking whether a design conforms to its speci?cations of functionality and timing. In today's design processes it becomes more and more important. Very large scale integrated (VLSI) circuits and the resulting digital systems have conquered a place in almost all areas of our life, even in security sensitive applications. Complex digital systems control airplanes, have been used in banks and on intensive-care units. Hence, the demand for error-free designs is more important than ever. In addition, economic reasons underline this demand as well. The design and production process of present day VLSI-circuits is highly time- and cost-intensive. Mo- over, it is nearly impossible to repair integrated circuits. Thus, it is desirable to detect design errors early in the design process and not just after producing the prototype chip. All these facts are re?ected by developing and prod- tion statistics of present day companies. For example, In?neon Technologies [118] assumed that about 60% to 80% of the overall design time was spent for veri?cation in 2000. Other sources cite the 3-to-1 head count ratio between veri?cation engineers and logic designers. This shows that verifying logical correctness of the design of hardware systems is a major gate to the problem of time-to-market (cf. [113]). With the chip complexity constantly increasing, the dif?culty as well as the - portance of functional veri?cation of new product designs has been increased. It is not only more important to get error-free designs.

Formal verification has become one of the most important steps in circuit design. Since circuits can contain several million transistors, verification of such large designs becomes more and more difficult. Pure simulation cannot guarantee the correct behavior and exhaustive simulation is often impossible. However, many designs, like ALUs, have very regular structures that can be easily described at a higher level of abstraction. For example, describing (and verifying) an integer multiplier at the bit-level is very difficult, while the verification becomes easy when the outputs are grouped to build a bit-string. Recently, several approaches for formal circuit verification have been proposed that make use of these regularities. These approaches are based on Word-Level Decision Diagrams (WLDDs) which are graph-based representations of functions (similar to BDDs) that allow for the representation of functions with a Boolean range and an integer domain. Formal Verification of Circuits is devoted to the discussion of recent developments in the field of decision diagram-based formal verification. Firstly, different types of decision diagrams (including WLDDs) are introduced and theoretical properties are discussed that give further insight into the data structure. Secondly, implementation and minimization concepts are presented. Applications to arithmetic circuit verification and verification of designs specified by hardware description languages are described to show how WLDDs work in practice. Formal Verification of Circuits is intended for CAD developers and researchers as well as designers using modern verification tools. It will help people working with formal verification (in industry or academia) to keep informed about recent developments in this area.

This book provides a complete overview of the field of carbon nanotube electronics. It covers materials and physical properties, synthesis and fabrication processes, devices and circuits, modeling, and finally novel applications of nanotube-based electronics. The book introduces fundamental device physics and circuit concepts of 1-D electronics. At the same time it provides specific examples of the state-of-the-art nanotube devices.

The papers collected in this volume were originally presented at the conference on Design and Decision Support Systems in Architecture and Urban Planning that was held in Mierlo, the Netherlands in July 1992. This conference was organized as one of the events celebrating the 25th anniversary of the founding of the Faculty of Architecture, Building and Planning at Eindhoven University of Technology. The organizing committee had a strong feeling that many interesting developments in this area were emerging within different institutional frameworks and informal networks that do not interact frequently. For example, scholars working on architectural problems are not particularly familiar with computer applications in urban planning. Likewise, although many computer-aided design systems claim to be based on principles of design methodology, serious discussions on the methodological underpinnings of such systems are relatively scarce. Consequently, we may have little opportunity to learn how scholars in closely related disciplines approach specific design or planning problems.

The world of wireless communications is changing very rapidly since a few years. The introduction of digital data communication in combination with digital signal process ing has created the foundation for the development of many new wireless applications. High-quality digital wireless networks for voice communication with global and local coverage, like the GSM and DECT system, are only faint and early examples of the wide variety of wireless applications that will become available in the remainder of this decade. The new evolutions in wireless communications set new requirements for the trans ceivers (transmitter-receivers). Higher operating frequencies, a lower power consump tion and a very high degree of integration, are new specifications which ask for design approaches quite different from the classical RF design techniques. The integrata bility and power consumption reduction of the digital part will further improve with the continued downscaling of technologies. This is however completely different for the analog transceiver front-end, the part which performs the interfacing between the antenna and the digital signal processing. The analog front-end's integratability and power consumption are closely related to the physical limitations of the transceiver topology and not so much to the scaling of the used technology. Chapter 2 gives a detailed study of the level of integration in current transceiver realization and analyzes their limitations. In chapter 3 of this book the complex signal technique for the analysis and synthesis of multi-path receiver and transmitter topologies is introduced."

In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks."

By virtue of their special algebraic structures, Pythagorean-hodograph (PH) curves offer unique advantages for computer-aided design and manufacturing, robotics, motion control, path planning, computer graphics, animation, and related fields. This book offers a comprehensive and self-contained treatment of the mathematical theory of PH curves, including algorithms for their construction and examples of their practical applications. It emphasizes the interplay of ideas from algebra and geometry and their historical origins and includes many figures, worked examples, and detailed algorithm descriptions.

Today, Fuzzy Set Theory is the core discipline of so-called soft computing, and provides new impetus for research in the field of artificial intelligence. In this fascinating book, the history of Fuzzy Set Theory and the ways it was first used are incorporated into the history of 20th century science and technology. Influences from philosophy, system theory and cybernetics stemming from the earliest part of the 20th century are considered alongside those of communication and control theory from mid-century.

Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms first gives a comprehensive update on recent developments in the area of SoC platforms and ESL design methodologies. The main contribution is the rigorous definition of a framework for modeling at the timing approximate level of abstraction. Subsequently this book presents a set of tools for the creation and exploration of timing approximate SoC platform models.

Here is a textbook for senior undergraduate and graduate level students that offers a novel and systematic look into the dynamics of MEMS. It includes numerous solved examples together with the proposed problems. The material to be found here will also be of interest to researchers with a non-mechanical background. The book focuses on the mechanical domain, specifically the dynamic sub-domain, and provides an in-depth treatment of problems that involve reliable modeling, analysis and design.

At 90 nm, wires account for nearly 75% of the total delay in a circuit. Even more insidious, however, is that among nearly 40% of these nets, more than 50% of their total net capacitance are attributed to the cross-coupling capacitance between neighboring signals. At this point a new design and optimization paradigm based on real wires is required. Nanometer routers must prevent and correct these effects on-the-fly in order to reach timing closure. From a manufacturability standpoint, nanometer routers must explicitly deal with the ever increasing design complexity, and be capable of adapting to the constraint requirements of timing, signal integrity, process antenna effect, and new interconnect architecture such as X-architecture.

In the nanometer era, we must look into new-generation routing technologies that combine high performance and capacity with the integration of congestion, timing, SI prevention, and DFM algorithms as the best means of getting to design closure quickly. In this book, we present a novel multilevel full-chip router, namely mSIGMA for SIGnal-integrity and MAnufacturability optimization. And these routing technologies will ensure faster time-to-market and time-to-profitability.

Design for Manufacturability and Statistical Design: A Comprehensive Approach presents a comprehensive overview of methods that need to be mastered in understanding state-of-the-art design for manufacturability and statistical design methodologies. Broadly, design for manufacturability is a set of techniques that attempt to fix the systematic sources of variability, such as those due to photolithography and CMP. Statistical design, on the other hand, deals with the random sources of variability. Both paradigms operate within a common framework, and their joint comprehensive treatment is one of the objectives of this book and an important differentation.

The material in this book was presented in the tutorial programme of the Eurographics '87 Conference, held in Amsterdam, The Netherlands, 1987. The book contains eight contributions, from leading experts in each field. Major aspects of computer graphics fundamentals, interactive techniques and three-dimensional modelling techniques are discussed and a state-of-the-art survey on the increasingly important area of desktop publishing is given. The theory of fractals is covered by presenting a thorough treatment of their mathematics and programming. Furthermore, overviews of several topics, such as the theory and methods of modelling three-dimensional shapes and objects, the fundamental concepts and current advances in user interface management systems, and existing CAD-interface specifications, are included. The book will be of interest to systems designers, application programmers and researchers who wish to gain a deeper knowledge of the state-of-the-art in the areas covered.

In this book, the author has presented an introduction to the practical application of some of the essential technical topics related to computer-aided engineering (CAE). These topics include interactive computer graphics (ICG), computer-aided design (CAD), computer and computer-integrated manufacturing (CIM). aided analysis (CAA) Unlike the few texts available, the present work attempts to bring all these seemingly specialised topics together and to demonstrate their integration in the design process through practical applications to real engineering problems and case studies. This book is the result of the author's research and teaching activities for several years of postgraduate and undergraduate courses in mechanical design of rotating machinery, computer-aided engineering, of finite elements, solid mechanics, engineering practical applications and properties of materials at Cranfield Institute of dynamics Technology, Oxford Engineering Science and the University of Manchester Institute of Science and Technology (UMIST). It was soon realised that no books on the most powerful and versatile tools available to engineering designers existed. To satisfy this developing need, this book, on the use of computers to aid the design process and to integrate design, analysis and manufacture, was prepared."