This book constitutes the thoroughly refereed post-conference proceedings of the 7th International Conference on Numerical Methods and Applications, NMA 2010, held in Borovets, Bulgaria, in August 2010. The 60 revised full papers presented together with 3 invited papers were carefully reviewed and selected from numerous submissions for inclusion in this book. The papers are organized in topical sections on Monte Carlo and quasi-Monte Carlo methods, environmental modeling, grid computing and applications, metaheuristics for optimization problems, and modeling and simulation of electrochemical processes.

With the rapid growth of bandwidth demand from network users and the advances in optical technologies, optical networks with multiterabits per-second capacity has received significant interest from both researchers and practitioners. Optical networks deployment raises a number of challenging problems that require innovative solutions, including net work architectures, scalable and fast network management, resource efficient routing and wavelength assignment algorithms, QoS support and scheduling algorithms, and switch and router architectures. In this book, we put together some important developments in this exiting area during last several years. Some of the articles are research papers and some are surveys. All articles were reviewed by two reviewers. The paper, "On Dynamic Wavelength Assignment in WDM Optical Networks," by Alanyali gives an overview of some issues in the analy sis and synthesis of dynamic wavelength assignment policies for optical WDM networks and illustrates a new method of analysis. The paper by Ellinas and Bala, "Wavelength Assignment Algorithms for WDM Ring Architectures," presents two optimal wavelength assignment algorithms that assign the minimum number of wavelengths between nodes on WDM rings to achieve full mesh connectivity. In the paper, "Optimal Placement of Wavelength Converters in WDM Networks for Parallel and Distributed Computing Systems," Jia et al."

Many applications in science and engineering require a digital model of a real physical object. Advanced scanning technology has made it possible to scan such objects and generate point samples on their boundaries. This book, first published in 2007, shows how to compute a digital model from this point sample. After developing the basics of sampling theory and its connections to various geometric and topological properties, the author describes a suite of algorithms that have been designed for the reconstruction problem, including algorithms for surface reconstruction from dense samples, from samples that are not adequately dense and from noisy samples. Voronoi- and Delaunay-based techniques, implicit surface-based methods and Morse theory-based methods are covered. Scientists and engineers working in drug design, medical imaging, CAD, GIS, and many other areas will benefit from this first book on the subject.

The concept of CAST as Computer Aided Systems Theory was introduced by F. Pichler in the late 1980s to refer to computer theoretical and practical developments as tools for solving problems in system science. It was thought of as the third component (the other two being CAD and CAM) required to complete the path from computer and systems sciences to practical developments in science and engineering. Franz Pichler, of the University of Linz, organized the first CAST workshop in April 1988, which demonstrated the acceptance of the concepts by the scientific and technical community. Next, the University of Las Palmas de Gran Canaria joined the University of Linz to organize the first international meeting on CAST (Las Palmas, February 1989) under the name EUROCAST'89. This proved to be a very successful gathering of systems theorists, computer scientists and engineers from most European countries, North America and Japan. It was agreed that EUROCAST international conferences would be organized every two years, alternating between Las Palmas de Gran Canaria and a continental European location. From 2001 the conference has been held exclusively in Las Palmas. Thus, successive EUROCAST meetings took place in Krems (1991), Las Palmas (1993), In- bruck (1995), Las Palmas (1997), Vienna (1999), Las Palmas (2001), Las Palmas (2003) Las Palmas (2005) and Las Palmas (2007), in addition to an extra-European CAST c- ference in Ottawa in 1994.

Assertion-based IP is much more than a comprehensive set of related assertions. It is a full-fledged reusable and configurable transaction-level verification component, which is used to detect both interesting and incorrect behaviors. Upon detecting interesting or incorrect behavior, the assertion-based IP alerts other verification components within a simulation environment, which are responsible for taking appropriate action. The focus of this book is to bring the assertion discussion up to a higher level and introduce a process for creating effective, reusable, assertion-based IP, which easily integrates with the user s existing verification environment, in other words the testbench infrastructure.

The guiding principles promoted in this book when creating an assertion-based IP monitor are:

• modularity assertion-based IP should have a clear separation between detection and action
  
• clarity assertion-based IP should be written initially focusing on capturing intent (versus optimizations)

A unique feature of this book is the fully worked out, detailed examples. The concepts presented in the book are drawn from the authors experience developing assertion-based IP, as well as general assertion-based techniques. Creating Assertion-Based IP is an important resource for design and verification engineers.

From the Foreword:

Creating Assertion-Based IP " reduces to process the creation of one of the most valuable kinds of VIP: assertion-based VIP This book will serve as a valuable reference for years to come."
Andrew Piziali, Sr. Design Verification Engineer
Co-Author, ESL Design and Verification: A Prescription for Electronic System Level Methodology
Author, Functional Verification Coverage Measurement and Analysis"

Statistical timing analysis is an area of growing importance in nanometer te- nologies' as the uncertainties associated with process and environmental var- tions increase' and this chapter has captured some of the major efforts in this area. This remains a very active field of research' and there is likely to be a great deal of new research to be found in conferences and journals after this book is published. In addition to the statistical analysis of combinational circuits' a good deal of work has been carried out in analyzing the effect of variations on clock skew. Although we will not treat this subject in this book' the reader is referred to [LNPS00' HN01' JH01' ABZ03a] for details. 7 TIMING ANALYSIS FOR SEQUENTIAL CIRCUITS 7.1 INTRODUCTION A general sequential circuit is a network of computational nodes (gates) and memory elements (registers). The computational nodes may be conceptualized as being clustered together in an acyclic network of gates that forms a c- binational logic circuit. A cyclic path in the direction of signal propagation 1 is permitted in the sequential circuit only if it contains at least one register . In general, it is possible to represent any sequential circuit in terms of the schematic shown in Figure 7.1, which has I inputs, O outputs and M registers. The registers outputs feed into the combinational logic which, in turn, feeds the register inputs. Thus, the combinational logic has I + M inputs and O + M outputs.

Sigma delta modulation has become a very useful and widely applied technique for high performance Analog-to-Digital (A/D) conversion of narrow band signals. Through the use of oversampling and negative feedback, the quantization errors of a coarse quantizer are suppressed in a narrow signal band in the output of the modulator. Bandpass sigma delta modulation is well suited for A/D conversion of narrow band signals modulated on a carrier, as occurs in communication systems such as AM/FM receivers and mobile phones. Due to the nonlinearity of the quantizer in the feedback loop, a sigma delta modulator may exhibit input signal dependent stability properties. The same combination of the nonlinearity and the feedback loop complicates the stability analysis. In Bandpass Sigma Delta Modulators, the describing function method is used to analyze the stability of the sigma delta modulator. The linear gain model commonly used for the quantizer fails to predict small signal stability properties and idle patterns accurately. In Bandpass Sigma Delta Modulators an improved model for the quantizer is introduced, extending the linear gain model with a phase shift. Analysis shows that the phase shift of a sampled quantizer is in fact a phase uncertainty. Stability analysis of sigma delta modulators using the extended model allows accurate prediction of idle patterns and calculation of small-signal stability boundaries for loop filter parameters. A simplified rule of thumb is derived and applied to bandpass sigma delta modulators. The stability properties have a considerable impact on the design of single-loop, one-bit, high-order continuous-time bandpass sigma delta modulators. The continuous-time bandpass loop filter structure should have sufficient degrees of freedom to implement the desired (small-signal stable) sigma delta modulator behavior. Bandpass Sigma Delta Modulators will be of interest to practicing engineers and researchers in the areas of mixed-signal and analog integrated circuit design.

Hierarchical design methods were originally introduced for the design of digital ICs, and they appeared to provide for significant advances in design productivity, Time-to-Market, and first-time right design. These concepts have gained increasing importance in the semiconductor industry in recent years. In the course of time, the supportive quality of hierarchical methods and their advantages were confirmed. System Level Hardware/Software Co-design: An Industrial Approach demonstrates the applicability of hierarchical methods to hardware / software codesign, and mixed analogue / digital design following a similar approach. Hierarchical design methods provide for high levels of design support, both in a qualitative and a quantitative sense. In the qualitative sense, the presented methods support all phases in the product life cycle of electronic products, ranging from requirements analysis to application support. Hierarchical methods furthermore allow for efficient digital hardware design, hardware / software codesign, and mixed analogue / digital design, on the basis of commercially available formalisms and design tools. In the quantitative sense, hierarchical methods have prompted a substantial increase in design productivity. System Level Hardware/Software Co-design: An Industrial Approach reports on a six year study during which time the number of square millimeters of normalized complexity an individual designer contributed every week rose by more than a factor of five. Hierarchical methods therefore enabled designers to keep track of the ever increasing design complexity, while effectively reducing the number of design iterations in the form of redesigns. System Level Hardware/Software Co-design: An Industrial Approach is the first book to provide a comprehensive, coherent system design methodology that has been proven to increase productivity in industrial practice. The book will be of interest to all managers, designers and researchers working in the semiconductor industry.

Model Based Fuzzy Control uses a given conventional or fuzzy open loop model of the plant under control to derive the set of fuzzy rules for the fuzzy controller. Of central interest are the stability, performance, and robustness of the resulting closed loop system. The major objective of model based fuzzy control is to use the full range of linear and nonlinear design and analysis methods to design such fuzzy controllers with better stability, performance, and robustness properties than non-fuzzy controllers designed using the same techniques. This objective has already been achieved for fuzzy sliding mode controllers and fuzzy gain schedulers - the main topics of this book. The primary aim of the book is to serve as a guide for the practitioner and to provide introductory material for courses in control theory.

Computer-Aided Design of User Interfaces VI gathers the latest experience of experts, research teams and leading organisations involved in computer-aided design of user interactive applications. This area investigates how it is desirable and possible to support, to facilitate and to speed up the development life cycle of any interactive system: requirements engineering, early-stage design, detailed design, deelopment, deployment, evaluation, and maintenance. In particular, it stresses how the design activity could be better understood for different types of advanced interactive ubiquitous computing, and multi-device environments.

Mass Customization and Footwear: Myth, Salvation or Reality is the only book dedicated to the application of mass customization in a particular industry. By showing examples of how a "mature" manufacturing sector like shoe making can be thoroughly renovated in business and mentality by applying this paradigm; Mass Customization and Footwear: Myth, Salvation or Reality will be bought by practitioners in the footwear sector and postgraduates, researchers and lecturers in the area of mass customization.

A look at important new tools and algorithms for future product modeling systems, based on a seminar at the International Conference and Research Center for Computer Science, Schloss Dagstuhl, Germany, presented by internationally recognised experts in CAD technology.

"As chip size and complexity continues to grow exponentially, the challenges of functional verification are becoming a critical issue in the electronics industry. It is now commonly heard that logical errors missed during functional verification are the most common cause of chip re-spins, and that the costs associated with functional verification are now outweighing the costs of chip design. To cope with these challenges engineers are increasingly relying on new design and verification methodologies and languages. Transaction-based design and verification, constrained random stimulus generation, functional coverage analysis, and assertion-based verification are all techniques that advanced design and verification teams routinely use today. Engineers are also increasingly turning to design and verification models based on C/C++ and SystemC in order to build more abstract, higher performance hardware and software models and to escape the limitations of RTL HDLs. This new book, Advanced Verification Techniques, provides specific guidance for these advanced verification techniques. The book includes realistic examples and shows how SystemC and SCV can be applied to a variety of advanced design and verification tasks."
- Stuart Swan

Our society is faced with an increasing dependence on computing systems, not only in high tech consumer applications but also in areas (e.g., air and railway traffic control, nuclear plant control, aircraft and car control) where a failure can be critical for the safety of human beings. Unfortunately, it is accepted that large digital systems cannot be fault-free. Some faults may be attributed to inaccuracy during the development, while others can come from external causes such as environmental stress. Radiations, electromagnetic interference and power glitches are some of the most common causes of transient faults.
As a consequence, the past years have seen a growing interest in methods for studying the behaviour of computer-based systems when faults occur, and several approaches have been proposed to evaluate the dependability properties of a computer-based system.
Fault Injection, i.e., the artificial injection of faults into a computer system in order to study its behaviour, emerged as a viable solution, and has been deeply investigated by both academia and industry. Different techniques have been proposed and some of them practically experimented.
Fault Injection Techniques and Tools for Embedded Systems Reliability Evaluation intends to be a comprehensive guide to Fault Injection techniques used to evaluate the dependability of a digital system. The description and the critical analysis of different Fault Injection techniques and tools will be authored by key scientists in the field of system dependability and fault tolerance.

Introduction to Hardware-Software Co-Design presents a number of issues of fundamental importance for the design of integrated hardware software products such as embedded, communication, and multimedia systems. This book is a comprehensive introduction to the fundamentals of hardware/software co-design. Co-design is still a new field but one which has substantially matured over the past few years. This book, written by leading international experts, covers all the major topics including: fundamental issues in co-design; hardware/software co-synthesis algorithms; prototyping and emulation; target architectures; compiler techniques; specification and verification; system-level specification. Special chapters describe in detail several leading-edge co-design systems including Cosyma, LYCOS, and Cosmos. Introduction to Hardware-Software Co-Design contains sufficient material for use by teachers and students in an advanced course of hardware/software co-design. It also contains extensive explanation of the fundamental concepts of the subject and the necessary background to bring practitioners up-to-date on this increasingly important topic.

This book contains the extended and revised editions of all the talks of the ninth AACD Workshop held in Hotel Bachmair, April 11 - 13 2000 in Rottach-Egem, Germany. The local organization was managed by Rudolf Koch of Infineon Technologies AG, Munich, Germany. The program consisted of six tutorials per day during three days. Experts in the field presented these tutorials and state of the art information is communicated. The audience at the end of the workshop selects program topics for the following workshop. The program committee, consisting of Johan Huijsing of Delft University of Technology, Willy Sansen of Katholieke Universiteit Leuven and Rudy van de Plassche of Broadcom Netherlands BV Bunnik elaborates the selected topics into a three-day program and selects experts in the field for presentation. Each AACD Workshop has given rise to publication of a book by Kluwer entitled "Analog Circuit Design." A series of nine books in a row provides valuable information and good overviews of all analog circuit techniques concerning design, CAD, simulation and device modeling. These books can be seen as a reference to those people involved in analog and mixed signal design. The aim of the workshop is to brainstorm on new and valuable design ideas in the area of analog circuit design. It is the hope of the program committee that this ninth book continues the tradition of emerging contributions to the design of analog and mixed signal systems in Europe and the rest of the world.

Communication between engineers, their managers, suppliers and customers relies on the existence of a common understanding for the meaning of terms. While this is not normally a problem, it has proved to be a significant roadblock in the EDA industry where terms are created as required by any number of people, multiple terms are coined for the same thing, or even worse, the same term is used for many different things. This taxonomy identifies all of the significant terms used by an industry and provides a structural framework in which those terms can be defined and their relationship to other terms identified. The origins of this work go back to 1995 with a government-sponsored program called RASSP. At the termination of their work, VSIA picked up their work and developed it further. Three new taxonomies were introduced by VSIA for additional facets of the system design and development process. Since role of VSIA has now changed so that it no longer maintains these taxonomies, the baton is being passed on again through a group of interested people and manifested in this key reference work.

In Thermal and Power Management of Integrated Circuits, power and thermal management issues in integrated circuits during normal operating conditions and stress operating conditions are addressed. Thermal management in VLSI circuits is becoming an integral part of the design, test, and manufacturing. Proper thermal management is the key to achieve high performance, quality and reliability. Performance and reliability of integrated circuits are strong functions of the junction temperature. A small increase in junction temperature may result in significant reduction in the device lifetime.

This book reviews the significance of the junction temperature as a reliability measure under nominal and burn-in conditions. The latest research in the area of electro-thermal modeling of integrated circuits will also be presented. Recent models and associated CAD tools are covered and various techniques at the circuit and system levels are reviewed. Subsequently, the authors provide an insight into the concept of thermal runaway and how it may best be avoided. A section on low temperature operation of integrated circuits concludes the book.

Networks on Chip presents a variety of topics, problems and approaches with the common theme to systematically organize the on-chip communication in the form of a regular, shared communication network on chip, an NoC for short.

As the number of processor cores and IP blocks integrated on a single chip is steadily growing, a systematic approach to design the communication infrastructure becomes necessary. Different variants of packed switched on-chip networks have been proposed by several groups during the past two years. This book summarizes the state of the art of these efforts and discusses the major issues from the physical integration to architecture to operating systems and application interfaces. It also provides a guideline and vision about the direction this field is moving to. Moreover, the book outlines the consequences of adopting design platforms based on packet switched network. The consequences may in fact be far reaching because many of the topics of distributed systems, distributed real-time systems, fault tolerant systems, parallel computer architecture, parallel programming as well as traditional system-on-chip issues will appear relevant but within the constraints of a single chip VLSI implementation.

The book is organized in three parts. The first deals with system design and methodology issues. The second presents problems and solutions concerning the hardware and the basic communication infrastructure. Finally, the third part covers operating system, embedded software and application. However, communication from the physical to the application level is a central theme throughout the book.

The book serves as an excellent reference source and may be used as a text for advanced courses on the subject.

Analog design is one of the more difficult aspects of electrical engineering. The main reason is the apparently vague decisions an experienced designer makes in optimizing his circuit. To enable fresh designers, like students electrical engineering, to become acquainted with analog circuit design, structuring the analog design process is of utmost importance. Structured Electronic Design: Negative-Feedback Amplifiers presents a design methodology for negative-feedback amplifiers. The design methodology enables to synthesize a topology and to, at the same time, optimize the performance of that topology. Key issues in the design methodology are orthogonalization, hierarchy and simple models. Orthogonalization enables the separate optimization of the three fundamental quality aspects: noise, distortion and bandwidth. Hierarchy ensures that the right decisions are made at the correct level of abstraction. The use of simple models, results in simple calculations yielding maximum-performance indicators that can be used to reject wrong circuits relatively fast. The presented design methodology divides the design of negative-feedback amplifiers in six independent steps. In the first two steps, the feedback network is designed. During those design steps, the active part is assumed to be a nullor, i.e. the performance with respect to noise, distortion and bandwidth is still ideal. In the subsequent four steps, an implementation for the active part is synthesized. During those four steps the topology of the active part is synthesized such that optimum performance is obtained. Firstly, the input stage is designed with respect to noise performance. Secondly, the output stage is designed with respect to clipping distortion. Thirdly, the bandwidth performance is designed, which may require the addition of an additional amplifying stage. Finally, the biasing circuitry for biasing the amplifying stages is designed. By dividing the design in independent design steps, the total global optimization is reduced to several local optimizations. By the specific sequence of the design steps, it is assured that the local optimizations yield a circuit that is close to the global optimum. On top of that, because of the separate dedicated optimizations, the resource use, like power, is tracked clearly. Structured Electronic Design: Negative-Feedback Amplifiers presents in two chapters the background and an overview of the design methodology. Whereafter, in six chapters the separate design steps are treated with great detail. Each chapter comprises several exercises. An additional chapter is dedicated to how to design current sources and voltage source, which are required for the biasing. The final chapter in the book is dedicated to a thoroughly described design example, showing clearly the benefits of the design methodology. In short, this book is valuable for M.Sc.-curriculum Electrical Engineering students, and of course, for researchers and designers who want to structure their knowledge about analog design further.

In its updated second edition, this book has been extensively revised on a chapter by chapter basis. The book accurately reflects the syntax and semantic changes to the SystemVerilog language standard, making it an essential reference for systems professionals who need the latest version information. In addition, the second edition features a new chapter explaining the SystemVerilog "packages," a new appendix that summarizes the synthesis guidelines presented throughout the book, and all of the code examples have been updated to the final syntax and rerun using the latest version of the Synopsys, Mentor, and Cadance tools.

Evolutionary algorithms (EAs), as well as other bio-inspired heuristics, are widely usedto solvenumericaloptimizationproblems.However, intheir or- inal versions, they are limited to unconstrained search spaces i.e they do not include a mechanism to incorporate feasibility information into the ?tness function. On the other hand, real-world problems usually have constraints in their models. Therefore, a considerable amount of research has been d- icated to design and implement constraint-handling techniques. The use of (exterior) penalty functions is one of the most popular methods to deal with constrained search spaces when using EAs. However, other alternative me- ods have been proposed such as: special encodings and operators, decoders, the use of multiobjective concepts, among others. An e?cient and adequate constraint-handling technique is a key element in the design of competitive evolutionary algorithms to solve complex op- mization problems. In this way, this subject deserves special research e?orts. After asuccessfulspecialsessiononconstraint-handlingtechniquesusedin evolutionary algorithms within the Congress on Evolutionary Computation (CEC) in 2007, and motivated by the kind invitation made by Dr. Janusz Kacprzyk, I decided to edit a book, with the aim of putting together recent studies on constrained numerical optimization using evolutionary algorithms and other bio-inspired approaches. The intended audience for this book comprises graduate students, prac- tionersandresearchersinterestedonalternativetechniquestosolvenumerical optimization problems in presence of constraints

Interconnect has become the dominating factor in determining system performance in nanometer technologies. This book is dedicated to this important subject. The primary purpose of this monograph is to provide insight and intuition into layout analysis and optimization for interconnect in high speed, high complexity integrated circuits.

In this monograph, the effects of wire size, spacing between wires, wire length, coupling length, load capacitance, rise time of the inputs, place of overlap (near driver or receiver side), frequency, shields, direction of the signals, and wire width for both the aggressors and the victim wires on system performance and reliability is thoroughly investigated. Also, parameters like driver strength has been considered as several recent studies considered the simultaneous device and interconnect sizing. Crosstalk noise, as well as the impact of coupling on aggressor delay is analyzed. The pulse width of the crosstalk noise, which is of similar importance for circuit performance as the peak amplitude, is also analyzed. We have considered more parameters that can affect the signal integrity and presented practical intensive simulation results.

This book brings together a wealth of information previously scattered throughout the literature, presenting a range of CAD algorithms and techniques for synthesizing and optimizing interconnect. The practical aspects of the algorithms and models are explained with sufficient detail.

It deeply investigates the most two effective parameters in layout optimization, spacing and shield insertion, that can affect both capacitive and inductive noise. Noise models needed for layouts with multi-layer multi-crosscoupling segments are investigated. Different post-layout optimization techniques are explained with complexity analysis and benchmarks tests are provided.

Collaborative Product Design and Manufacturing Methodologies and Applications introduces a wide spectrum of collaborative engineering issues in design and manufacturing. It offers state-of-the-art chapters written by international experts from academia and industry, and reflects the most up-to-date R & D work and applications, especially those from the last three to five years. The book will serve as an essential reference for academics, upper-level undergraduate and graduate students and practicing professionals.

Evolutionary algorithms are successful biologically inspired meta-heuristics. Their success depends on adequate parameter settings. The question arises: how can evolutionary algorithms learn parameters automatically during the optimization? Evolution strategies gave an answer decades ago: self-adaptation. Their self-adaptive mutation control turned out to be exceptionally successful. But nevertheless self-adaptation has not achieved the attention it deserves. This book introduces various types of self-adaptive parameters for evolutionary computation. Biased mutation for evolution strategies is useful for constrained search spaces. Self-adaptive inversion mutation accelerates the search on combinatorial TSP-like problems. After the analysis of self-adaptive crossover operators the book concentrates on premature convergence of self-adaptive mutation control at the constraint boundary. Besides extensive experiments, statistical tests and some theoretical investigations enrich the analysis of the proposed concepts.