Mass Customization and Footwear: Myth, Salvation or Reality is the only book dedicated to the application of mass customization in a particular industry. By showing examples of how a "mature" manufacturing sector like shoe making can be thoroughly renovated in business and mentality by applying this paradigm; Mass Customization and Footwear: Myth, Salvation or Reality will be bought by practitioners in the footwear sector and postgraduates, researchers and lecturers in the area of mass customization.

Designing Inclusive Futures reflects the need to explore, in a coherent way, the issues and practicalities that lie behind design that is intended to extend our active future lives. This encompasses design for inclusion in daily life at home but also extends to the workplace and for products within these contexts. For example, given trends in employment sector growth, skills requirements, labour supply and demographic change, there is a need to predict the critical areas where individual capabilities are mismatched with the physical, social and organisational demands of work. This mismatch, which can be addressed within the domain of inclusive design, is pervasively linked to real artefacts in workspaces and their intersection with the health factors that relate to ageing. This book is the result of the fourth CWUAAT workshop held in Cambridge, England in April 2008.

"Introduction to Embedded System Design Using Field Programmable Gate Arrays" provides a starting point for the use of field programmable gate arrays in the design of embedded systems. The text considers a hypothetical robot controller as an embedded application and weaves around it related concepts of FPGA-based digital design. The book details: use of FPGA vis-a-vis general purpose processor and microcontroller; design using Verilog hardware description language; digital design synthesis using Verilog and Xilinx(r) SpartanTM 3 FPGA; FPGA-based embedded processors and peripherals; overview of serial data communications and signal conditioning using FPGA; FPGA-based motor drive controllers; and prototyping digital systems using FPGA.

The book is a good introductory text for FPGA-based design for both students and digital systems designers. Its end-of-chapter exercises and frequent use of example can be used for teaching or for self-study."

Computational Surface and Roundness Metrology provides an extraordinarily practical and hands-on approach towards understanding the diverse array of mathematical methods used in surface texture and roundness analysis. The book, in combination with a mathematical package or programming language interface, provides an invaluable tool for experimenting, learning, and discovering the many flavors of mathematics that are so routinely taken for granted in metrology. Whether the objective is to understand the origin of that ubiquitous transmission characteristics curve of a filter we see so often yet do not quite comprehend, or to delve into the intricate depths of a deceptively simple problem of fitting a line or a plane to a set of points, this book describes it all (in exhaustive detail). From the graduate student of metrology to the practicing engineer on the shop floor, this book is a must-have reference for all involved in metrology, instrumentation/optics, manufacturing, and electronics."

Computer-Aided Design of User Interfaces VI gathers the latest experience of experts, research teams and leading organisations involved in computer-aided design of user interactive applications. This area investigates how it is desirable and possible to support, to facilitate and to speed up the development life cycle of any interactive system: requirements engineering, early-stage design, detailed design, deelopment, deployment, evaluation, and maintenance. In particular, it stresses how the design activity could be better understood for different types of advanced interactive ubiquitous computing, and multi-device environments.

In Interconnect-centric Design for Advanced SoC and NoC, we have tried to create a comprehensive understanding about on-chip interconnect characteristics, design methodologies, layered views on different abstraction levels and finally about applying the interconnect-centric design in system-on-chip design.
Traditionally, on-chip communication design has been done using rather ad-hoc and informal approaches that fail to meet some of the challenges posed by next-generation SOC designs, such as performance and throughput, power and energy, reliability, predictability, synchronization, and management of concurrency. To address these challenges, it is critical to take a global view of the communication problem, and decompose it along lines that make it more tractable. We believe that a layered approach similar to that defined by the communication networks community should also be used for on-chip communication design.
The design issues are handled on physical and circuit layer, logic and architecture layer, and from system design methodology and tools point of view. Formal communication modeling and refinement is used to bridge the communication layers, and network-centric modeling of multiprocessor on-chip networks and socket-based design will serve the development of platforms for SoC and NoC integration. Interconnect-centric Design for Advanced SoC and NoC is concluded by two application examples: interconnect and memory organization in SoCs for advanced set-top boxes and TV, and a case study in NoC platform design for more generic applications.

This book provides an engineering insight into how to provide a scalable and robust verification solution with ever increasing design complexity and sizes. It describes SAT-based model checking approaches and gives engineering details on what makes model checking practical. The book brings together the various SAT-based scalable emerging technologies and techniques covered can be synergistically combined into a scalable solution.

Computer-Aided Innovation (CAI) is emerging as a strategic domain of research and application to support enterprises throughout the overall innovation process. The 5.4 Working Group of IFIP aims at defining the scientific foundation of Computer Aided Innovation systems and at identifying state of the art and trends of CAI tools and methods. These Proceedings derive from the second Topical Session on Computer- Aided Innovation organized within the 20th World Computer Congress of IFIP. The goal of the Topical Session is to provide a survey of existing technologies and research activities in the field and to identify opportunities of integration of CAI with other PLM systems. According to the heterogeneous needs of innovation-related activities, the papers published in this volume are characterized by multidisciplinary contents and complementary perspectives and scopes. Such a richness of topics and disciplines will certainly contribute to the promotion of fruitful new collaborations and synergies within the IFIP community. Gaetano Cascini th Florence, April 30 20 08 CAI Topical Session Organization The IFIP Topical Session on Computer-Aided Innovation (CAI) is a co-located conference organized under the auspices of the IFIP World Computer Congress (WCC) 2008 in Milano, Italy Gaetano Cascini CAI Program Committee Chair [email protected]

Evolutionary computing paradigms offer robust and powerful adaptive search mechanisms for system design. This book includes thirteen chapters covering a wide area of topics in evolutionary computing and applications including: Introduction to evolutionary computing in system design; evolutionary neuro-fuzzy systems; evolution of fuzzy controllers; genetic algorithms for multi-classifier design; evolutionary grooming of traffic; evolutionary particle swarms; fuzzy logic systems using genetic algorithms; evolutionary algorithms and immune learning for neural network-based controller design; distributed problem solving using evolutionary learning; evolutionary computing within grid environment; evolutionary game theory in wireless mesh networks; hybrid multiobjective evolutionary algorithms for the sailor assignment problem; evolutionary techniques in hardware optimization. This book will be useful to researchers in intelligent systems with interest in evolutionary computing, application engineers and system designers. The book can also be used by students and lecturers as an advanced reading material for courses on evolutionary computing.

The development of any Software (Industrial) Intensive System, e.g. critical embedded software, requires both different notations, and a strong devel- ment process. Different notations are mandatory because different aspects of the Software System have to be tackled. A strong development process is mandatory as well because without a strong organization we cannot warrantee the system will meet its requirements. Unfortunately, much more is needed! The different notations that can be used must all possess at least one property: formality. The development process must also have important properties: a exha- tive coverage of the development phases, and a set of well integrated support tools. In Computer Science it is now widely accepted that only formal notations can guarantee a perfect de?ned meaning. This becomes a more and more important issue since software systems tend to be distributed in large systems (for instance in safe public transportation systems), and in small ones (for instance numerous processors in luxury cars). Distribution increases the complexity of embedded software while safety criteria get harder to be met. On the other hand, during the past decade Software Engineering techniques have been improved a lot, and are now currently used to conduct systematic and rigorous development of large software systems. UML has become the de facto standard notation for documenting Software Engineering projects. UML is supported by many CASE tools that offer graphical means for the UML notation.

This book contains an edited version of the lectures and selected contributions presented during the Advanced Summer Institute (ASI) on "Product Engineering: Tools and Methods based on Virtual Reality" held at Chania (Greece), 30th May - 6th June 2007. The ASI was devoted to the Product Engineering field, with particular attention being given to the aspects related to Virtual Reality (VR) technologies, and their use and added value in engineering.

Introduction The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as inter connect delay, noise and crosstalk, signal integrity, parasitics effects, and power dissipation, that invalidate the assumptions that form the basis of previous design methodologies and tools. This book is intended to sample the most important, contemporary, and advanced layout opti mization problems emerging with the advent of very deep submicron technologies in semiconductor processing. We hope that it will stimulate more people to perform research that leads to advances in the design and development of more efficient, effective, and elegant algorithms and design tools. Organization of the Book The book is organized as follows. A multi-stage simulated annealing algorithm that integrates floorplanning and interconnect planning is pre sented in Chapter 1. To reduce the run time, different interconnect plan ning approaches are applied in different ranges of temperatures. Chapter 2 introduces a new design methodology - the interconnect-centric design methodology and its centerpiece, interconnect planning, which consists of physical hierarchy generation, floorplanning with interconnect planning, and interconnect architecture planning. Chapter 3 investigates a net-cut minimization based placement tool, Dragon, which integrates the state of the art partitioning and placement techniques."

Verification is increasingly complex, and SystemVerilog is one of the languages that the verification community is turning to. However, no language by itself can guarantee success without proper techniques. Object-oriented programming (OOP), with its focus on managing complexity, is ideally suited to this task.

With this handbook-the first to focus on applying OOP to SystemVerilog-we'll show how to manage complexity by using layers of abstraction and base classes. By adapting these techniques, you will write more "reasonable" code, and build efficient and reusable verification components.

Both a learning tool and a reference, this handbook contains hundreds of real-world code snippets and three professional verification-system examples. You can copy and paste from these examples, which are all based on an open-source, vendor-neutral framework (with code freely available at www.trusster.com).

Learn about OOP techniques such as these:

• Creating classes-code interfaces, factory functions, reuse
• Connecting classes-pointers, inheritance, channels
• Using "correct by construction"-strong typing, base classes
• Packaging it up-singletons, static methods, packages

Analog design is one of the more difficult aspects of electrical engineering. The main reason is the apparently vague decisions an experienced designer makes in optimizing his circuit. To enable fresh designers, like students electrical engineering, to become acquainted with analog circuit design, structuring the analog design process is of utmost importance. Structured Electronic Design: Negative-Feedback Amplifiers presents a design methodology for negative-feedback amplifiers. The design methodology enables to synthesize a topology and to, at the same time, optimize the performance of that topology. Key issues in the design methodology are orthogonalization, hierarchy and simple models. Orthogonalization enables the separate optimization of the three fundamental quality aspects: noise, distortion and bandwidth. Hierarchy ensures that the right decisions are made at the correct level of abstraction. The use of simple models, results in simple calculations yielding maximum-performance indicators that can be used to reject wrong circuits relatively fast. The presented design methodology divides the design of negative-feedback amplifiers in six independent steps. In the first two steps, the feedback network is designed. During those design steps, the active part is assumed to be a nullor, i.e. the performance with respect to noise, distortion and bandwidth is still ideal. In the subsequent four steps, an implementation for the active part is synthesized. During those four steps the topology of the active part is synthesized such that optimum performance is obtained. Firstly, the input stage is designed with respect to noise performance. Secondly, the output stage is designed with respect to clipping distortion. Thirdly, the bandwidth performance is designed, which may require the addition of an additional amplifying stage. Finally, the biasing circuitry for biasing the amplifying stages is designed. By dividing the design in independent design steps, the total global optimization is reduced to several local optimizations. By the specific sequence of the design steps, it is assured that the local optimizations yield a circuit that is close to the global optimum. On top of that, because of the separate dedicated optimizations, the resource use, like power, is tracked clearly. Structured Electronic Design: Negative-Feedback Amplifiers presents in two chapters the background and an overview of the design methodology. Whereafter, in six chapters the separate design steps are treated with great detail. Each chapter comprises several exercises. An additional chapter is dedicated to how to design current sources and voltage source, which are required for the biasing. The final chapter in the book is dedicated to a thoroughly described design example, showing clearly the benefits of the design methodology. In short, this book is valuable for M.Sc.-curriculum Electrical Engineering students, and of course, for researchers and designers who want to structure their knowledge about analog design further.

A set of original results in the ?eld of high-level design of logical control devices and systems is presented in this book. These concern different aspects of such important and long-term design problems, including the following, which seem to be the main ones. First, the behavior of a device under design must be described properly, and some adequate formal language should be chosen for that. Second, effective algorithmsshouldbeusedforcheckingtheprepareddescriptionforcorrectness, foritssyntacticandsemanticveri?cationattheinitialbehaviorlevel.Third, the problem of logic circuit implementation must be solved using some concrete technological base; ef?cient methods of logic synthesis, test, and veri?cation should be developed for that. Fourth, the task of the communication between the control device and controlled objects (and maybe between different control devices)waitsforitssolution.Alltheseproblemsarehardenoughandcannotbe successfully solved without ef?cient methods and algorithms oriented toward computer implementation. Some of these are described in this book. The languages used for behavior description have been descended usually from two well-known abstract models which became classic: Petri nets and ?nite state machines (FSMs). Anyhow, more detailed versions are developed and described in the book, which enable to give more complete information concerningspeci?cqualitiesoftheregardedsystems.Forexample, themodelof parallelautomatonispresented, whichunliketheconventional?niteautomaton can be placed simultaneously into several places, calledpartial. As a base for circuit implementation of control algorithms, FPGA is accepted in majority of cas

This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology.

Important topics include:
- Microarchitectural techniques to reduce energy per operation
- Power reduction with timing slack from pipelining
- Analysis of the benefits of using multiple supply and threshold voltages
- Placement techniques for multiple supply voltages
- Verification for multiple voltage domains
- Improved algorithms for gate sizing, and assignment of supply and threshold voltages
- Power gating design automation to reduce leakage
- Relationships among tatistical timing, power analysis, and parametric yield optimization

Design examples illustrate that these techniques can improve energy efficiency by two to three times.

New Algorithms, Architectures and Applications for Reconfigurable Computing consists of a collection of contributions from the authors of some of the best papers from the Field Programmable Logic conference (FPL 03) and the Design and Test Europe conference (DATE 03). In all, seventy-nine authors, from research teams from all over the world, were invited to present their latest research in the extended format permitted by this special volume. The result is a valuable book that is a unique record of the state of the art in research into field programmable logic and reconfigurable computing.

The contributions are organized into twenty-four chapters and are grouped into three main categories: architectures, tools and applications. Within these three broad areas the most strongly represented themes are coarse-grained architectures; dynamically reconfigurable and multi-context architectures; tools for coarse-grained and reconfigurable architectures; networking, security and encryption applications.

Field programmable logic and reconfigurable computing are exciting research disciplines that span the traditional boundaries of electronic engineering and computer science. When the skills of both research communities are combined to address the challenges of a single research discipline they serve as a catalyst for innovative research. The work reported in the chapters of this book captures that spirit of that innovation."

Evolutionary algorithms are successful biologically inspired meta-heuristics. Their success depends on adequate parameter settings. The question arises: how can evolutionary algorithms learn parameters automatically during the optimization? Evolution strategies gave an answer decades ago: self-adaptation. Their self-adaptive mutation control turned out to be exceptionally successful. But nevertheless self-adaptation has not achieved the attention it deserves. This book introduces various types of self-adaptive parameters for evolutionary computation. Biased mutation for evolution strategies is useful for constrained search spaces. Self-adaptive inversion mutation accelerates the search on combinatorial TSP-like problems. After the analysis of self-adaptive crossover operators the book concentrates on premature convergence of self-adaptive mutation control at the constraint boundary. Besides extensive experiments, statistical tests and some theoretical investigations enrich the analysis of the proposed concepts.

The Maintenance Management Framework describes and reviews the concept, process and framework of modern maintenance management of complex systems; concentrating specifically on modern modelling tools (deterministic and empirical) for maintenance planning and scheduling. It will be bought by engineers and professionals involved in maintenance management, maintenance engineering, operations management, quality, etc. as well as graduate students and researchers in this field.

Evolutionary algorithms (EAs), as well as other bio-inspired heuristics, are widely usedto solvenumericaloptimizationproblems.However, intheir or- inal versions, they are limited to unconstrained search spaces i.e they do not include a mechanism to incorporate feasibility information into the ?tness function. On the other hand, real-world problems usually have constraints in their models. Therefore, a considerable amount of research has been d- icated to design and implement constraint-handling techniques. The use of (exterior) penalty functions is one of the most popular methods to deal with constrained search spaces when using EAs. However, other alternative me- ods have been proposed such as: special encodings and operators, decoders, the use of multiobjective concepts, among others. An e?cient and adequate constraint-handling technique is a key element in the design of competitive evolutionary algorithms to solve complex op- mization problems. In this way, this subject deserves special research e?orts. After asuccessfulspecialsessiononconstraint-handlingtechniquesusedin evolutionary algorithms within the Congress on Evolutionary Computation (CEC) in 2007, and motivated by the kind invitation made by Dr. Janusz Kacprzyk, I decided to edit a book, with the aim of putting together recent studies on constrained numerical optimization using evolutionary algorithms and other bio-inspired approaches. The intended audience for this book comprises graduate students, prac- tionersandresearchersinterestedonalternativetechniquestosolvenumerical optimization problems in presence of constraints

In today's competitive world, industries focus on shorter lead times, improved quality, reduced cost, improved productivity and better customer service. This book offers an overview of intelligent computing in manufacturing, discussing modeling, data processing, algorithms and computational analysis of problems encountered in advanced manufacturing. Coverage includes techniques to aid decision makers dealing with multiple, conflicting objectives. Readers will gain knowledge of computational technologies for improving the performance of manufacturing systems.

Collaborative Product Design and Manufacturing Methodologies and Applications introduces a wide spectrum of collaborative engineering issues in design and manufacturing. It offers state-of-the-art chapters written by international experts from academia and industry, and reflects the most up-to-date R & D work and applications, especially those from the last three to five years. The book will serve as an essential reference for academics, upper-level undergraduate and graduate students and practicing professionals.

Interconnect has become the dominating factor in determining system performance in nanometer technologies. This book is dedicated to this important subject. The primary purpose of this monograph is to provide insight and intuition into layout analysis and optimization for interconnect in high speed, high complexity integrated circuits.

In this monograph, the effects of wire size, spacing between wires, wire length, coupling length, load capacitance, rise time of the inputs, place of overlap (near driver or receiver side), frequency, shields, direction of the signals, and wire width for both the aggressors and the victim wires on system performance and reliability is thoroughly investigated. Also, parameters like driver strength has been considered as several recent studies considered the simultaneous device and interconnect sizing. Crosstalk noise, as well as the impact of coupling on aggressor delay is analyzed. The pulse width of the crosstalk noise, which is of similar importance for circuit performance as the peak amplitude, is also analyzed. We have considered more parameters that can affect the signal integrity and presented practical intensive simulation results.

This book brings together a wealth of information previously scattered throughout the literature, presenting a range of CAD algorithms and techniques for synthesizing and optimizing interconnect. The practical aspects of the algorithms and models are explained with sufficient detail.

It deeply investigates the most two effective parameters in layout optimization, spacing and shield insertion, that can affect both capacitive and inductive noise. Noise models needed for layouts with multi-layer multi-crosscoupling segments are investigated. Different post-layout optimization techniques are explained with complexity analysis and benchmarks tests are provided.

IDT (Intelligent Decision Technologies) seeks an interchange of research on intelligent systems and intelligent technologies which enhance or improve decision making in industry, government and academia. The focus is interdisciplinary in nature, and includes research on all aspects of intelligent decision technologies, from fundamental development to the applied system.

It constitutes a great honor and pleasure for us to publish the works and new research results of scholars from the First KES International Symposium on Intelligent Decision Technologies (KES IDT'09), hosted and organized by University of Hyogo in conjunction with KES International (Himeji, Japan, April, 2009). The symposium was concerned with theory, design, development, implementation, testing and evaluation of intelligent decision systems. Its topics included intelligent agents, fuzzy logic, multi-agent systems, artificial neural networks, genetic algorithms, expert systems, intelligent decision making support systems, information retrieval systems, geographic information systems, and knowledge management systems. These technologies have the potential to support decision making in many areas of management, international business, finance, accounting, marketing, healthcare, military applications, production, networks, traffic management, crisis response, and human interfaces.

Efficient assembly line design is a problem of considerable industrial importance. Assembly Line Design will be bought by technical personnel working in design, planning and production departments in industry as well as managers in industry who want to learn more about concurrent engineering. This book will also be purchased by researchers and postgraduate students in mechanical, manufacturing or micro-engineering.