The motivation for starting the work described in this book was the interest that Hewlett-Packard's microwave circuit designers had in simulation techniques that could tackle the problem of finding steady state solutions for nonlinear circuits, particularly circuits containing distributed elements such as transmission lines. Examining the problem of computing steady-state solutions in this context has led to a collection of novel numerical algorithms which we have gathered, along with some background material, into this book. Although we wished to appeal to as broad an audience as possible, to treat the subject in depth required maintaining a narrow focus. Our compromise was to assume that the reader is familiar with basic numerical methods, such as might be found in [dahlquist74] or [vlach83], but not assume any specialized knowledge of methods for steady-state problems. Although we focus on algorithms for computing steady-state solutions of analog and microwave circuits, the methods herein are general in nature and may find use in other disciplines. A number of new algorithms are presented, the contributions primarily centering around new approaches to harmonic balance and mixed frequency-time methods. These methods are described, along with appropriate background material, in what we hope is a reasonably satisfying blend of theory, practice, and results. The theory is given so that the algorithms can be fully understood and their correctness established.

Formal Design Theory (PDT) is a mathematical theory of design. The main goal of PDT is to develop a domain independent core model of the design process. The book focuses the reader's attention on the process by which ideas originate and are developed into workable products. In developing PDT, we have been striving toward what has been expressed by the distinguished scholar Simon (1969): that "the science of design is possible and some day we will be able to talk in terms of well-established theories and practices. " The book is divided into five interrelated parts. The conceptual approach is presented first (Part I); followed by the theoretical foundations of PDT (Part II), and from which the algorithmic and pragmatic implications are deduced (Part III). Finally, detailed case-studies illustrate the theory and the methods of the design process (Part IV), and additional practical considerations are evaluated (Part V). The generic nature of the concepts, theory and methods are validated by examples from a variety of disciplines. FDT explores issues such as: algebraic representation of design artifacts, idealized design process cycle, and computational analysis and measurement of design process complexity and quality. FDT's axioms convey the assumptions of the theory about the nature of artifacts, and potential modifications of the artifacts in achieving desired goals or functionality. By being able to state these axioms explicitly, it is possible to derive theorems and corollaries, as well as to develop specific analytical and constructive methodologies.

This book is the third in a series of books collecting the best papers from the three main regional conferences on electronic system design languages, HDLCon in the United States, APCHDL in Asia-Pacific and FDL in Europe. Being APCHDL bi-annual, this book presents a selection of papers from HDLCon'Ol and FDL'OI. HDLCon is the premier HDL event in the United States. It originated in 1999 from the merging of the International Verilog Conference and the Spring VHDL User's Forum. The scope of the conference expanded from specialized languages such as VHDL and Verilog to general purpose languages such as C++ and Java. In 2001 it was held in February in Santa Clara, CA. Presentations from design engineers are technical in nature, reflecting real life experiences in using HDLs. EDA vendors presentations show what is available - and what is planned-for design tools that utilize HDLs, such as simulation and synthesis tools. The Forum on Design Languages (FDL) is the European forum to exchange experiences and learn of new trends, in the application of languages and the associated design methods and tools, to design complex electronic systems. FDL'OI was held in Lyon, France, around seven interrelated workshops, Hardware Description Languages, Analog and Mixed signal Specification, C/C++ HW/SW Specification and Design, Design Environments & Languages, Real-Time specification for embedded Systems, Architecture Modeling and Reuse and System Specification & Design Languages.

Memory Architecture Exploration for Programmable Embedded Systems addresses efficient exploration of alternative memory architectures, assisted by a "compiler-in-the-loop" that allows effective matching of the target application to the processor-memory architecture. This new approach for memory architecture exploration replaces the traditional black-box view of the memory system and allows for aggressive co-optimization of the programmable processor together with a customized memory system.
The book concludes with a set of experiments demonstrating the utility of this exploration approach. The authors perform architecture and compiler exploration for a set of large, real-life benchmarks, uncovering promising memory configurations from different perspectives, such as cost, performance and power.

This book covers in a great depth the fast growing topic of tools, techniques and applications of soft computing (e.g., fuzzy logic, genetic algorithms, neural networks, rough sets, Bayesian networks, and other probabilistic techniques) in the ontologies and the Semantic Web. The author shows how components of the Semantic Web (like the RDF, Description Logics, ontologies) can be covered with a soft computing methodology.

This edited collection of essays from world-leading academic and industrial authors yields insight into all aspects of reverse engineering. Methods of reverse engineering analysis are covered, along with special emphasis on the investigation of surface and internal structures. Frequently-used hardware and software are assessed and advice given on the most suitable choice of system.

Also covered is rapid prototyping and its relationship with successful reverse engineering.

This book contains an edited version of the lectures and selected contributions presented during the Advanced Summer Institute (ASI) on "Product Engineering: Tools and Methods based on Virtual Reality" held at Chania (Greece), 30th May - 6th June 2007. The ASI was devoted to the Product Engineering field, with particular attention being given to the aspects related to Virtual Reality (VR) technologies, and their use and added value in engineering.

Data Access and Storage Management for Embedded Programmable Processors gives an overview of the state-of-the-art in system-level data access and storage management for embedded programmable processors. The targeted application domain covers complex embedded real-time multi-media and communication applications. Many of these applications are data-dominated in the sense that their cost related aspects, namely power consumption and footprint are heavily influenced (if not dominated) by the data access and storage aspects. The material is mainly based on research at IMEC in this area in the period 1996-2001. In order to deal with the stringent timing requirements and the data dominated characteristics of this domain, we have adopted a target architecture style that is compatible with modern embedded processors, and we have developed a systematic step-wise methodology to make the exploration and optimization of such applications feasible in a source-to-source precompilation approach.

Evolutionary algorithms are general-purpose search procedures based on the mechanisms of natural selection and population genetics. They are appealing because they are simple, easy to interface, and easy to extend. This volume is concerned with applications of evolutionary algorithms and associated strategies in engineering. It will be useful for engineers, designers, developers, and researchers in any scientific discipline interested in the applications of evolutionary algorithms. The volume consists of five parts, each with four or five chapters. The topics are chosen to emphasize application areas in different fields of engineering. Each chapter can be used for self-study or as a reference by practitioners to help them apply evolutionary algorithms to problems in their engineering domains.

In Thermal and Power Management of Integrated Circuits, power and thermal management issues in integrated circuits during normal operating conditions and stress operating conditions are addressed. Thermal management in VLSI circuits is becoming an integral part of the design, test, and manufacturing. Proper thermal management is the key to achieve high performance, quality and reliability. Performance and reliability of integrated circuits are strong functions of the junction temperature. A small increase in junction temperature may result in significant reduction in the device lifetime.

This book reviews the significance of the junction temperature as a reliability measure under nominal and burn-in conditions. The latest research in the area of electro-thermal modeling of integrated circuits will also be presented. Recent models and associated CAD tools are covered and various techniques at the circuit and system levels are reviewed. Subsequently, the authors provide an insight into the concept of thermal runaway and how it may best be avoided. A section on low temperature operation of integrated circuits concludes the book.

This volume provides a complete understanding of the fundamental causes of routing congestion in present-day and next-generation VLSI circuits, offers techniques for estimating and relieving congestion, and provides a critical analysis of the accuracy and effectiveness of these techniques. The book includes metrics and optimization techniques for routing congestion at various stages of the VLSI design flow. The subjects covered include an explanation of why the problem of congestion is important and how it will trend, plus definitions of metrics that are appropriate for measuring congestion, and descriptions of techniques for estimating and optimizing routing congestion issues in cell-/library-based VLSI circuits.

This book deals with the analysis and design of CMOS current-mode circuits for data communications. CMOS current-mode sampled-data networks, i.e. switched-current circuits, are excluded. Major subjects covered in the book include: a critical comparison of voltage-mode and current-mode circuits; the building blocks of current-mode circuits: design techniques; modeling of wire channels, electrical signaling for Gbps data communications; ESD protection for current-mode circuits and more. This book will appeal to IC design engineers, hardware system engineers and others.

Design for Manufacturability and Yield for Nano-Scale CMOS walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process and how to address each aspect at the proper design step starting with the design and layout of standard cells and how to yield-grade libraries for critical area and lithography artifacts through place and route, CMP model based simulation and dummy-fill insertion, mask planning, simulation and manufacturing, and through statistical design and statistical timing closure of the design. It alerts the designer to the pitfalls to watch for and to the good practices that can enhance a design s manufacturability and yield. This book is a must read book the serious practicing IC designer and an excellent primer for any graduate student intent on having a career in IC design or in EDA tool development."

Covers in detail promising solutions at the device, circuit, and architecture levels of abstraction after first explaining the sensitivity of the various MOS leakage sources to these conditions from the first principles.

Also treated are the resulting effects so the reader understands the effectiveness of leakage power reduction solutions under these different conditions.

Case studies supply real-world examples that reap the benefits of leakage power reduction solutions as the book highlights different device design choices that exist to mitigate increases in the leakage components as technology scales.

SystemC Kernel Extensions for Heterogeneous System Modeling is a result of an almost two year endeavour on our part to understand how SystemC can be made useful for system level modeling at higher levels of abstraction. Making it a truly heterogeneous modeling language and platform, for hardware/software co-design as well as complex embedded hardware designs has been our focus in the work reported in this book.

This volume reflects the theme of the INFORMS 2004 Meeting in Denver: Back to OR Roots. Emerging as a quantitative approach to problem-solving in World War II, our founders were physicists, mathematicians, and engineers who quickly found peace-time uses. It is fair to say that Operations Research (OR) was born in the same incubator as computer science, and it has spawned many new disciplines, such as systems engineering, health care management, and transportation science. Although people from many disciplines routinely use OR methods, many scientific researchers, engineers, and others do not understand basic OR tools and how they can help them. Disciplines ranging from finance to bioengineering are the beneficiaries of what we do - we take an interdisciplinary approach to problem-solving. Our strengths are modeling, analysis, and algorithm design. We provide a quanti- tive foundation for a broad spectrum of problems, from economics to medicine, from environmental control to sports, from e-commerce to computational - ometry. We are both producers and consumers because the mainstream of OR is in the interfaces. As part of this effort to recognize and extend OR roots in future probl- solving, we organized a set of tutorials designed for people who heard of the topic and want to decide whether to learn it. The 90 minutes was spent addre- ing the questions: What is this about, in a nutshell? Why is it important? Where can I learn more? In total, we had 14 tutorials, and eight of them are published here.

IDT (Intelligent Decision Technologies) seeks an interchange of research on intelligent systems and intelligent technologies which enhance or improve decision making in industry, government and academia. The focus is interdisciplinary in nature, and includes research on all aspects of intelligent decision technologies, from fundamental development to the applied system.

It constitutes a great honor and pleasure for us to publish the works and new research results of scholars from the First KES International Symposium on Intelligent Decision Technologies (KES IDT'09), hosted and organized by University of Hyogo in conjunction with KES International (Himeji, Japan, April, 2009). The symposium was concerned with theory, design, development, implementation, testing and evaluation of intelligent decision systems. Its topics included intelligent agents, fuzzy logic, multi-agent systems, artificial neural networks, genetic algorithms, expert systems, intelligent decision making support systems, information retrieval systems, geographic information systems, and knowledge management systems. These technologies have the potential to support decision making in many areas of management, international business, finance, accounting, marketing, healthcare, military applications, production, networks, traffic management, crisis response, and human interfaces.

This edited volume is targeted at presenting the latest state-of-the-art methodologies in "Hybrid Evolutionary Algorithms." The chapters deal with the theoretical and methodological aspects, as well as various applications to many real world problems from science, technology, business or commerce. Overall, the book has 14 chapters including an introductory chapter giving the fundamental definitions and some important research challenges. The contributions were selected on the basis of fundamental ideas/concepts rather than the thoroughness of techniques deployed.

This volume is dedicated to the memory of Barclay G. Jones, Professor of City and Regional Planning and Regional Science at Cornell University. Over a decade ago, Barclay took on a fledgling area of study - economic modeling of disasters - and nurtured its early development. He served as the social science program director at the National Center for Earthquake Engineering Research (NCEER), a university consortium sponsored by the National Science Foundation and the Federal Emergency Management Agency of the United States. In this capacity, Barclay shepherded and attracted a number of regional scientists to the study of disasters. He organized a conference, held in the ill-fated World Trade Center in September 1995, on "The Economic Consequences of Earthquakes: Preparing for the Unexpected. " He persistently advocated the importance of social science research in an establishment dominated by less-than-sympathetic natural scientists and engineers. In 1993, Barclay organized the first of a series of sessions on "Measuring Regional Economic Effects of Unscheduled Events" at the North American Meetings of the Regional Science Association International (RSAI). This unusual nomenclature brought attention to the challenge that disasters -largely unanticipated, often sudden, and always disorderly - pose to the regional science modeling tradition. The sessions provided an annual forum for a growing coalition of researchers, where previously the literature had been fragmentary, scattered, and episodic. Since Barclay's unexpected passing in 1997, we have continued this effort in his tradition.

Computer-Aided Design of User Interfaces VI gathers the latest experience of experts, research teams and leading organisations involved in computer-aided design of user interactive applications. This area investigates how it is desirable and possible to support, to facilitate and to speed up the development life cycle of any interactive system: requirements engineering, early-stage design, detailed design, deelopment, deployment, evaluation, and maintenance. In particular, it stresses how the design activity could be better understood for different types of advanced interactive ubiquitous computing, and multi-device environments.

The building blocks of today's and future embedded systems are complex intellectual property components, or cores, many of which are programmable processors. Traditionally, these embedded processors mostly have been pro grammed in assembly languages due to efficiency reasons. This implies time consuming programming, extensive debugging, and low code portability. The requirements of short time-to-market and dependability of embedded systems are obviously much better met by using high-level language (e.g. C) compil ers instead of assembly. However, the use of C compilers frequently incurs a code quality overhead as compared to manually written assembly programs. Due to the need for efficient embedded systems, this overhead must be very low in order to make compilers useful in practice. In turn, this requires new compiler techniques that take the specific constraints in embedded system de sign into account. An example are the specialized architectures of recent DSP and multimedia processors, which are not yet sufficiently exploited by existing compilers."

This book provides insight into the behavior and design of power distribution systems for high speed, high complexity integrated circuits. Also presented are criteria for estimating minimum required on-chip decoupling capacitance. Techniques and algorithms for computer-aided design of on-chip power distribution networks are also described; however, the emphasis is on developing circuit intuition and understanding the principles that govern the design and operation of power distribution systems.

This book will help engineers write better Verilog/SystemVerilog design and verification code as well as deliver digital designs to market more quickly. It shows over 100 common coding mistakes that can be made with the Verilog and SystemVerilog languages. Each example explains in detail the symptoms of the error, the languages rules that cover the error, and the correct coding style to avoid the error. The book helps digital design and verification engineers to recognize, and avoid, these common coding mistakes. Many of these errors are very subtle, and can potentially cost hours or days of lost engineering time trying to find and debug them.

Communication between engineers, their managers, suppliers and customers relies on the existence of a common understanding for the meaning of terms. While this is not normally a problem, it has proved to be a significant roadblock in the EDA industry where terms are created as required by any number of people, multiple terms are coined for the same thing, or even worse, the same term is used for many different things. This taxonomy identifies all of the significant terms used by an industry and provides a structural framework in which those terms can be defined and their relationship to other terms identified. The origins of this work go back to 1995 with a government-sponsored program called RASSP. At the termination of their work, VSIA picked up their work and developed it further. Three new taxonomies were introduced by VSIA for additional facets of the system design and development process. Since role of VSIA has now changed so that it no longer maintains these taxonomies, the baton is being passed on again through a group of interested people and manifested in this key reference work.

Mixed Reality is moving out of the research-labs into our daily lives. It plays an increasing role in architecture, design and construction. The combination of digital content with reality creates an exciting synergy that sets out to enhance engagement within architectural design and construction. State-of-the-art research projects on theories and applications within Mixed Reality are presented by leading researchers covering topics in architecture, design collaboration, construction and education. They discuss current projects and offer insight into the next wave of Mixed Reality possibilities.