This book provides a complete overview of the field of carbon nanotube electronics. It covers materials and physical properties, synthesis and fabrication processes, devices and circuits, modeling, and finally novel applications of nanotube-based electronics. The book introduces fundamental device physics and circuit concepts of 1-D electronics. At the same time it provides specific examples of the state-of-the-art nanotube devices.

By virtue of their special algebraic structures, Pythagorean-hodograph (PH) curves offer unique advantages for computer-aided design and manufacturing, robotics, motion control, path planning, computer graphics, animation, and related fields. This book offers a comprehensive and self-contained treatment of the mathematical theory of PH curves, including algorithms for their construction and examples of their practical applications. It emphasizes the interplay of ideas from algebra and geometry and their historical origins and includes many figures, worked examples, and detailed algorithm descriptions.

The contents of this book are an expanded treatment of a set of presentations given at the first IEEE Workshop on Signal Propagation on Interconnects held Trnvemiindc, Germany, May 14- 16, 1997. Traditional VLSI-based cost and complexity measures have principally incolved transistor counts and chip area. Yet with the increase in clock frequency transistor has become an issue of major concern" At present the emergence of systems on silicon feces designers with a new challenge: how to guarantee signal integrity while propagating high signals between embedded cores on a Thus, interconnects are becuming a significant limiter of future system performance. The element~ involved arc mainly transmission lines but also other interconnect devices life vias, and packages" The electrical phenomena that have to investigated, as for example delay and crosstalk, are governed by electromagnetic theory. Consequently, even in digital circuits there large sectians in whieh the can longer considered logical ones and zeros but must be treated as analog waveforms. To complicate matters, the descriptian of subcircuits by ordinary differential eyuations is inadequate in many instsnces. Only the use yartial differential aquations should guarantee sufficiently accurate results. Yet this would unfortunately increase the camplexity af simulatian and besign tremendously" Therefore, new approuuhes need to be developed.

Formal verification has become one of the most important steps in circuit design. Since circuits can contain several million transistors, verification of such large designs becomes more and more difficult. Pure simulation cannot guarantee the correct behavior and exhaustive simulation is often impossible. However, many designs, like ALUs, have very regular structures that can be easily described at a higher level of abstraction. For example, describing (and verifying) an integer multiplier at the bit-level is very difficult, while the verification becomes easy when the outputs are grouped to build a bit-string. Recently, several approaches for formal circuit verification have been proposed that make use of these regularities. These approaches are based on Word-Level Decision Diagrams (WLDDs) which are graph-based representations of functions (similar to BDDs) that allow for the representation of functions with a Boolean range and an integer domain. Formal Verification of Circuits is devoted to the discussion of recent developments in the field of decision diagram-based formal verification. Firstly, different types of decision diagrams (including WLDDs) are introduced and theoretical properties are discussed that give further insight into the data structure. Secondly, implementation and minimization concepts are presented. Applications to arithmetic circuit verification and verification of designs specified by hardware description languages are described to show how WLDDs work in practice. Formal Verification of Circuits is intended for CAD developers and researchers as well as designers using modern verification tools. It will help people working with formal verification (in industry or academia) to keep informed about recent developments in this area.

As electronic technology reaches the point where complex systems can be integrated on a single chip, and higher degrees of performance can be achieved at lower costs, designers must devise new ways to undertake the laborious task of coping with the numerous, and non-trivial, problems that arise during the conception of such systems. On the other hand, shorter design cycles (so that electronic products can fit into shrinking market windows) put companies, and consequently designers, under pressure in a race to obtain reliable products in the minimum period of time. New methodologies, supported by automation and abstraction, have appeared which have been crucial in making it possible for system designers to take over the traditional electronic design process and embedded systems is one of the fields that these methodologies are mainly targeting. The inherent complexity of these systems, with hardware and software components that usually execute concurrently, and the very tight cost and performance constraints, make them specially suitable to introduce higher levels of abstraction and automation, so as to allow the designer to better tackle the many problems that appear during their design. Advanced Techniques for Embedded Systems Design and Test is a comprehensive book presenting recent developments in methodologies and tools for the specification, synthesis, verification, and test of embedded systems, characterized by the use of high-level languages as a road to productivity. Each specific part of the design process, from specification through to test, is looked at with a constant emphasis on behavioral methodologies. Advanced Techniques for Embedded Systems Design and Test is essential reading for all researchers in the design and test communities as well as system designers and CAD tools developers.

This book provides a solid and uniform derivation of the various properties Bezier and B-spline representations have, and shows the beauty of the underlying rich mathematical structure. The book focuses on the core concepts of Computer Aided Geometric Design and provides a clear and illustrative presentation of the basic principles, as well as a treatment of advanced material including multivariate splines, some subdivision techniques and constructions of free form surfaces with arbitrary smoothness. The text is beautifully illustrated with many excellent figures to emphasize the geometric constructive approach of this book.

On Optimal Interconnections for VLSI describes, from a geometric perspective, algorithms for high-performance, high-density interconnections during the global and detailed routing phases of circuit layout. First, the book addresses area minimization, with a focus on near-optimal approximation algorithms for minimum-cost Steiner routing. In addition to practical implementations of recent methods, the implications of recent results on spanning tree degree bounds and the method of Zelikovsky are discussed. Second, the book addresses delay minimization, starting with a discussion of accurate, yet algorithmically tractable, delay models. Recent minimum-delay constructions are highlighted, including provably good cost-radius tradeoffs, critical-sink routing algorithms, Elmore delay-optimal routing, graph Steiner arborescences, non-tree routing, and wiresizing. Third, the book addresses skew minimization for clock routing and prescribed-delay routing formulations. The discussion starts with early matching-based constructions and goes on to treat zero-skew routing with provably minimum wirelength, as well as planar clock routing. Finally, the book concludes with a discussion of multiple (competing) objectives, i.e., how to optimize area, delay, skew, and other objectives simultaneously. These techniques are useful when the routing instance has heterogeneous resources or is highly congested, as in FPGA routing, multi-chip packaging, and very dense layouts. Throughout the book, the emphasis is on practical algorithms and a complete self-contained development. On Optimal Interconnections for VLSI will be of use to both circuit designers (CAD tool users) as well as researchers and developers in the area of performance-driven physical design.

Introduction to Hardware-Software Co-Design presents a number of issues of fundamental importance for the design of integrated hardware software products such as embedded, communication, and multimedia systems. This book is a comprehensive introduction to the fundamentals of hardware/software co-design. Co-design is still a new field but one which has substantially matured over the past few years. This book, written by leading international experts, covers all the major topics including: fundamental issues in co-design; hardware/software co-synthesis algorithms; prototyping and emulation; target architectures; compiler techniques; specification and verification; system-level specification. Special chapters describe in detail several leading-edge co-design systems including Cosyma, LYCOS, and Cosmos. Introduction to Hardware-Software Co-Design contains sufficient material for use by teachers and students in an advanced course of hardware/software co-design. It also contains extensive explanation of the fundamental concepts of the subject and the necessary background to bring practitioners up-to-date on this increasingly important topic.

Edited book reporting recent results in AI research in power plant surveillance and diagnostics. High quality and applicability of the contributions through a thorough peer-reviewing process. Condition Monitoring and Early Fault Detection provide for better efficiency of energy systems, at lower costs.

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Featured Topics: Analysis of important issues relating to specification, development and use of systems for computer-assisted plant surveillance and diagnosis.- Empirical and analytical methods for on-line calibration monitoring and data reconciliation.- Noise analysis methods for early fault detection, condition monitoring, leak detection and loose part monitoring.- Predictive maintenance and condition monitoring techniques.- Empirical and analytical methods for fault detection and recognition.

It is well known that embedded systems have to be implemented efficiently. This requires that processors optimized for certain application domains are used in embedded systems. Such an optimization requires a careful exploration of the design space, including a detailed study of cost/performance tradeoffs. In order to avoid time-consuming assembly language programming during design space exploration, compilers are needed. In order to analyze the effect of various software or hardware configurations on the performance, retargetable compilers are needed that can generate code for numerous different potential hardware configurations. This book provides a comprehensive and up-to-date overview of the fast developing area of retargetable compilers for embedded systems. It describes a large set important tools as well as applications of retargetable compilers at different levels in the design flow. Retargetable Compiler Technology for Embedded Systems is mostly self-contained and requires only fundamental knowledge in software and compiler design. It is intended to be a key reference for researchers and designers working on software, compilers, and processor optimization for embedded systems.

This new book on Analog Circuit Design contains the revised contributions of all the tutorial speakers of the eight workshop AACD (Advances in Analog Circuit Design), which was held at Nice, France on March 23-25, 1999. The workshop was organized by Yves Leduc of TI Nice, France. The program committee consisted of Willy Sansen, K.U.Leuven, Belgium, Han Huijsing, T.U.Delft, The Netherlands and Rudy van de Plassche, T.U.Eindhoven, The Netherlands. The aim of these AACD workshops is to bring together a restricted group of about 100 people who are personally advancing the frontiers of analog circuit design to brainstorm on new possibilities and future developments in a restricted number of fields. They are concentrated around three topics. In each topic six speakers give a tutorial presentation. Eighteen papers are thus included in this book. The topics of 1999 are: (X)DSL and other communication systems RF MOST models Integrated filters and oscillators The other topics, which have been coverd before, are: 1992 Operational amplifiers A-D Converters Analog CAD 1993 Mixed-mode A]D design Sensor interfaces Communication circuits 1994 Low-power low-voltage design Integrated filters Smart power 1995 Low-noise low-power low-voltge design Mixed-mode design with CAD tools Voltage, current and time references vii viii 1996 RF CMOS circuit design Bandpass sigma-delta and other data converters Translinear circuits 1997 RF A-D Converters Sensor and actuator interfaces Low-noise oscillators, PLL's and synthesizers 1998 I-Volt electronics Design and implementation of mixed-mode systems Low-noise amplifiers and RF power amplifiers for telecommunications

Our society is faced with an increasing dependence on computing systems, not only in high tech consumer applications but also in areas (e.g., air and railway traffic control, nuclear plant control, aircraft and car control) where a failure can be critical for the safety of human beings. Unfortunately, it is accepted that large digital systems cannot be fault-free. Some faults may be attributed to inaccuracy during the development, while others can come from external causes such as environmental stress. Radiations, electromagnetic interference and power glitches are some of the most common causes of transient faults.
As a consequence, the past years have seen a growing interest in methods for studying the behaviour of computer-based systems when faults occur, and several approaches have been proposed to evaluate the dependability properties of a computer-based system.
Fault Injection, i.e., the artificial injection of faults into a computer system in order to study its behaviour, emerged as a viable solution, and has been deeply investigated by both academia and industry. Different techniques have been proposed and some of them practically experimented.
Fault Injection Techniques and Tools for Embedded Systems Reliability Evaluation intends to be a comprehensive guide to Fault Injection techniques used to evaluate the dependability of a digital system. The description and the critical analysis of different Fault Injection techniques and tools will be authored by key scientists in the field of system dependability and fault tolerance.

A critical step in the design of a DSP system is to identify for each of its components (DSP kernels) an implementation architecture that provides the desired degree of flexibility/programmability and optimises the area-delay-power parameters. The book covers the entire solution space comprising both hardware multiplier-based and multiplex-less architectures that offer varying degrees of programmability. For each of the implementation styles, several algorithmic and architectural transformations are proposed so as to optimally implement weighted-sum based DSP kernels over the area-display-power space. VLSI Synthesis of DSP Kernels presents the following: Six different target implementation styles - Programmable DSP-based implementation; Programmable processors with no dedicated hardware multiplier; Implementation using hardware multiplier(s) and adder(s); Distributed Arithmetic (DA)-based implementation; Residue Number System (RNS)-based implementation; and Multiplier-less implementation (using adders and shifters) for fixed coefficient DSP kernels. For each of the implementation styles, description and analysis of several algorithmic and architectural transformations aimed at one or more of reduced area, higher performance and low power; Automated and semi-automated techniques for applying each of these transformations; and Classification of the transformations based on the properties that they exploit and their encapsulation in a design framework. A methodology that uses the framework to systematically explore the application of these transformations depending on the characteristics of the algorithm and the target implementation style. VLSI Synthesis of DSP Kernels is essential reading for designers of both hardware- and software-based DSP systems, developers of IP modules for DSP applications, EDA tools developers, researchers and managers interested in getting a comprehensive overview of current trends and future challenges in optimal implementations of DSP kernels. It will also be suitable for graduate students specialising in the area of VLSI Digital Signal Processing.

The design of computer systems to be embedded in critical real-time applications is a complex task. Such systems must not only guarantee to meet hard real-time deadlines imposed by their physical environment, they must guarantee to do so dependably, despite both physical faults (in hardware) and design faults (in hardware or software). A fault-tolerance approach is mandatory for these guarantees to be commensurate with the safety and reliability requirements of many life- and mission-critical applications. This book explains the motivations and the results of a collaborative project', whose objective was to significantly decrease the lifecycle costs of such fault tolerant systems. The end-user companies participating in this project already deploy fault-tolerant systems in critical railway, space and nuclear-propulsion applications. However, these are proprietary systems whose architectures have been tailored to meet domain-specific requirements. This has led to very costly, inflexible, and often hardware-intensive solutions that, by the time they are developed, validated and certified for use in the field, can already be out-of-date in terms of their underlying hardware and software technology."

Evolutionary algorithms are general-purpose search procedures based on the mechanisms of natural selection and population genetics. They are appealing because they are simple, easy to interface, and easy to extend. This volume is concerned with applications of evolutionary algorithms and associated strategies in engineering. It will be useful for engineers, designers, developers, and researchers in any scientific discipline interested in the applications of evolutionary algorithms. The volume consists of five parts, each with four or five chapters. The topics are chosen to emphasize application areas in different fields of engineering. Each chapter can be used for self-study or as a reference by practitioners to help them apply evolutionary algorithms to problems in their engineering domains.

The papers collected in this volume were originally presented at the conference on Design and Decision Support Systems in Architecture and Urban Planning that was held in Mierlo, the Netherlands in July 1992. This conference was organized as one of the events celebrating the 25th anniversary of the founding of the Faculty of Architecture, Building and Planning at Eindhoven University of Technology. The organizing committee had a strong feeling that many interesting developments in this area were emerging within different institutional frameworks and informal networks that do not interact frequently. For example, scholars working on architectural problems are not particularly familiar with computer applications in urban planning. Likewise, although many computer-aided design systems claim to be based on principles of design methodology, serious discussions on the methodological underpinnings of such systems are relatively scarce. Consequently, we may have little opportunity to learn how scholars in closely related disciplines approach specific design or planning problems.

This book is the third in a series of books collecting the best papers from the three main regional conferences on electronic system design languages, HDLCon in the United States, APCHDL in Asia-Pacific and FDL in Europe. Being APCHDL bi-annual, this book presents a selection of papers from HDLCon'Ol and FDL'OI. HDLCon is the premier HDL event in the United States. It originated in 1999 from the merging of the International Verilog Conference and the Spring VHDL User's Forum. The scope of the conference expanded from specialized languages such as VHDL and Verilog to general purpose languages such as C++ and Java. In 2001 it was held in February in Santa Clara, CA. Presentations from design engineers are technical in nature, reflecting real life experiences in using HDLs. EDA vendors presentations show what is available - and what is planned-for design tools that utilize HDLs, such as simulation and synthesis tools. The Forum on Design Languages (FDL) is the European forum to exchange experiences and learn of new trends, in the application of languages and the associated design methods and tools, to design complex electronic systems. FDL'OI was held in Lyon, France, around seven interrelated workshops, Hardware Description Languages, Analog and Mixed signal Specification, C/C++ HW/SW Specification and Design, Design Environments & Languages, Real-Time specification for embedded Systems, Architecture Modeling and Reuse and System Specification & Design Languages.

Sigma delta modulation has become a very useful and widely applied technique for high performance Analog-to-Digital (A/D) conversion of narrow band signals. Through the use of oversampling and negative feedback, the quantization errors of a coarse quantizer are suppressed in a narrow signal band in the output of the modulator. Bandpass sigma delta modulation is well suited for A/D conversion of narrow band signals modulated on a carrier, as occurs in communication systems such as AM/FM receivers and mobile phones. Due to the nonlinearity of the quantizer in the feedback loop, a sigma delta modulator may exhibit input signal dependent stability properties. The same combination of the nonlinearity and the feedback loop complicates the stability analysis. In Bandpass Sigma Delta Modulators, the describing function method is used to analyze the stability of the sigma delta modulator. The linear gain model commonly used for the quantizer fails to predict small signal stability properties and idle patterns accurately. In Bandpass Sigma Delta Modulators an improved model for the quantizer is introduced, extending the linear gain model with a phase shift. Analysis shows that the phase shift of a sampled quantizer is in fact a phase uncertainty. Stability analysis of sigma delta modulators using the extended model allows accurate prediction of idle patterns and calculation of small-signal stability boundaries for loop filter parameters. A simplified rule of thumb is derived and applied to bandpass sigma delta modulators. The stability properties have a considerable impact on the design of single-loop, one-bit, high-order continuous-time bandpass sigma delta modulators. The continuous-time bandpass loop filter structure should have sufficient degrees of freedom to implement the desired (small-signal stable) sigma delta modulator behavior. Bandpass Sigma Delta Modulators will be of interest to practicing engineers and researchers in the areas of mixed-signal and analog integrated circuit design.

This book contains selected contributions from the 7th CIRP International Seminar on Computer Aided Tolerancing, which was held on 24-25 April 2001, at the Ecole Normale Superieure de Cachan, France.

Tolerancing research is of major importance in the fields of design, manufacturing and inspection. Designers use tolerancing as a tool for expressing functional intents and for managing geometrical variations during a product life cycle. This book focuses in particular on Geometrical Product Specification and Verification which is an integrated tolerancing view and metrology proposed for ISO/TC213. Common geometrical bases for a language allowing to describe both functional specification and inspection procedures are provided. An extended view of the uncertainty concept is also given.

Geometric Product Specification and Verification: Functionality Integration is an excellent resource to anyone interested in computer aided tolerancing, as well as CAD/CAM/CAQ. It can also be used as a good starting point for advanced research activity and is a good reference for industrial issues. A global view of geometrical product specification, models for tolerance representation, tolerance analysis, tolerance synthesis, tolerance in manufacturing, tolerance management, tolerance inspection, tolerancing standards, industrial applications and CAT systems are also included. "

Hardware veri?cation is the process of checking whether a design conforms to its speci?cations of functionality and timing. In today's design processes it becomes more and more important. Very large scale integrated (VLSI) circuits and the resulting digital systems have conquered a place in almost all areas of our life, even in security sensitive applications. Complex digital systems control airplanes, have been used in banks and on intensive-care units. Hence, the demand for error-free designs is more important than ever. In addition, economic reasons underline this demand as well. The design and production process of present day VLSI-circuits is highly time- and cost-intensive. Mo- over, it is nearly impossible to repair integrated circuits. Thus, it is desirable to detect design errors early in the design process and not just after producing the prototype chip. All these facts are re?ected by developing and prod- tion statistics of present day companies. For example, In?neon Technologies [118] assumed that about 60% to 80% of the overall design time was spent for veri?cation in 2000. Other sources cite the 3-to-1 head count ratio between veri?cation engineers and logic designers. This shows that verifying logical correctness of the design of hardware systems is a major gate to the problem of time-to-market (cf. [113]). With the chip complexity constantly increasing, the dif?culty as well as the - portance of functional veri?cation of new product designs has been increased. It is not only more important to get error-free designs.

For someone with a hammer the whole world looks like a nail. Within the last 10-13 years Binar.y Decision Diagmms (BDDs) have become the state-of-the-art data structure in VLSI CAD for representation and ma nipulation of Boolean functions. Today, BDDs are widely used and in the meantime have also been integrated in commercial tools, especially in the area of verijication and synthesis. The interest in BDDs results from the fact that the data structure is generally accepted as providing a good compromise between conciseness of representation and efficiency of manipulation. With increasing number of applications, also in non CAD areas, classical methods to handle BDDs are being improved and new questions and problems evolve and have to be solved. The book should help the reader who is not familiar with BDDs (or DDs in general) to get a quick start. On the other hand it will discuss several new aspects of BDDs, e.g. with respect to minimization and implementation of a package. This will help people working with BDDs (in industry or academia) to keep informed about recent developments in this area."

System-on-Chip Methodologies & Design Languages brings together a selection of the best papers from three international electronic design language conferences in 2000. The conferences are the Hardware Description Language Conference and Exhibition (HDLCon), held in the Silicon Valley area of USA; the Forum on Design Languages (FDL), held in Europe; and the Asia Pacific Chip Design Language (APChDL) Conference. The papers cover a range of topics, including design methods, specification and modeling languages, tool issues, formal verification, simulation and synthesis. The results presented in these papers will help researchers and practicing engineers keep abreast of developments in this rapidly evolving field.

Today, Fuzzy Set Theory is the core discipline of so-called soft computing, and provides new impetus for research in the field of artificial intelligence. In this fascinating book, the history of Fuzzy Set Theory and the ways it was first used are incorporated into the history of 20th century science and technology. Influences from philosophy, system theory and cybernetics stemming from the earliest part of the 20th century are considered alongside those of communication and control theory from mid-century.

I am honored and delighted to write the foreword to this very first book about SystemC. It is now an excellent time to summarize what SystemC really is and what it can be used for. The main message in the area of design in the 2001 International Te- nologyRoadmapfor Semiconductors (ITRS) isthat"cost ofdesign is the greatest threat to the continuation ofthe semiconductor roadmap. " This recent revision of the ITRS describes the major productivity improvements of the last few years as "small block reuse," "large block reuse ," and "IC implementation tools. " In order to continue to reduce design cost, the - quired future solutions will be "intelligent test benches" and "embedded system-level methodology. " As the new system-level specification and design language, SystemC - rectly contributes to these two solutions. These will have the biggest - pact on future design technology and will reduce system implementation cost. Ittook SystemC less than two years to emerge as the leader among the many new and well-discussed system-level designlanguages. Inmy op- ion, this is due to the fact that SystemC adopted object-oriented syst- level design-the most promising method already applied by the majority of firms during the last couple of years. Even before the introduction of SystemC, many system designers have attempted to develop executable specifications in C++. These executable functional specifications are then refined to the well-known transaction level, to model the communication of system-level processes.

The chapters of this book summarize the lectures delivered du ring the NATO Advanced Study Institute (ASI) on Computational Methods in Mechanisms, that took place in the Sts. Constantin and Elena Resort, near Varna, on the Bulgarian Coast of the Black Sea, June 16-28, 1997. The purpose of the ASI was to bring together leading researchers in the area of mechanical systems at large, with special emphasis in the computational issues around their analysis, synthesis, and optimization, during two weeks of lectures and discussion. A total of 89 participants from 23 count ries played an active role during the lectures and sessions of contributed papers. Many of the latter are being currently reviewed for publication in specialized journals. The subject of the book is mechanical systems, Le., systems composed of rigid and flexible bodies, coupled by mechanical means so as to constrain their various bodies in a goal-oriented manner, usually driven under computer con trol. Applications of the discipline are thus of the most varied nature, ranging from transportation systems to biomedical devices. U nder normal operation conditions, the constitutive bodies of a mechanical system can be consid ered to be rigid, the rigidity property then easing dramatically the analysis of the kinematics and dynamics of the system at hand. Examples of these systems are the suspension of a terrestrial vehicle negotiating a curve at speeds within the allowed or recommended limits and the links of multiaxis industrial robots performing conventional pick-and-place operations."