This book serves as a reference for researchers and designers in Embedded Systems who need to explore design alternatives. It provides a design space exploration methodology for the analysis of system characteristics and the selection of the most appropriate architectural solution to satisfy requirements in terms of performance, power consumption, number of required resources, etc. Coverage focuses on the design of complex multimedia applications, where the choice of the optimal design alternative in terms of application/architecture pair is too complex to be pursued through a full search comparison, especially because of the multi-objective nature of the designer's goal, the simulation time required and the number of parameters of the multi-core architecture to be optimized concurrently.

Both authors have taught the course of "Distributed Systems" for many years in the respective schools. During the teaching, we feel strongly that "Distributed systems" have evolved from traditional "LAN" based distributed systems towards "Internet based" systems. Although there exist many excellent textbooks on this topic, because of the fast development of distributed systems and network programming/protocols, we have difficulty in finding an appropriate textbook for the course of "distributed systems" with orientation to the requirement of the undergraduate level study for today's distributed technology. Specifically, from - to-date concepts, algorithms, and models to implementations for both distributed system designs and application programming. Thus the philosophy behind this book is to integrate the concepts, algorithm designs and implementations of distributed systems based on network programming. After using several materials of other textbooks and research books, we found that many texts treat the distributed systems with separation of concepts, algorithm design and network programming and it is very difficult for students to map the concepts of distributed systems to the algorithm design, prototyping and implementations. This book intends to enable readers, especially postgraduates and senior undergraduate level, to study up-to-date concepts, algorithms and network programming skills for building modern distributed systems. It enables students not only to master the concepts of distributed network system but also to readily use the material introduced into implementation practices.

Discusses process variation, model accuracy, design flow and many other practical engineering, reliability and manufacturing issues Gives a good overview for a person who is not an expert in modeling and simulation, enabling them to extract the necessary information to competently use modeling and simulation programs Written for engineering students and product design engineers

Electromagnetic Compatibility of Integrated Circuits: Techniques for Low Emission and Susceptibility focuses on the electromagnetic compatibility of integrated circuits. The basic concepts, theory, and an extensive historical review of integrated circuit emission and susceptibility are provided. Standardized measurement methods are detailed through various case studies. EMC models for the core, I/Os, supply network, and packaging are described with applications to conducted switching noise, signal integrity, near-field and radiated noise. Case studies from different companies and research laboratories are presented with in-depth descriptions of the ICs, test set-ups, and comparisons between measurements and simulations. Specific guidelines for achieving low emission and susceptibility derived from the experience of EMC experts are presented.

SYROM conferences have been organized since 1973 by the Romanian branch of the International Federation for the Promotion of Mechanisms and Machine Science IFToMM, Year by year the event grew in quality. Now in its 10th edition, international visibility and recognition among the researchers active in the mechanisms science field has been achieved. SYROM 2009 brought together researchers and academic staff from the field of mechanisms and machine science from all over the world and served as a forum for presenting the achievements and most recent results in research and education. Topics treated include conceptual design, kinematics and dynamics, modeling and simulation, synthesis and optimization, command and control, current trends in education in this field, applications in high-tech products. The papers presented at this conference were subjected to a peer-review process to ensure the quality of the paper, the engineering significance, the soundness of results and the originality of the paper. The accepted papers fulfill these criteria and make the proceedings unique among the publications of this type.

E-maintenance is the synthesis of two major trends in today's society: the growing importance of maintenance as a key technology and the rapid development of information and communication technology. E-maintenance gives the reader an overview of the possibilities offered by new and advanced information and communication technology to achieve efficient maintenance solutions in industry, energy production and transportation, thereby supporting sustainable development in society. Sixteen chapters cover a range of different technologies, such as: new micro sensors, on-line lubrication sensors, smart tags for condition monitoring, wireless communication and smart personal digital assistants. E-maintenance also discusses semantic data-structuring solutions; ontology structured communications; implementation of diagnostics and prognostics; and maintenance decision support by economic optimisation. It includes four industrial cases that are both described and analysed in detail, with an outline of a global application solution. E-maintenance is a useful tool for engineers and technicians who wish to develop e-maintenance in industrial sites. It is also a source of new and stimulating ideas for researchers looking to make the next step towards sustainable development.

Designing Inclusive Interactions contains the proceedings of the fifth Cambridge Workshop on Universal Access and Assistive Technology (CWUAAT), incorporating the 8th Cambridge Workshop on Rehabilitation Robotics, held in Cambridge, England, in March 2010. It contains contributions from an international group of leading researchers in the fields of Universal Access and Assistive Technology. This conference will mainly focus on the following principal topics: 1. Designing assistive and rehabilitation technology for working and daily living environments 2. Measuring inclusion for the design of products for work and daily living 3. Inclusive interaction design and new technologies for inclusive design 4. Assembling new user data for inclusive design 5. The design of accessible and inclusive contexts: work and daily living environments 6. Business advantages and applications of inclusive design 7. Legislation, standards and government awareness of inclusive design

This book publishes the peer-reviewed proceeding of the third Design Modeling Symposium Berlin . The conference constitutes a platform for dialogue on experimental practice and research within the field of computationally informed architectural design. More than 60 leading experts the computational processes within the field of computationally informed architectural design to develop a broader and less exotic building practice that bears more subtle but powerful traces of the complex tool set and approaches we have developed and studied over recent years. The outcome are new strategies for a reasonable and innovative implementation of digital potential in truly innovative and radical design guided by both responsibility towards processes and the consequences they initiate.

This book helps readers evaluate and specificy the best Warehouse Management System (WMS) for their need. The advice is based on practical knowledge, describing in detail fundamental processes and technologies needed for a basic understanding. New approaches in the structure and design of WMS are presented, along with discussion of the limitations of current systems. The book shows how to operate a simple WMS based on the open-source initiative myWMS.

Offers users the first resource guide that combines both the methodology and basics of SystemVerilog Addresses how all these pieces fit together and how they should be used to verify complex chips rapidly and thoroughly. Unique in its broad coverage of SystemVerilog, advanced functional verification, and the combination of the two.

It is widely acknowledged that the cost of validation and testing comprises a s- nificant percentage of the overall development costs for electronic systems today, and is expected to escalate sharply in the future. Many studies have shown that up to 70% of the design development time and resources are spent on functional verification. Functional errors manifest themselves very early in the design flow, and unless they are detected up front, they can result in severe consequence- both financially and from a safety viewpoint. Indeed, several recent instances of high-profile functional errors (e. g. , the Pentium FDIV bug) have resulted in - creased attention paid to verifying the functional correctness of designs. Recent efforts have proposed augmenting the traditional RTL simulation-based validation methodology with formal techniques in an attempt to uncover hard-to-find c- ner cases, with the goal of trying to reach RTL functional verification closure. However, what is often not highlighted is the fact that in spite of the tremendous time and effort put into such efforts at the RTL and lower levels of abstraction, the complexity of contemporary embedded systems makes it difficult to guarantee functional correctness at the system level under all possible operational scenarios. The problem is exacerbated in current System-on-Chip (SOC) design meth- ologies that employ Intellectual Property (IP) blocks composed of processor cores, coprocessors, and memory subsystems. Functional verification becomes one of the major bottlenecks in the design of such systems.

The Core Test Wrapper Handbook: Rationale and Application of IEEE Std. 1500tm provides insight into the rules and recommendations of IEEE Std. 1500. This book focuses on practical design considerations inherent to the application of IEEE Std. 1500 by discussing design choices and other decisions relevant to this IEEE standard. The authors provide background information about some of the choices and decisions made throughout the design of IEEE Std. 1500.

This book is about formal veri?cation, that is, the use of mathematical reasoning to ensure correct execution of computing systems. With the increasing use of c- puting systems in safety-critical and security-critical applications, it is becoming increasingly important for our well-being to ensure that those systems execute c- rectly. Over the last decade, formal veri?cation has made signi?cant headway in the analysis of industrial systems, particularly in the realm of veri?cation of hardware. A key advantage of formal veri?cation is that it provides a mathematical guarantee of their correctness (up to the accuracy of formal models and correctness of r- soning tools). In the process, the analysis can expose subtle design errors. Formal veri?cation is particularly effective in ?nding corner-case bugs that are dif?cult to detect through traditional simulation and testing. Nevertheless, and in spite of its promise, the application of formal veri?cation has so far been limited in an ind- trial design validation tool ?ow. The dif?culties in its large-scale adoption include the following (1) deductive veri?cation using theorem provers often involves - cessive and prohibitive manual effort and (2) automated decision procedures (e. g. , model checking) can quickly hit the bounds of available time and memory. This book presents recent advances in formal veri?cation techniques and d- cusses the applicability of the techniques in ensuring the reliability of large-scale systems. We deal with the veri?cation of a range of computing systems, from - quential programsto concurrentprotocolsand pipelined machines.

I am very pleased to play even a small part in the publication of this book on the SIGNAL language and its environment POLYCHRONY. I am sure it will be a s- ni?cant milestone in the development of the SIGNAL language, of synchronous computing in general, and of the data?ow approach to computation. In data?ow, the computation takes place in a producer-consumer network of - dependent processing stations. Data travels in streams and is transformed as these streams pass through the processing stations (often called ?lters). Data?ow is an attractive model for many reasons, not least because it corresponds to the way p- duction,transportation,andcommunicationare typicallyorganizedin the real world (outside cyberspace). I myself stumbled into data?ow almost against my will. In the mid-1970s, Ed Ashcroft and I set out to design a "super" structured programming language that, we hoped, would radically simplify proving assertions about programs. In the end, we decided that it had to be declarative. However, we also were determined that iterative algorithms could be expressed directly, without circumlocutions such as the use of a tail-recursive function. The language that resulted, which we named LUCID, was much less traditional then we would have liked. LUCID statements are equations in a kind of executable temporallogic thatspecifythe (time)sequencesof variablesinvolvedin aniteration.

This book gathers the latest experience of experts, research teams and leading organizations involved in computer-aided design of user interfaces of interactive applications. This area investigates how it is desirable and possible to support, to facilitate and to speed up the development life cycle of any interactive system. In particular, it stresses how the design activity could be better understood for different types of advanced interactive systems.

This book describes the state-of-the-art in RF, analog, and mixed-signal circuit design for Software Defined Radio (SDR). It synthesizes for analog/RF circuit designers the most important general design approaches to take advantage of the most recent CMOS technology, which can integrate millions of transistors, as well as several real examples from the most recent research results.

In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities. This book offers a single-source reference to some of the most important design techniques proposed in the context of low-power design for networks-on-chip architectures.

As the complexity of modern embedded systems increases, it becomes less practical to design monolithic processing platforms. As a result, reconfigurable computing is being adopted widely for more flexible design. Reconfigurable Computers offer the spatial parallelism and fine-grained customizability of application-specific circuits with the postfabrication programmability of software. To make the most of this unique combination of performance and flexibility, designers need to be aware of both hardware and software issues. FPGA users must think not only about the gates needed to perform a computation but also about the software flow that supports the design process. The goal of this book is to help designers become comfortable with these issues, and thus be able to exploit the vast opportunities possible with reconfigurable logic.

Embedded processors are the heart of embedded systems. Reconfigurable embedded processors comprise an extended instruction set that is implemented using a reconfigurable fabric (similar to a field-programmable gate array, FPGA). This book presents novel concepts, strategies, and implementations to increase the run-time adaptivity of reconfigurable embedded processors. Concepts and techniques are presented in an accessible, yet rigorous context. A complex, realistic H.264 video encoder application with a high demand for adaptivity is presented and used as an example for motivation throughout the book. A novel, run-time system is demonstrated to exploit the potential for adaptivity and particular approaches/algorithms are presented to implement it.

Design and optimization of integrated circuits are essential to the creation of new semiconductor chips, and physical optimizations are becoming more prominent as a result of semiconductor scaling. Modern chip design has become so complex that it is largely performed by specialized software, which is frequently updated to address advances in semiconductor technologies and increased problem complexities. A user of such software needs a high-level understanding of the underlying mathematical models and algorithms. On the other hand, a developer of such software must have a keen understanding of computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. "VLSI Physical Design: From Graph Partitioning to Timing Closure" introduces and compares algorithms that are used during the physical design phase of integrated-circuit design, wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure.

Kinetic energy harvesting converts movement or vibrations into electrical energy, enables battery free operation of wireless sensors and autonomous devices and facilitates their placement in locations where replacing a battery is not feasible or attractive. This book provides an introduction to operating principles and design methods of modern kinetic energy harvesting systems and explains the implications of harvested power on autonomous electronic systems design. It describes power conditioning circuits that maximize available energy and electronic systems design strategies that minimize power consumption and enable operation. The principles discussed in the book will be supported by real case studies such as battery-less monitoring sensors at water waste processing plants, embedded battery-less sensors in automotive electronics and sensor-networks built with ultra-low power wireless nodes suitable for battery-less applications.

This book covers the practical application of dependable electronic systems in real industry, such as space, train control and automotive control systems, and network servers/routers. The impact from intermittent errors caused by environmental radiation (neutrons and alpha particles) and EMI (Electro-Magnetic Interference) are introduced together with their most advanced countermeasures. Power Integration is included as one of the most important bases of dependability in electronic systems. Fundamental technical background is provided, along with practical design examples. Readers will obtain an overall picture of dependability from failure causes to countermeasures for their relevant systems or products, and therefore, will be able to select the best choice for maximum dependability.

Dead-Reckoning aided with Doppler velocity measurement has been the most common method for underwater navigation for small vehicles. Unfortunately DR requires frequent position recalibrations and underwater vehicle navigation systems are limited to periodic position update when they surface. Finally standard Global Positioning System (GPS) receivers are unable to provide the rate or precision required when used on a small vessel. To overcome this, a low cost high rate motion measurement system for an Unmanned Surface Vehicle (USV) with underwater and oceanographic purposes is proposed. The proposed onboard system for the USV consists of an Inertial Measurement Unit (IMU) with accelerometers and rate gyros, a GPS receiver, a flux-gate compass, a roll and tilt sensor and an ADCP. Interfacing all the sensors proved rather challenging because of their different characteristics. The proposed data fusion technique integrates the sensors and develops an embeddable software package, using real time data fusion methods, for a USV to aid in navigation and control as well as controlling an onboard Acoustic Doppler Current Profiler (ADCP). While ADCPs non-intrusively measure water flow, the vessel motion needs to be removed to analyze the data and the system developed provides the motion measurements and processing to accomplish this task.

High definition video requires substantial compression in order to be transmitted or stored economically. Advances in video coding standards from MPEG-1, MPEG-2, MPEG-4 to H.264/AVC have provided ever increasing coding efficiency, at the expense of great computational complexity which can only be delivered through massively parallel processing. This book will present VLSI architectural design and chip implementation for high definition H.264/AVC video encoding, using a state-of-the-art video application, with complete VLSI prototype, via FPGA/ASIC. It will serve as an invaluable reference for anyone interested in VLSI design and high-level (EDA) synthesis for video.

Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technology. This is a signi?cant problem for electronic design automation (EDA) applications, since the design complexity of VLSI integrated circuits (ICs) is continuously growing. In this research monograph, we evaluate custom ICs, ?eld-programmable gate arrays (FPGAs), and graphics processors as platforms for accelerating EDA algorithms, instead of the general-purpose sing- threaded CPU. We study applications which are used in key time-consuming steps of the VLSI design ?ow. Further, these applications also have different degrees of inherent parallelism in them. We study both control-dominated EDA applications and control plus data parallel EDA applications. We accelerate these applications on these different hardware platforms. We also present an automated approach for accelerating certain uniprocessor applications on a graphics processor. This monograph compares custom ICs, FPGAs, and graphics processing units (GPUs) as potential platforms to accelerate EDA algorithms. It also provides details of the programming model used for interfacing with the GPUs.