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Books > Computing & IT > Computer hardware & operating systems > General
The success of VHDL since it has been balloted in 1987 as an IEEE standard may look incomprehensible to the large population of hardware designers, who had never heared of Hardware Description Languages before (for at least 90% of them), as well as to the few hundreds of specialists who had been working on these languages for a long time (25 years for some of them). Until 1988, only a very small subset of designers, in a few large companies, were used to describe their designs using a proprietary HDL, or sometimes a HDL inherited from a University when some software environment happened to be developped around it, allowing usability by third parties. A number of benefits were definitely recognized to this practice, such as functional verification of a specification through simulation, first performance evaluation of a tentative design, and sometimes automatic microprogram generation or even automatic high level synthesis. As there was apparently no market for HDL's, the ECAD vendors did not care about them, start-up companies were seldom able to survive in this area, and large users of proprietary tools were spending more and more people and money just to maintain their internal system.
Computer Science Workbench is a monograph series which will provide you with an in-depth working knowledge of current developments in computer technology. Every volume in this series will deal with a topic of importance in computer science and elaborate on how you yourself can build systems related to the main theme. You will be able to develop a variety of systems, including computer software tools, computer graphics, computer animation, database management systems, and computer-aided design and manufacturing systems. Computer Science Workbench represents an important new contribution in the field of practical computer technology. T08iyasu L. Kunii PREFACE The primary aim of this book is to present a coherent and self-contained de scription of recent advances in three-dimensional object recognition from range images. Three-dimensional object recognition concerns recognition and localiza tion of objects of interest in a scene from input images. This problem is one of both theoretical and practical importance. On the theoretical side, it is an ideal vehicle for the study of the general area of computer vision since it deals with several important issues encountered in computer vision-for example, issues such as feature extraction, acquisition, representation and proper use of knowl edge, employment of efficient control strategies, coupling numerical and symbolic computations, and parallel implementation of algorithms. On the practical side, it has a wide range of applications in areas such as robot vision, autonomous navigation, automated inspection of industrial parts, and automated assembly."
Model Generation in Electronic Design covers a wide range of model applications and research. The book begins by describing a model generator to create component models. It goes on to discuss ASIC design and ASIC library generation. This section includes chapters on the requirements for developing and ASIC library, a case study in which VITAL is used to create such a library, and the analysis and description of the accuracy required in modeling interconnections in ASIC design. Other chapters describe the development of thermal models for electronic devices, the development of a set of model packages for VHDL floating point operations, a techniques for model validation and verification, and a tool for model encryption. Model Generation in Electronic Design is an essential update for users, vendors, model producers, technical managers, designers and researchers working in electronic design.
Meeting the growing demands for speed and quality in rendering computer graphics images requires new techniques. Practical parallel rendering provides one of the most practical solutions. This book addresses the basic issues of rendering within a parallel or distributed computing environment, and considers the strengths and weaknesses of multiprocessor machines and networked render farms for graphics rendering. Case studies of working applications demonstrate, in detail, practical ways of dealing with complex issues involved in parallel processing.
For the editors of this book, as well as for many other researchers in the area of fault-tolerant computing, Dr. William Caswell Carter is one of the key figures in the formation and development of this important field. We felt that the IFIP Working Group 10.4 at Baden, Austria, in June 1986, which coincided with an important step in Bill's career, was an appropriate occasion to honor Bill's contributions and achievements by organizing a one day "Symposium on the Evolution of Fault-Tolerant Computing" in the honor of William C. Carter. The Symposium, held on June 30, 1986, brought together a group of eminent scientists from all over the world to discuss the evolu tion, the state of the art, and the future perspectives of the field of fault-tolerant computing. Historic developments in academia and industry were presented by individuals who themselves have actively been involved in bringing them about. The Symposium proved to be a unique historic event and these Proceedings, which contain the final versions of the papers presented at Baden, are an authentic reference document."
Oracle Exadata Recipes takes an example-based, problem/solution approach in showing how to size, install, configure, manage, monitor, optimize, and migrate Oracle database workloads on and to the Oracle Exadata Database Machine. Whether you're an Oracle Database administrator, Unix/Linux administrator, storage administrator, network administrator, or Oracle developer, Oracle Exadata Recipes provides effective and proven solutions to accomplish a wide variety of tasks on the Exadata Database Machine. You can feel confident using the reliable solutions that are demonstrated in this book in your enterprise Exadata environment. Managing Oracle Exadata is unlike managing a traditional Oracle database. Oracle's Exadata Database Machine is a pre-configured engineered system comprised of hardware and software, built to deliver extreme performance for Oracle Database workloads. Exadata delivers extreme performance by offering an optimally balanced hardware infrastructure with fast components at each layer of the engineered technology stack, as well as a unique set of Oracle software features designed to leverage the high-performing hardware infrastructure by reducing I/O demands.Let Oracle Exadata Recipes help you translate your existing Oracle Database knowledge into the exciting new growth area that is Oracle Exadata. * Helps extend your Oracle Database skillset to the fast-growing, Exadata platform * Presents information on managing Exadata in a helpful, example-based format * Clearly explains unique Exadata software and hardware features What you'll learn * Install and configure Exadata * Manage your Exadata hardware infrastructure * Monitor and troubleshoot performance issues * Manage smart scan and cell offload processing * Take advantage of Hybrid Columnar Compression * Deploy Smart Flash Cache and Smart Flash Logging * Ensure the health of your Exadata environment Who this book is for Oracle Exadata Recipes is for Oracle Database administrators, Unix/Linux administrators, storage administrators, backup administrators, network administrators, and Oracle developers who want to quickly learn to develop effective and proven solutions without reading through a lengthy manual scrubbing for techniques. Readers in a hurry will appreciate the recipe format that sets up solutions to common tasks as the centerpiece of the book.Table of Contents * Exadata Hardware * Exadata Software * How Oracle Works on Exadata * Workload Qualification * Sizing Exadata * Preparing for Exadata * Administration and Diagnostics Utilities * Backup and Recovery * Storage Administration * Network Administration * Patching and Upgrades * Security * Monitoring Exadata Storage Cells * Host and Database Performance Monitoring * Smart Scan and Cell Offload * Hybrid Columnar Compression * I/O Resource Management and Instance Caging * Smart Flash Cache and Smart Flash Logging * Storage Indexes * Post-Installation Monitoring Tasks * Post-Install Database Tasks
to Robotics In collaboration with Milan Djurovic, Dragan Hristic, Branko Karan, Manja Kireanski, N enad Kireanski, Dragan Stokic, Dragoljub Vujic, Vesna Zivkovic With 228 Figures Springer-Verlag Berlin Heidelberg New York London Paris Tokyo 1989 .. Miomir Vukobratovic, Ph. D., D. Sc. Milan Djurovic B. Sc. Dragan Hristic Ph.D. Branko Karan B. Sc. Manja Kircanski Ph.D. Nenad Kireanski Ph.D. Dragan Stokic Ph.D. Dragoljub Vujic Ph.D. Vesna Zivkovic Ph.D. Institute Mibajlo Pupin YU-llOOO Beograd Based on the original Uvod u Robotiku published by Institute Mibajlo Pupin, Beograd, Yugoslavia, 1986. ISBN -13: 978-3-642-82999-4 e-ISBN -13: 978-3-642-82997-0 DOl: 10.1007/978-3-642-82997-0 Library of Congress Cataloging-in-Publication Data Vukobratovic, Miomir. Introduction to robotics. Translation of: Uvod u robotiku. Includes index. 1. Robotics. 1. Title. TJ211.V86131988 629.8'92 88-10307 ISBN-i3:978-3-642-82999-4 (U.S.) This work is subject to copyright. All rights are reserved, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, re-use of illustration, recitation, broadcasting, reproduction on microfilms or in other ways. and storage in data banks. Duplication of this publication or parts thereof is only permitted under the provisions of the German Copyright Law of September 9,1965, in its version of June 24, 1985, and a copyright fee must always be paid. Violations fall under the prosecution act of the German Copyright Law.
DSP System Design presents the investigation of special type of IIR polyphase filter structures combined with frequency transformation techniques used for fast, multi-rate filtering, and their application for custom fixed-point implementation. Detailed theoretical analysis of the polyphase IIR structure has been presented for two and three coefficients in the two-path arrangement. This was then generalized for arbitrary filter order and any number of paths. The use of polyphase IIR structures in decimation and interpolation is being presented and performance assessed in terms of the number of calculations required for the given filter specification and the simplicity of implementation. Specimen decimation filter designs to be used in Sigma-Delta lowpass and bandpass A/D converters are presented which prove to outperform other traditional approaches. New frequency transformation types have been suggested for both real and complex situations. A new exact multi-point frequency transformation approach for arbitrary frequency choice has been suggested and evaluated. Applying such transformations to the existing filter allows to change their frequency response in an intuitive manner without the need of re-designing them, thus simplifying the designer's job when the specification changes during the prototyping and testing. A new bit-flipping' algorithm has been developed to aid in filter design where the coefficient word length is constraint. Also, the standard Downhill Simplex Method (floating-point) was modified to operate with the constrained coefficient word length. Performance of both these advances is being evaluated on a number of filter cases. Novel decimation and interpolation structures have been proposed, which can be implemented very efficiently. These allow an arbitrary order IIR anti-aliasing filter to operate at the lower rate of the decimator/interpolator. Similar structures for polyphase IIR decimator/interpolator structures are being discussed too. A new approach to digital filter design and implementation has been suggested which speeds-up silicon implementation of designs developed in Matlab. The Simulink block description is converted automatically into a bit-to-bit equivalent VHDL description. This in turn can be compiled, simulated, synthesized and fabricated without the need to go through the design process twice, first algorithmic/structural design and then the implementation. The book is full of design and analysis techniques. It contains sufficient introductory material enabling non-expert readers to understand the material given in it. DSP System Design may be of interest to graduate students, researchers, and professionals circuit designers, who would require fast and low-complexity digital filters for both single and multi-rate applications, especially those with low-power specification.
This book is a result of the lectures and discussions during the conference "Theory and Practice of Geometric Modeling." The event has been organized by the Wilhelm-Schickard-Institut fiir Informatik, Universitat Tiibingen and took place at the Heinrich-Fabri-Institut in Blaubeuren from October 3 to 7, 1988. The conference brought together leading experts from academic and industrial research institutions, CAD system developers and experien ced users to exchange their ideas and to discuss new concepts and future directions in geometric modeling. The main intention has been to bridge the gap between theoretical results, performance of existing CAD systems and the real problems of users. The contents is structured in five parts: A Algorithmic Aspects B Surface Intersection, Blending, Ray Tracing C Geometric Tools D Different Representation Schemes in Solid Modeling E Product Modeling in High Level Specifications The material presented in this book reflects the current state of the art in geometric modeling and should therefore be of interest not only to university and industry researchers, but also to system developers and practitioners who wish to keep up to date on recent advances and new concepts in this rapidly expanding field. The editors express their sincere appreciation to the contributing authors, and to the members of the program committee, W. Boehm, J. Hoschek, A. Massabo, H. Nowacki, M. Pratt, J. Rossignac, T. Sederberg and W. Tiller, for their close cooperation and their time and effort that made the conference and this book a success."
Address Errors before Users Find ThemUsing a mix-and-match approach, Software Test Attacks to Break Mobile and Embedded Devices presents an attack basis for testing mobile and embedded systems. Designed for testers working in the ever-expanding world of "smart" devices driven by software, the book focuses on attack-based testing that can be used by individuals and teams. The numerous test attacks show you when a software product does not work (i.e., has bugs) and provide you with information about the software product under test. The book guides you step by step starting with the basics. It explains patterns and techniques ranging from simple mind mapping to sophisticated test labs. For traditional testers moving into the mobile and embedded area, the book bridges the gap between IT and mobile/embedded system testing. It illustrates how to apply both traditional and new approaches. For those working with mobile/embedded systems without an extensive background in testing, the book brings together testing ideas, techniques, and solutions that are immediately applicable to testing smart and mobile devices.
Embedded and Networking Systems: Design, Software, and Implementation explores issues related to the design and synthesis of high-performance embedded computer systems and networks. The emphasis is on the fundamental concepts and analytical techniques that are applicable to a range of embedded and networking applications, rather than on specific embedded architectures, software development, or system-level integration. This system point of view guides designers in dealing with the trade-offs to optimize performance, power, cost, and other system-level non-functional requirements. The book brings together contributions by researchers and experts from around the world, offering a global view of the latest research and development in embedded and networking systems. Chapters highlight the evolution and trends in the field and supply a fundamental and analytical understanding of some underlying technologies. Topics include the co-design of embedded systems, code optimization for a variety of applications, power and performance trade-offs, benchmarks for evaluating embedded systems and their components, and mobile sensor network systems. The book also looks at novel applications such as mobile sensor systems and video networks. A comprehensive review of groundbreaking technology and applications, this book is a timely resource for system designers, researchers, and students interested in the possibilities of embedded and networking systems. It gives readers a better understanding of an emerging technology evolution that is helping drive telecommunications into the next decade.
Hardware-intrinsic security is a young field dealing with secure secret key storage. By generating the secret keys from the intrinsic properties of the silicon, e.g., from intrinsic Physical Unclonable Functions (PUFs), no permanent secret key storage is required anymore, and the key is only present in the device for a minimal amount of time. The field is extending to hardware-based security primitives and protocols such as block ciphers and stream ciphers entangled with the hardware, thus improving IC security. While at the application level there is a growing interest in hardware security for RFID systems and the necessary accompanying system architectures. This book brings together contributions from researchers and practitioners in academia and industry, an interdisciplinary group with backgrounds in physics, mathematics, cryptography, coding theory and processor theory. It will serve as important background material for students and practitioners, and will stimulate much further research and development.
We have written this book principally for users and practitioners of computer graphics. In particular, system designers, independent software vendors, graphics system implementers, and application program developers need to understand the basic standards being put in place at the so-called Virtual Device Interface and how they relate to other industry standards, both formal and de facto. Secondarily, the book has been targetted at technical managers and advanced students who need some understanding of the graphics standards and how they fit together, along with a good overview of the Computer Graphics Interface (CGI) proposal and Computer Graphics Metafile (CGM) standard in particular. Part I, Chapters 1,2, and 3; Part II, Chapters 10 and 11; Part III, Chapters 15, 16, and 17; and some of the Appendices will be of special interest. Finally, these same sections will interest users in government and industry who are responsible for selecting, buying and installing commercial implementations of the standards. The CGM is already a US Federal Information Processing Standard (FIPS 126), and we expect the same status for the CGI when its development is completed and it receives formal approval by the standards-making bodies.
Optoelectronic devices and fibre optics are the basis of cutting-edge communication systems. This monograph deals with the various components of these systems, including lasers, amplifiers, modulators, converters, filters, sensors, and more.
mental improvements during the same period. What is clearly needed in verification techniques and technology is the equivalent of a synthesis productivity breakthrough. In the second edition of Writing Testbenches, Bergeron raises the verification level of abstraction by introducing coverage-driven constrained-random transaction-level self-checking testbenches all made possible through the introduction of hardware verification languages (HVLs), such as e from Verisity and OpenVera from Synopsys. The state-of-art methodologies described in Writing Test benches will contribute greatly to the much-needed equivalent of a synthesis breakthrough in verification productivity. I not only highly recommend this book, but also I think it should be required reading by anyone involved in design and verification of today's ASIC, SoCs and systems. Harry Foster Chief Architect Verplex Systems, Inc. xviii Writing Testbenches: Functional Verification of HDL Models PREFACE If you survey hardware design groups, you will learn that between 60% and 80% of their effort is now dedicated to verification.
VHDL is a comprehensive language that allows a user to deal with design complexity. Design, and the data representing a design, are complex by the very nature of a modern digital system constructed from VLSI chips. VHDL is the first language to allow one to capture all the nuances of that complexity, and to effectively manage the data and the design process. As this book shows, VHDL is not by its nature a complex language. In 1980, the U. S. Government launched a very aggressive effort to advance the state-of-the-art in silicon technology. The objective was to significantly enhance operating performance and circuit density for Very Large Scale Integration (VLSI) silicon chips. The U. S. Government realized that in order for contractors to be able to work together to develop VLSI products, to document the resulting designs, to be able to reuse the designs in future products, and to efficiently upgrade existing designs, they needed a common communication medium for the design data. They wanted the design descriptions to be computer readable and executable. They also recognized that with the high densities envisioned for the U. S. Government's Very High Speed Integrated Circuit (VHSIC) chips and the large systems required in future procurements, a means of streamlining the design process and managing the large volumes of design data was required. Thus was born the concept of a standard hardware design and description language to solve all of these problems.
Principles of Verilog PLI is a 'how to do' text on Verilog Programming Language Interface. The primary focus of the book is on how to use PLI for problem solving. Both PLI 1.0 and PLI 2.0 are covered. Particular emphasis has been put on adopting a generic step-by-step approach to create a fully functional PLI code. Numerous examples were carefully selected so that a variety of problems can be solved through ther use. A separate chapter on Bus Functional Model (BFM), one of the most widely used commercial applications of PLI, is included. Principles of Verilog PLI is written for the professional engineer who uses Verilog for ASIC design and verification. Principles of Verilog PLI will be also of interest to students who are learning Verilog.
too vast, too complex, too grand ... for description. John Wesley Powell-1870 (discovering the Grand Canyon) VHDL is a big world. A beginner can be easily disappointed by the generality of this language. This generality is explained by the large number of domains covered - from specifications to logical simulation or synthesis. To the very beginner, VHDL appears as a "kit". He is quickly aware that his problem may be solved with VHDL, but does not know how. He does not even know how to start. In this state of mind, all the constraints that can be set to his modeling job, by using a subset of the language or a given design methodology, may be seen as a life preserver. The success of the introduction of VHDL in a company depends on solutions to many questions that should be answered months before the first line of code is written: * Why choose VHDL? * Which VHDL tools should be chosen? * Which modeling methodology should be adopted? * How should the VHDL environment be customized? * What are the tricks? Where are the traps? * What are the differences between VHDL and other competing HDLs? Answers to these questions are organized according to different concerns: buying the tools, organizing the environment, and designing. Decisions taken in each of these areas may have many consequences on the way to the acceptance and efficiently use of VHDL in a company.
This book contains a selection of tutorials on hot topics in information technology, which were presented at the IFIP World Computer Congress. WCC2004 took place at the Centre de Congres Pierre Baudis, in Toulouse, France, from 22 to 27 August 2004. The 11 chapters included in the book were chosen from tutorials proposals submitted to WCC2004. These papers report on several important and state-of-the-art topics on information technology such as: Quality of Service in Information Networks Risk-Driven Development of Security-Critical Systems Using UMLsec Developing Portable Software Formal Reasoning About Systems, Software and Hardware Using Functionals, Predicates and Relations The Problematic of Distributed Systems Supervision Software Rejuvenation - Modeling and Analysis Test and Design-for-Test of Mixed-Signal Integrated Circuits Web Services Applications of Multi-Agent Systems Discrete Event Simulation Human-Centered Automation We hereby would like to thank IFIP and more specifically WCC2004 Tutorials Committee and the authors for their contribution. We also would like to thank the congress organizers who have done a great job. Ricardo Reis Editor QUALITY OF SERVICE IN INFORMATION NETWORKS Augusto Casaca IST/INESC, R. Alves Redol, 1000-029, Lisboa, Portugal. Abstract: This article introduces the problems concerned with the provision of end-- end quality of service in IP networks, which are the basis of information networks, describes the existing solutions for that provision and presents some of the current research items on the subject. Key words: Information networks, IP networks, Integrated Services, Differentiated Services, Multiprotocol Label Switching, UMTS."
This book constitutes the refereed proceedings of the 24th International Conference on Computer Aided Verification, CAV 2012, held in Berkeley, CA, USA in July 2012. The 38 regular and 20 tool papers presented were carefully reviewed and selected from 185 submissions. The papers are organized in topical sections on automata and synthesis, inductive inference and termination, abstraction, concurrency and software verification, biology and probabilistic systems, embedded and control systems, SAT/SMT solving and SMT-based verification, timed and hybrid systems, hardware verification, security, verification and synthesis, and tool demonstration.
This book is intended to be a working reference for electronic hardware de signers who are interested in writing VHDL models. A handbook/cookbook approach is taken, with many complete examples used to illustrate the fea tures of the VHDL language and to provide insight into how particular classes of hardware devices can be modelled in VHDL. It is possible to use these models directly or to adapt them to similar problems with minimal effort. This book is not intended to be a complete reference manual for the VHDL language. It is possible to begin writing VHDL models with little background in VHDL by copying examples from the book and adapting them to particular problems. Some exposure to the VHDL language prior to using this book is recommended. The reader is assumed to have a solid hardware design background, preferably with some simulation experience. For the reader who is interested in getting a complete overview of the VHDL language, the following publications are recommended reading: * An Introduction to VHDL: Hardware Description and Design [LIP89] * IEEE Standard VHDL Language Reference Manual [IEEE87] * Chip-Level Behavioral Modelling [ARMS88] * Multi-Level Simulation of VLSI Systems [COEL87] Other references of interest are [USG88], [DOD88] and [CLSI87] Use of the Book If the reader is familiar with VHDL, the models described in chapters 3 through 7 can be applied directly to design problems.
The application of fuzzy technology is widely known as a technological revolution. Shortly after it appeared, its value has rapidly become appreciated. It is absolutely indispensable for introducing the latest developments not only domestically but also internationally. This book is arranged to introduce easy to understand explanations mainly centered on concrete applications. It consists of twelve chapters in total which are all independently readable and provide different approaches on various projects. The minimum of Fuzzy Theory that is needed to understand its practical applications is given in Chapter 1. Chapters 2 to 5 discuss hardware, including chips, and software tools used in constructing system. Chapters 6 to 12 cover a series of practical applications. These in clude applications for industrial processes and plants, transportation systems, which were among the first applications, and applications for consumer products such as household electrical appliances. These elements together finally produced the worldwide "Fuzzy Boom." This book can be read by a wide variety of people, from undergraduate and graduate students in universities to practical engineers and project managers working in plants. The information contained in this book is a first step to this field of interest.
System-on-Chip Methodologies & Design Languages brings together a selection of the best papers from three international electronic design language conferences in 2000. The conferences are the Hardware Description Language Conference and Exhibition (HDLCon), held in the Silicon Valley area of USA; the Forum on Design Languages (FDL), held in Europe; and the Asia Pacific Chip Design Language (APChDL) Conference. The papers cover a range of topics, including design methods, specification and modeling languages, tool issues, formal verification, simulation and synthesis. The results presented in these papers will help researchers and practicing engineers keep abreast of developments in this rapidly evolving field.
Today more than 90% of all programmable processors are employed in embedded systems. This number is actually not surprising, contemplating that in a typical home you might find one or two PCs equipped with high-performance standard processors, and probably dozens of embedded systems, including electronic entertainment, household, and telecom devices, each of them equipped with one or more embedded processors. The question arises why programmable processors are so popular in embedded system design. The answer lies in the fact that they help to narrow the gap between chip capacity and designer productivity. Embedded processors cores are nothing but one step further towards improved design reuse, just along the lines of standard cells in logic synthesis and macrocells in RTL synthesis in earlier times of IC design. Additionally, programmable processors permit to migrate functionality from hardware to software, resulting in an even improved reuse factor as well as greatly increased flexibility. The LISA processor design platform (LPDP) presented in Architecture Exploration for Embedded Processors with LISA addresses recent design challenges and results in highly satisfactory solutions. The LPDP covers all major high-level phases of embedded processor design and is capable of automatically generating almost all required software development tools from processor models in the LISA language. It supports a profiling-based, stepwise refinement of processor models down to cycle-accurate and even RTL synthesis models. Moreover, it elegantly avoids model inconsistencies otherwise omnipresent in traditional design flows. The next step in design reuse is already in sight: SoC platforms, i.e., partially pre-designed multi-processor templates that can be quickly tuned towards given applications thereby guaranteeing a high degree of hardware/software reuse in system-level design. Consequently, the LPDP approach goes even beyond processor architecture design. The LPDP solution explicitly addresses SoC integration issues by offering comfortable APIs for external simulation environments as well as clever solutions for the problem of both efficient and user-friendly heterogeneous multiprocessor debugging.
Contributions on UML address the application of UML in the
specification of embedded HW/SW systems. C-Based System Design
embraces the modeling of operating systems, modeling with different
models of computation, generation of test patterns, and experiences
from case studies with SystemC. Analog and Mixed-Signal Systems
covers rules for solving general modeling problems in VHDL-AMS,
modeling of multi-nature systems, synthesis, and modeling of
Mixed-Signal Systems with SystemC. Languages for formal methods are
addressed by contributions on formal specification and refinement
of hybrid, embedded and real-time stems. |
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