This book presents Dual Mode Logic (DML), a new design paradigm for digital integrated circuits. DML logic gates can operate in two modes, each optimized for a different metric. Its on-the-fly switching between these operational modes at the gate, block and system levels provide maximal E-D optimization flexibility. Each highly detailed chapter has multiple illustrations showing how the DML paradigm seamlessly implements digital circuits that dissipate less energy while simultaneously improving performance and reducing area without a significant compromise in reliability. All the facets of the DML methodology are covered, starting from basic concepts, through single gate optimization, general module optimization, design trade-offs and new ways DML can be integrated into standard design flows using standard EDA tools. DML logic is compatible with numerous applications but is particularly advantageous for ultra-low power, reliable high performance systems, and advanced scaled technologies Written in language accessible to students and design engineers, each topic is oriented toward immediate application by all those interested in an alternative to CMOS logic. Describes a novel, promising alternative to conventional CMOS logic, known as Dual Mode Logic (DML), with which a single gate can be operated selectively in two modes, each optimized for a different metric (e.g., energy consumption, performance, size); Demonstrates several techniques at the architectural level, which can result in high energy savings and improved system performance; Focuses on the tradeoffs between power, area and speed including optimizations at the transistor and gate level, including alternatives to DML basic cells; Illustrates DML efficiency for a variety of VLSI applications.

This book covers selected topics of automated logic synthesis dedicated to FPGAs. The authors focused on two main problems: decomposition of the multioutput functions and technology mapping. Additionally, the idea of using binary decision diagrams (BDD) in these processes was presented. The book is a scientific monograph summarizing the authors' many years of research. As a result, it contains a large number of experimental results, which makes it a valuable source for other researchers. The book has a significant didactic value. Its arrangement allows for a gradual transition from basic things (e.g., description of logic functions) to much more complex issues. This approach allows less advanced readers to better understand the described problems. In addition, the authors made sure that the issues described in the book were supported by practical examples, thanks to which the reader can independently analyze even the most complex problems described in the book.

by Kurt Keutzer Those looking for a quick overview of the book should fast-forward to the Introduction in Chapter 1. What follows is a personal account of the creation of this book. The challenge from Earl Killian, formerly an architect of the MIPS processors and at that time Chief Architect at Tensilica, was to explain the significant performance gap between ASICs and custom circuits designed in the same process generation. The relevance of the challenge was amplified shortly thereafter by Andy Bechtolsheim, founder of Sun Microsystems and ubiquitous investor in the EDA industry. At a dinner talk at the 1999 International Symposium on Physical Design, Andy stated that the greatest near-term opportunity in CAD was to develop tools to bring the performance of ASIC circuits closer to that of custom designs. There seemed to be some synchronicity that two individuals so different in concern and character would be pre-occupied with the same problem. Intrigued by Earl and Andy's comments, the game was afoot. Earl Killian and other veterans of microprocessor design were helpful with clues as to the sources of the performance discrepancy: layout, circuit design, clocking methodology, and dynamic logic. I soon realized that I needed help in tracking down clues. Only at a wonderful institution like the University of California at Berkeley could I so easily commandeer an ab- bodied graduate student like David Chinnery with a knowledge of architecture, circuits, computer-aided design and algorithms.

This book investigates in detail the antenna optimization method with binary coding and their applications to antenna design. It introduces the binary coding principle and optimization method, the method of binary coding corresponding to geometry structure. In further, the designs by binary coding optimization method of following items are introduced, including multi-frequency antenna based on binary coding, low profile RFID tag antenna on metal, wideband directional antenna with low profile, mmWave antenna and UWB antenna. Additionally, improved hexagon unit to antenna optimization by binary coding method is given, and a new method of antenna design based on optimization of linear motion trajectory is presented in the end.This book proposes an automatic optimization method of meshed antenna based on binary coding, reduce the artificial a priori influence and find the best antenna. The book is intended for undergraduate and graduate students who are interested in antenna technology, researchers investigating high performance antenna, and antenna design engineers working on new antenna and the applications.

Modeling with an Analog Hardware Description Language spells out, in general terms, what modeling with an analog hardware description language (AHDL) adds to the existing field of computer simulation, using specific examples to develop this understanding. The book is divided into three major sections: Fundamentals of Modeling provides an overview of general modeling and simulation concepts that are used in subsequent chapters. These introductory chapters cover topics such as macromodels, behavioral models, primitive device models, modeling hierarchy, top-down design, non-electrical technologies, and the Newton--Raphson iterative simulation technique. These topics are presented to help further the understanding of what is needed to develop models in an AHDL. Model Implementation begins to convey the implementation details of the MAST AHDL. The chapters in this section show how to use the governing equations of several commonly used models, along with equations that are readily available from well-known textbooks and papers. This information is provided in both tutorial and reference fashion, serving as an introduction to the basics of the MAST ADHL. Each chapter builds on the information from preceding chapters in order to demonstrate progressively more complex modeling concepts. This culminates with the diode and MOSFET models given in Chapter 9, which are intended to show the depth of the MAST language and which may be of interest to a more specialized segment of the modeling population. Advanced Applications contains several examples of designs that use models written in the MAST ADHL. Each example makes use of concepts brought up in the first two sections. The main purpose of these chapters is to illustrate the importance of using an AHDL to enhance the power of computer simulations.

Describes the operating principles of analog MOS integrated circuits and how to design and use such circuits. The initial section explores general properties of analog MOS integrated circuits and the math and physics background required. The remainder of the book is devoted to the design of circuits. Includes such devices as switched-capacitor filters, analog-to-digital and digital-to-analog converters, amplifiers, modulators, oscillators, and others. Tables and numerical design examples clarify the step-by-step processes involved.

Scalable Hardware Verification with Symbolic Simulation presents recent advancements in symbolic simulation-based solutions which radically improve scalability. It overviews current verification techniques, both based on logic simulation and formal verification methods, and unveils the inner workings of symbolic simulation. The core of this book focuses on new techniques that narrow the performance gap between the complexity of digital systems and the limited ability to verify them. In particular, it covers a range of solutions that exploit approximation and parametrization methods, including quasi-symbolic simulation, cycle-based symbolic simulation, and parameterizations based on disjoint-support decompositions.

In structuring this book, the authora (TM)s hope was to provide interesting reading for a broad range of design automation readers. The first two chapters provide an overview of digital systems design and, in particular, verification. Chapter 3 reviews mainstream symbolic techniques in formal verification, dedicating most of its focus to symbolic simulation. The fourth chapter covers the necessary principles of parametric forms and disjoint-support decompositions. Chapters 5 and 6 focus on recent symbolic simulation techniques, and the final chapter addresses key topics needing further research.

Scalable Hardware Verification with Symbolic Simulation is for verification engineers and researchers in the design automation field.

Highlights:

• A discussion of the leading hardware verification techniques, including simulation and formal verification solutions
• Important concepts related to the underlying models and algorithms employed in thefield
• The latest innovations in the area of symbolic simulation, exploiting techniques such as parametric forms and decomposition properties of Boolean functions
• Providing insights into possible new developments in the hardware verification

The dielectric properties of silicon dioxide (SiO2), such as high resistivity and excellent dielectric strength, have aided the evolution of microelectronics during the past 40 years. Silica films have been successfully used over this period for both gate and interconnect applications in ultra large-scale integration (ULSI) devices. Dielectric films for gate applications need to have a higher dielectric constant, while interconnect dielectric materials need to have a lower dielectric constant, compared with SiO2. In order to maintain the high drive current and gate capacitance required of scaled MOSFETs (metal-oxide-silicon field effect transistors), SiO2 gate dielectrics have decreased in thickness to less than 2 nm today, with a continued effort to shrink to the thickness below 1 nm. However, SiO2 layers thinner than 1.2 nm do not have the insulating properties required of a gate dielectric and ultrathin SiO2 gate dielectrics give rise to a number of problems, such as high gate leakage current and reliability degradation. Therefore, alternative gate dielectric materials are required.

SiO2, having been the universal dielectric material for both gate and interlayer dielectric (ILD) applications for many years, must be replaced by materials with a higher dielectric constant for the gate applications and a reduced dielectric constant for interconnect applications. Replacements for silicon dioxide, such as HfO2, ZrO2, and Al2O3, for introduction as high-k dielectrics (described in the central section of the book), have material properties that are quite different compared with those of traditional dense SiO2 and these differences create many technological challenges that are thesubject of intensive research. In addition, not only the development of new gate materials but also re-engineering of many technological processes is needed. For example, in the case of low-k materials (discussed in the first section of the book), active species formed during different technological processes diffuse into the pores and create severe damage. All these problems have been stimulating the development of new technological approaches, which will be dealt with in this book.

This book presents an in-depth overview of novel developments made by scientific leaders in the microelectronics community. It covers a broad range of related topics, from physical principles to design, fabrication, characterization, and application of novel dielectric films. This book is intended for postgraduate level students, PhD students and industrial researchers, to enable them to gain insight into this important area of research.

This book is a technical publication for students, scholars and engineers in electrical engineering, focusing on the pulse-width-modulation (PWM) technologies in power electronics area. Based on an introduction of basic PWM principles this book analyzes three major challenges for PWM on system performance: power losses, voltage/current ripple and electromagnetic interference (EMI) noise, and the lack of utilization of control freedoms in conventional PWM technologies. Then, the model of PWM's impact on system performance is introduced, with the current ripple prediction method for voltage source converter as example. With the prediction model, two major advanced PWM methods are introduced: variable switching frequency PWM and phase-shift PWM, which can reduce the power losses and EMI for the system based on the prediction model. Furthermore, the advanced PWM can be applied in advanced topologies including multilevel converters and paralleled converters. With more control variables in the advanced topologies, performance of PWM can be further improved. Also, for the special problem for common-mode noise, this book introduces modified PWM method for reduction. Especially, the paralleled inverters with advanced PWM can achieve good performance for the common-mode noise reduction. Finally, the implementation of PWM technologies in hardware is introduced in the last part.

This textbook provides an introduction to the study of digital signal processing, employing a top-to-bottom structure to motivate the reader, a graphical approach to the solution of the signal processing mathematics, and extensive use of MATLAB. In contrast to the conventional teaching approach, the book offers a top-down approach which first introduces students to digital filter design, provoking questions about the mathematical tools required. The following chapters provide answers to these questions, introducing signals in the discrete domain, Fourier analysis, filters in the time domain and the Z-transform. The author introduces the mathematics in a conceptual manner with figures to illustrate the physical meaning of the equations involved. Chapter six builds on these concepts and discusses advanced filter design, and chapter seven discusses matters of practical implementation. This book introduces the corresponding MATLAB functions and programs in every chapter with examples, and the final chapter introduces the actual real-time filter from MATLAB. Aimed primarily at undergraduate students in electrical and electronic engineering, this book enables the reader to implement a digital filter using MATLAB. Deliver the conceptual knowledge of digital signal processing with extensive use of the illustrations from practical viewpoint. Also, the digital signal processing is initiated from the digital not from the continuous domain.

Wireless networking enables two or more computers to communicate using standard network protocols without network cables. Since their emergence in the 1970s, wireless networks have become increasingly pop ular in the computing industry. In the past decade, wireless networks have enabled true mobility. There are currently two versions of mobile wireless networks. An infrastructure network contains a wired backbone with the last hop being wireless. The cellular phone system is an exam ple of an infrastructure network. A multihop ad hoc wireless network has no infrastructure and is thus entirely wireless. A wireless sensor network is an example of a multihop ad hoc wireless network. Ad hoc wireless networking is a technique to support robust and ef ficient operation in mobile wireless networks by incorporating routing functionality into mobile hosts. This technique will be used to realize the dream of "anywhere and anytime computing," which is termed mo bile computing. Mobile computing is a new paradigm of computing in which users carrying portable devices have access to shared infrastruc ture in any location at any time. Mobile computing is a very challenging topic for scientists in computer science and electrical engineering. The representative system for ad hoc wireless networking is called MANET, an acronym for "Mobile Ad hoc NETworks." MANET is an autonomous system consisting of mobile hosts connected by wireless links which can be quickly deployed."

This book discusses the advantages and challenges of Body-Biasing for integrated circuits and systems, together with the deployment of the design infrastructure needed to generate this Body-Bias voltage. These new design solutions enable state of the art energy efficiency and system flexibility for the latest applications, such as Internet of Things and 5G communications.

The new edition of this textbook is based on Dr. Thanh T. Tran's 10+ years' experience teaching high-speed digital and analog design courses at Rice University and 30+ years' experience working in high-speed system design, including signal and power integrity in digital signal processing (DSP), computer, and embedded system. The book provides hands-on, practical instruction on high-speed digital and analog design for students and working engineers. The author first presents good high-speed digital and analog design practices that minimize both component and system noise and ensure system design success. He then presents guidelines to be used throughout the design process to reduce noise and radiation and to avoid common pitfalls while improving quality and reliability. The book is filled with tips on design and system simulation that minimize late stage redesign costs and product shipment delays. Hands-on design examples focusing on audio, video, analog filters, DDR memory, and power supplies are featured throughout. In addition, the author provides a practical approach to design multi-gigahertz high-speed serial busses (USB-C, PCIe, HDMI, DP) and simulate printed circuit board insertion and return loss using s-parameter models.

1V CMOS Gm-C Filters: Design and Applications discusses the design aspects of transconductor and Gm-C filter circuits, with a special focus on 1V circuit implementations. The emphasis is on high linearity voltage-to-current blocks for wireless and wireline applications, and the designs cover up to very high speed specifications.

1V CMOS Gm-C Filters: Design and Applications provides a clear introduction of low voltage architectures and yields insight into the influence of circuit non-idealities. The fully CMOS implementation could be useful for wireless and wireline applications. The basic design concepts can be easily constructed through the illustration of this book. This book can be provided for engineers and researchers who are interested in the transconductor and Gm-C filter. It is also a good reference for the course related to analog integrated circuit design.

The book covers a variety of studies of organic semiconductors, from fundamental electronic states to device applications, including theoretical studies. Furthermore, innovative experimental techniques, e.g., ultrahigh sensitivity photoelectron spectroscopy, photoelectron yield spectroscopy, spin-resolved scanning tunneling microscopy (STM), and a material processing method with optical-vortex and polarization-vortex lasers, are introduced. As this book is intended to serve as a textbook for a graduate level course or as reference material for researchers in organic electronics and nanoscience from electronic states, fundamental science that is necessary to understand the research is described. It does not duplicate the books already written on organic electronics, but focuses mainly on electronic properties that arise from the nature of organic semiconductors (molecular solids). The new experimental methods introduced in this book are applicable to various materials (e.g., metals, inorganic and organic materials). Thus the book is also useful for experts working in physics, chemistry, and related engineering and industrial fields.

This book includes topics in nanophysics, nanotechnology, nanomaterials, sensors, biosensors, security systems, and CBRN agents detection. There have been many significant advances in the past two years and some entirely new directions of research are just opening up. Recent developments in nanotechnology and measurement techniques now allow experimental investigation of the physical properties of nanostructured materials. The book presents new methods for the detection of chemical, biological, radiological and nuclear (CBRN) agents using chemical and biochemical sensors. Identification, protection and decontamination are the main scientific and technological responses for the modern challenges of CBRN agents.

Design of Low-Voltage Bipolar Operational Amplifiers discusses the sub-circuits necessary to build a low-voltage operational amplifier. These include rail-to-rail input stages, rail-to-rail output stages, intermediate stages, protection circuitry and frequency compensation techniques. Of each of these, various implementations are examined. Furthermore, the book discusses realizations in silicon of the amplifiers. The design and implementation of low-voltage bipolar Operational Amplifiers (OpAmps) is fully presented. A low supply voltage is necessary because the tendency towards chip components of smaller dimensions lowers the breakdown voltage of these components. Further, a low supply voltage is favorable because it enables operation of the OpAmp from just one single battery cell. The bipolar technology is chosen, because it is more suited for operation at low-voltages than the MOS technology. The common-mode input voltage of the OpAmp must be able to have any value that fits within the supply voltage range. Input stages are discussed which are able to realize this at supply voltages down to 1.8 V, as well as down to 1 V. The output voltage of the OpAmp must be able to have any value within the supply voltage range. One of the 1 V output stages that is discussed, the multi-path driven output stage, also has a high bandwidth with a high gain. In addition to the input and output stage, the OpAmp comprises an intermediate stage, between the input stage and the output stage, to boost the overall gain of the OpAmp, and a class AB current control. A frequency compensation technique is used to split apart the pole frequencies in the transfer function. A disadvantage of this nested Miller compensation, is that the resulting bandwidth is reduced by a factor of two. A new method, multi-path-driven Miller compensation, which does not have this drawback, is therefore introduced. Several realizations are evaluated and a figure of merit is defined for the performance comparison of the OpAmps. One of the OpAmps operates at a 1 V supply, has a 3.4 MHz bandwidth with a 100 pF load and has a 700 &mgr;A supply current. The book is an excellent reference for professional designers of amplifiers and may be used as a text for advanced courses on the subject.

Modeling Microprocessor Performance focuses on the development of a design and evaluation tool, named RIPE (Rensselaer Interconnect Performance Estimator). This tool analyzes the impact on wireability, clock frequency, power dissipation, and the reliability of single chip CMOS microprocessors as a function of interconnect, device, circuit, design and architectural parameters. It can accurately predict the overall performance of existing microprocessor systems. For the three major microprocessor architectures, DEC, PowerPC and Intel, the results have shown agreement within 10% on key parameters. The models cover a broad range of issues that relate to the implementation and performance of single chip CMOS microprocessors. The book contains a detailed discussion of the various models and the underlying assumptions based on actual design practices. As such, RIPE and its models provide an insightful tool into single chip microprocessor design and its performance aspects. At the same time, it provides design and process engineers with the capability to model, evaluate, compare and optimize single chip microprocessor systems using advanced technology and design techniques at an early design stage without costly and time consuming implementation. RIPE and its models demonstrate the factors which must be considered when estimating tradeoffs in device and interconnect technology and architecture design on microprocessor performance.

This book focuses on control units, which are a vital part of modern digital systems, and responsible for the efficiency of controlled systems. The model of a finite state machine (FSM) is often used to represent the behavior of a control unit. As a rule, control units have irregular structures that make it impossible to design their logic circuits using the standard library cells. Design methods depend strongly on such factors as the FSM used, specific features of the logic elements implemented in the FSM logic circuit, and the characteristics of the control algorithm to be interpreted. This book discusses Moore and Mealy FSMs implemented with FPGA chips, including look-up table elements (LUT) and embedded memory blocks (EMB). It is crucial to minimize the number of LUTs and EMBs in an FSM logic circuit, as well as to make the interconnections between the logic elements more regular, and various methods of structural decompositions can be used to solve this problem. These methods are reduced to the presentation of an FSM circuit as a composition of different logic blocks, the majority of which implement systems of intermediate logic functions different (and much simpler) than input memory functions and FSM output functions. The structural decomposition results in multilevel FSM circuits having fewer logic elements than equivalent single-level circuits. The book describes well-known methods of structural decomposition and proposes new ones, examining their impact on the final amount of hardware in an FSM circuit. It is of interest to students and postgraduates in the area of Computer Science, as well as experts involved in designing digital systems with complex control units. The proposed models and design methods open new possibilities for creating logic circuits of control units with an optimal amount of hardware and regular interconnections.

This book includes original, peer-reviewed research papers from the 2022 10th China Conference on Command and Control (C2 2022), held in Beijing, China on July 7-9, 2022. The topics covered include but are not limited to: Theories, Modelling and Simulation, System Engineering Technology for Intelligent Command and Control, 5G and Intelligent Command, Control and Management Integration Technology, Joint Cooperative Command and Control Organization Management, Agility in the Network Age, Cyberspace Situational Awareness Technology, CPS Parallel Management and Control Unmanned Systems, Intelligent Military Camp Technology, Architecture Design for Intelligent Air Traffic Control System, Human-Machine Interaction and Virtual Reality, Swarm Intelligence and Cooperative Control, Intelligent Gaming Theory and Technology.The papers showcased here share the latest findings on theories, algorithms and applications in command and control, making the book a valuable asset for researchers, engineers, and university students alike.

This Open Access book celebrates Professor Peter Marwedel's outstanding achievements in compilers, embedded systems, and cyber-physical systems. The contributions in the book summarize the content of invited lectures given at the workshop "Embedded Systems" held at the Technical University Dortmund in early July 2019 in honor of Professor Marwedel's seventieth birthday. Provides a comprehensive view from leading researchers with respect to the past, present, and future of the design of embedded and cyber-physical systems; Discusses challenges and (potential) solutions from theoreticians and practitioners on modeling, design, analysis, and optimization for embedded and cyber-physical systems; Includes coverage of model verification, communication, software runtime systems, operating systems and real-time computing.

Quality Electronic Design (QED)'s landscape spans a vast region where territories of many participating disciplines and technologies overlap. This book explores the latest trends in several key topics related to quality electronic design, with emphasis on Hardware Security, Cybersecurity, Machine Learning, and application of Artificial Intelligence (AI). The book includes topics in nonvolatile memories (NVM), Internet of Things (IoT), FPGA, and Neural Networks.

This book offers an overview of power electronic applications in the study of power integrated circuit (IC) design, collecting novel research ideas and insights into fast transient response to prevent the output voltage from dropping significantly at the undershoot. It also discusses techniques and training to save energy and increase load efficiency, as well as fast transient response and high efficiency, which are the most important factors for consumer products that implement power IC. Lastly, the book focuses on power electronics for system loop analysis and optimal compensation design to help users and engineers implement their applications. The book is a valuable resource for university researchers, power IC R&D engineers, application engineers and graduate students in power electronics who wish to learn about the power IC design principles, methods, system behavior, and applications in consumer products.