Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. We consider both logic and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes.

This book provides a sound introduction to basic electronic concepts in a lively and practical format. It effectively meets the needs of both the electronics option of the advanced GNVQ in engineering and the BTEC National certificate in electronics and includes hands-on practical investigations and self-test questions which will appeal to a wide range of readers. Applied Electronics employs user-friendly text and a non-mathematical approach to develop the reader's ability and understanding of the principles of analogue and digital electronics. Beginning with the semiconductor devices themselves, it progresses through amplifiers and power supplies to combinational and sequential logic.

This book presents a detailed summary of research on automatic layout of device-level analog circuits that was undertaken in the late 1980s and early 1990s at Carnegie Mellon University. We focus on the work behind the creation of the tools called KOAN and ANAGRAM II, which form part of the core of the CMU ACACIA analog CAD system. KOAN is a device placer for custom analog cells; ANANGRAM II a detailed area router for these analog cells. We strive to present the motivations behind the architecture of these tools, including detailed discussion of the subtle technology and circuit concerns that must be addressed in any successful analog or mixed-signal layout tool. Our approach in organizing the chapters of the book has been to present our algo rithms as a series of responses to these very real and very difficult analog layout problems. Finally, we present numerous examples of results generated by our algorithms. This research was supported in part by the Semiconductor Research Corpora tion, by the National Science Foundation, by Harris Semiconductor, and by the International Business Machines Corporation Resident Study Program. Finally, just for the record: John Cohn was the designer of the KOAN placer; David Garrod was the designer of the ANAGRAM II router (and its predeces sor, ANAGRAM I). This book was architected by all four authors, edited by John Cohn and Rob Rutenbar, and produced in finished form by John Cohn."

This book introduces a family of large-signal stability-based control methods for different power inverters (grid-connected inverter, standalone inverter, single-phase inverter, and three-phase inverter) in practical applications. Power inverters have stability issues, which include the inverter's own instability as well as the inverter's instability in relation to the other power electronic devices in the system (i.e., weak grid and the EMI filter). Most of the stability analyses and solutions are based on small-signal stability technology. Unfortunately, in actuality, the majority of practical instability concerns in power inverter systems are large-signal stability problems, which, when compared to small-signal stability problems, can cause substantial damage to electrical equipment. As a result, researchers must conduct a comprehensive investigation of the large-signal stability challenge and solutions for power inverters. This book can be used as a reference for researchers, power inverters manufacturers, and end-users. As a result, the book will not become obsolete in the near future, regardless of technology advancements.

Describes the basic theory of carrier transport, develops numerical algorithms in FORTRAN used for transport problems or device simulations, and presents real-world examples.

Over 100 scientists met at the IBM Research Laboratory in San Jose. California for a symposium on the Physics and Chemistry of Liquid Crystal Devices. The two-day meeting was intellectually stimulating with excellent oral presentations and with person-to-person discussions. The applications of liquid crystals have developed dramatically in the past ten years. In these few years, they have moved from being a laboratory curiosity to products in the market place. The first commercial application (1940's) of liquid crystals was the preparation of a light polarizer. The second commercial application was their use as temperature sensors. The third major application of liquid crystals dealt with commercial displays. Other current applications include polymeric and graphitic fibers and light attenuators. The future of liquid crystals looks very promising indeed. One can expect to see new fibers of qualities which will be superior to those presently known. Graphitic fibers or other physical forms of graphitic materials will be used as catalytic surfaces for chemical synthesis. In the display area. one can expect to see television screens using liquid crystals. Larger displays than are now used in wrist watches and pocket calculators will become available. Liquid crystals using color displays will become commercially practical. Watches. calculators and television screens will have color.

The third edition of Digital Logic Techniques provides a clear and comprehensive treatment of the representation of data, operations on data, combinational logic design, sequential logic, computer architecture, and practical digital circuits. A wealth of exercises and worked examples in each chapter give students valuable experience in applying the concepts and techniques discussed. Beginning with an objective comparison between analogue and digital representation of data, the author presents the Boolean algebra framework for digital electronics, develops combinational logic design from first principles, and presents cellular logic as an alternative structure more relevant than canonical forms to VLSI implementation. He then addresses sequential logic design and develops a strategy for designing finite state machines, giving students a solid foundation for more advanced studies in automata theory. The second half of the book focuses on the digital system as an entity. Here the author examines the implementation of logic systems in programmable hardware, outlines the specification of a system, explores arithmetic processors, and elucidates fault diagnosis. The final chapter examines the electrical properties of logic components, compares the different logic families, and highlights the problems that can arise in constructing practical hardware systems.

The task of the system architect is to take the correct early decisions despite the uncertainties.

Power-Aware Architecting provides a systematic way to support the system architect in this job. Therefore, an iterative system-level design approach is defined where iterations are based on fast and accurate estimations or predictions of area, performance and energy consumption. This method is illustrated with a concrete real life example of multi-carrier communication. This book is the result of a Ph.D. thesis, which is part of the UbiCom project at Delft University of Technology. I strongly recommend it to any engineer, expert or specialist, who is interested in designing embedded systems-on-a-chip.

Jef van Meerbergen
Professor Eindhoven University of Technology
Fellow Philips Research Eindhoven

This textbook uses design insight, real-life examples, illustrative figures, easy-to-follow equations, and simple SPICE code to show how semiconductor devices (diodes, bipolar-junction transistors (BJTs), and metal-oxide-semiconductor (MOS) field-effect transistors (FETs) ) work independently and collectively in switched-inductor power supplies; how these power supplies transfer power, consume power, and react and respond across frequency; how feedback loops switch, control, and stabilize them; and how the building blocks that comprise them are implemented and designed. This book is focused and complete, with a holistic approach and perspective on power IC design that extends from semiconductor devices to fully-closed feedback systems. Readers will develop the insight needed to interpret, assess, and design switched inductor power ICs, which almost all electronic systems need, yet no other book addresses this way.

This book provides an overview of current hardware security primitives, their design considerations, and applications. The authors provide a comprehensive introduction to a broad spectrum (digital and analog) of hardware security primitives and their applications for securing modern devices. Readers will be enabled to understand the various methods for exploiting intrinsic manufacturing and temporal variations in silicon devices to create strong security primitives and solutions. This book will benefit SoC designers and researchers in designing secure, reliable, and trustworthy hardware. Provides guidance and security engineers for protecting their hardware designs; Covers a variety digital and analog hardware security primitives and applications for securing modern devices; Helps readers understand PUF, TRNGs, silicon odometer, and cryptographic hardware design for system security.

Designing reliable and dependable embedded systems has become increasingly important as the failure of these systems in an automotive, aerospace or nuclear application can have serious consequences. Design and Test Technology for Dependable Systems-on-Chip covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC). This book provides insight into refined classical design and test topics and solutions for IC test technology and fault-tolerant systems.

Several diverse but related topics concerned with semiconductor growth are brought together here, for the first time in a single text. Those studying semiconductor growth from any perspective will find this book invaluable and it will be essential reading for all in the semiconductor industry, whether in applications or in manufacturing.

This book introduces new compilation techniques, using the polyhedron model for the resource-adaptive parallel execution of loop programs on massively parallel processor arrays. The authors show how to compute optimal symbolic assignments and parallel schedules of loop iterations at compile time, for cases where the number of available cores becomes known only at runtime. The compile/runtime symbolic parallelization approach the authors describe reduces significantly the runtime overhead, compared to dynamic or just-in-time compilation. The new, on-demand fault-tolerant loop processing approach described in this book protects loop nests for parallel execution against soft errors.

Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems describes coding approaches for designing fault-tolerant systems, i.e., systems that exhibit structured redundancy that enables them to distinguish between correct and incorrect results or between valid and invalid states. Since redundancy is expensive and counter-intuitive to the traditional notion of system design, the book focuses on resource-efficient methodologies that avoid excessive use of redundancy by exploiting the algorithmic/dynamic structure of a particular combinational or dynamic system. The first part of Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems focuses on fault-tolerant combinational systems providing a review of von Neumann's classical work on Probabilistic Logics (including some more recent work on noisy gates) and describing the use of arithmetic coding and algorithm-based fault-tolerant schemes in algebraic settings. The second part of the book focuses on fault tolerance in dynamic systems. Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems also discusses how, in a dynamic system setting, one can relax the traditional assumption that the error-correcting mechanism is fault-free by using distributed error correcting mechanisms. The final chapter presents a methodology for fault diagnosis in discrete event systems that are described by Petri net models; coding techniques are used to quickly detect and identify failures. From the Foreword "Hadjicostis has significantly expanded the setting to processes occurring in more general algebraic and dynamic systems... The book responds to the growing need to handle faults in complex digital chips and complex networked systems, and to consider the effects of faults at the design stage rather than afterwards." George Verghese, Massachusetts Institute of Technology Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems will be of interest to both researchers and practitioners in the area of fault tolerance, systems design and control.

The primary objective of this NATO Advanced Study Institute (ASI) was to present an up-to-date overview of various current areas of interest in the field of photovoltaic and related photoactive materials. This is a wide-ranging subject area, of significant commercial and environmental interest, and involves major contributions from the disciplines of physics, chemistry, materials, electrical and instrumentation engineering, commercial realisation etc. Therefore, we sought to adopt an inter disciplinary approach, bringing together recognised experts in the various fields while retaining a level of treatment accessible to those active in specific individual areas of research and development. The lecture programme commenced with overviews of the present relevance and historical development of the subject area, plus an introduction to various underlying physical principles of importance to the materials and devices to be addressed in later lectures. Building upon this, the ASI then progressed to more detailed aspects of the subject area. We were also fortunately able to obtain a contribution from Thierry Langlois d'Estaintot of the European Commission Directorate, describing present and future EC support for activities in this field. In addition, poster sessions were held throughout the meeting, to allow participants to present and discuss their current activities. These were supported by what proved to be very effective feedback sessions (special thanks to Martin Stutzmann), prior to which groups of participants enthusiastically met (often in the bar) to identify and agree topics of common interest."

Rapid advances in neural sciences and VLSI design technologies have provided an excellent means to boost the computational capability and efficiency of data and signal processing tasks by several orders of magnitude. With massively parallel processing capabilities, artificial neural networks can be used to solve many engineering and scientific problems. Due to the optimized data communication structure for artificial intelligence applications, a neurocomputer is considered as the most promising sixth-generation computing machine. Typical applica tions of artificial neural networks include associative memory, pattern classification, early vision processing, speech recognition, image data compression, and intelligent robot control. VLSI neural circuits play an important role in exploring and exploiting the rich properties of artificial neural networks by using pro grammable synapses and gain-adjustable neurons. Basic building blocks of the analog VLSI neural networks consist of operational amplifiers as electronic neurons and synthesized resistors as electronic synapses. The synapse weight information can be stored in the dynamically refreshed capacitors for medium-term storage or in the floating-gate of an EEPROM cell for long-term storage. The feedback path in the amplifier can continuously change the output neuron operation from the unity-gain configuration to a high-gain configuration. The adjustability of the vol tage gain in the output neurons allows the implementation of hardware annealing in analog VLSI neural chips to find optimal solutions very efficiently. Both supervised learning and unsupervised learning can be implemented by using the programmable neural chips."

This book serves as a single-source reference to sinusoidal oscillators and waveform generators, using classical as well as a variety of modern electronic circuit building blocks. It provides a state-of-the-art review of a large variety of sinusoidal oscillators and waveform generators and includes a catalogue of over 600 configurations of oscillators and waveform generators, describing their relevant design details and salient performance features/limitations. The authors discuss a number of interesting, open research problems and include a comprehensive collection of over 1500 references on oscillators and non-sinusoidal waveform generators/relaxation oscillators. Offers readers a single-source reference to everything connected to sinusoidal oscillators and waveform generators, using classical as well as modern electronic circuit building blocks; Provides a state-of-the-art review of a large variety of sinusoidal oscillators and waveform generators; Includes a catalog of over 600 configurations of oscillators and waveform generators, with their relevant design details and their salient performance features/limitations.

This book is intended to give a general overview of reliability, faults, fault models, nanotechnology, nanodevices, fault-tolerant architectures and reliability evaluation techniques. Additionally, the book provides an in depth state-of-the-art research results and methods for fault tolerance as well as the methodology for designing fault-tolerant systems out of highly unreliable components.

Examines all important aspects of integrated circuit design, fabrication, assembly and test processes as they relate to quality and reliability. This second edition discusses in detail: the latest circuit design technology trends; the sources of error in wafer fabrication and assembly; avenues of contamination; new IC packaging methods; new in-line process monitors and test structures; and more.;This work should be useful to electrical and electronics, quality and reliability, and industrial engineers; computer scientists; integrated circuit manufacturers; and upper-level undergraduate, graduate and continuing-education students in these disciplines.

Computer Methods for Analysis of Mixed-Mode Switching Circuits provides an in-depth treatment of the principles and implementation details of computer methods and numerical algorithms for analysis of mixed-mode switching circuits. Major topics include:
-Computer-oriented formulation of mixed-mode switching circuits,
-Network functions of linear and nonlinear time-varying systems,
-Numerical Laplace inversion based integration algorithms and inconsistent initial conditions,
-Time domain analysis of periodically switched linear and nonlinear circuits including response, sensitivity, noise, clock jitter, and statistical quantities,
-Time domain analysis of circuits with internally controlled switches and over-sampled sigma-delta modulators,
-Tellegen's theorem, frequency reversal theorem, and transfer function theorem of periodically switched linear circuits and their applications,
-Frequency domain analysis of periodically switched linear and nonlinear circuits including response, sensitivity, group delay, noise, and statistical quantities.

This book uses digital radios as a challenging design example, generalized to bridge a typical gap between designers who work on algorithms and those who work to implement those algorithms on silicon. The author shows how such a complex system can be moved from high-level characterization to a form that is ready for hardware implementation. Along the way, readers learn a lot about how algorithm designers can benefit from knowing the hardware they target and how hardware designers can benefit from a familiarity with the algorithm. The book shows how a high-level description of an algorithm can be migrated to a fixed-point block diagram with a well-defined cycle accurate architecture and a fully documented controller. This can significantly reduce the length of the hardware design cycle and can improve its outcomes. Ultimately, the book presents an explicit design flow that bridges the gap between algorithm design and hardware design. Provides a guide to baseband radio design for Wi-Fi and cellular systems, from an implementation-focused, perspective; Explains how arithmetic is moved to hardware and what the cost of each operation is in terms of delay, area and power; Enables strategic architectural decisions based on the algorithm, available processing units and design requirements.

This book provides a comprehensive set of characterization, prediction, optimization, evaluation, and evolution techniques for a diagnosis system for fault isolation in large electronic systems. Readers with a background in electronics design or system engineering can use this book as a reference to derive insightful knowledge from data analysis and use this knowledge as guidance for designing reasoning-based diagnosis systems. Moreover, readers with a background in statistics or data analytics can use this book as a practical case study for adapting data mining and machine learning techniques to electronic system design and diagnosis. This book identifies the key challenges in reasoning-based, board-level diagnosis system design and presents the solutions and corresponding results that have emerged from leading-edge research in this domain. It covers topics ranging from highly accurate fault isolation, adaptive fault isolation, diagnosis-system robustness assessment, to system performance analysis and evaluation, knowledge discovery and knowledge transfer. With its emphasis on the above topics, the book provides an in-depth and broad view of reasoning-based fault diagnosis system design. * Explains and applies optimized techniques from the machine-learning domain to solve the fault diagnosis problem in the realm of electronic system design and manufacturing;* Demonstrates techniques based on industrial data and feedback from an actual manufacturing line;* Discusses practical problems, including diagnosis accuracy, diagnosis time cost, evaluation of diagnosis system, handling of missing syndromes in diagnosis, and need for fast diagnosis-system development.

Among analog-to-digital converters, the delta-sigma modulator has cornered the market on high to very high resolution converters at moderate speeds, with typical applications such as digital audio and instrumentation. Interest has recently increased in delta-sigma circuits built with a continuous-time loop filter rather than the more common switched-capacitor approach. Continuous-time delta-sigma modulators offer less noisy virtual ground nodes at the input, inherent protection against signal aliasing, and the potential to use a physical rather than an electrical integrator in the first stage for novel applications like accelerometers and magnetic flux sensors. More significantly, they relax settling time restrictions so that modulator clock rates can be raised. This opens the possibility of wideband (1 MHz or more) converters, possibly for use in radio applications at an intermediate frequency so that one or more stages of mixing might be done in the digital domain. Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion: Theory, Practice and Fundamental Performance Limits covers all aspects of continuous-time delta-sigma modulator design, with particular emphasis on design for high clock speeds. The authors explain the ideal design of such modulators in terms of the well-understood discrete-time modulator design problem and provide design examples in Matlab. They also cover commonly-encountered non-idealities in continuous-time modulators and how they degrade performance, plus a wealth of material on the main problems (feedback path delays, clock jitter, and quantizer metastability) in very high-speed designs and how to avoid them. They also give a concrete design procedure for a real high-speed circuit which illustrates the tradeoffs in the selection of key parameters. Detailed circuit diagrams, simulation results and test results for an integrated continuous-time 4 GHz band-pass modulator for A/D conversion of 1 GHz analog signals are also presented. Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion: Theory, Practice and Fundamental Performance Limits concludes with some promising modulator architectures and a list of the challenges that remain in this exciting field.

This text discusses simulation process for circuits including clamper, voltage and current divider, transformer modeling, transistor as an amplifier, transistor as a switch, MOSFET modeling, RC and LC filters, step and impulse response to RL and RC circuits, amplitude modulator in a step-by-step manner for more clarity and understanding to the readers. It covers electronic circuits like rectifiers, RC filters, transistor as an amplifier, operational amplifiers, pulse response to a series RC circuit, time domain simulation with a triangular input signal, and modulation in detail. The text presents issues that occur in practical implementation of various electronic circuits and assist the readers in finding solutions to those issues using the software. Aimed at undergraduate, graduate students, and academic researchers in the areas including electrical and electronics and communications engineering, this book: Discusses simulation of analog circuits and their behavior for different parameters. Covers AC/DC circuit modeling using regular and parametric sweep methods. The theory will be augmented with practical electrical circuit examples that will help readers to better understand the topic. Discusses circuits like rectifiers, RC filters, transistor as an amplifier, and operational amplifiers in detail.

During the last decade many new concepts have been proposed for improving the performance of power MOSFETs. The results of this research are dispersed in the technical literature among journal articles and abstracts of conferences. Consequently, the information is not readily available to researchers and practicing engineers in the power device community. There is no cohesive treatment of the ideas to provide an assessment of the relative merits of the ideas.

"Advanced Power MOSFET Concepts" provides an in-depth treatment of the physics of operation of advanced power MOSFETs. Analytical models for explaining the operation of all the advanced power MOSFETs will be developed. The results of numerical simulations will be provided to give additional insight into the device physics and validate the analytical models. The results of two-dimensional simulations will be provided to corroborate the analytical models and give greater insight into the device operation.