Low Power Design Methodologies presents the first in-depth coverage of all the layers of the design hierarchy, ranging from the technology, circuit, logic and architectural levels, up to the system layer. The book gives insight into the mechanisms of power dissipation in digital circuits and presents state of the art approaches to power reduction. Finally, it introduces a global view of low power design methodologies and how these are being captured in the latest design automation environments. The individual chapters are written by the leading researchers in the area, drawn from both industry and academia. Extensive references are included at the end of each chapter. Audience: A broad introduction for anyone interested in low power design. Can also be used as a text book for an advanced graduate class. A starting point for any aspiring researcher.

This book presents the research challenges that are due to the introduction of the 3rd dimension in chips for researchers and covers the whole architectural design approach for 3D-SoCs. Nowadays the 3D-Integration technologies, 3D-Design techniques, and 3D-Architectures are emerging as interesting, truly hot, broad topics. The present book gathers the recent advances in the whole domain by renowned experts in the field to build a comprehensive and consistent book around the hot topics of three-dimensional architectures and micro-architectures. This book includes contributions from high level international teams working in this field.

The electromechanical systems employed in different branches of industry are utilized most often as drives of working machines which must be fed with electric energy in a continuous, periodic or even discrete way. Some of these machines operate at constant speed, others require wide and varying energy control. In many designs the synchronous cooperation of several electric drives is required in addition to the desired dynamic properties. For these reasons the control of the cooperation and dynamics of electromechanical systems requires the use of computers.
This book adopts an unusual approach to the subject in that it treats the electric drive system on the one hand as an element of a control system and on the other as an element of a complex automatic system. These two trends in the development of the automatic control of electric drives have resulted in a volume that provides a thorough overview on the variety of different approaches to the design of control systems.

iming, timing, timing! That is the main concern of a digital designer charged with designing a semiconductor chip. What is it, how is it T described, and how does one verify it? The design team of a large digital design may spend months architecting and iterating the design to achieve the required timing target. Besides functional verification, the t- ing closure is the major milestone which dictates when a chip can be - leased to the semiconductor foundry for fabrication. This book addresses the timing verification using static timing analysis for nanometer designs. The book has originated from many years of our working in the area of timing verification for complex nanometer designs. We have come across many design engineers trying to learn the background and various aspects of static timing analysis. Unfortunately, there is no book currently ava- able that can be used by a working engineer to get acquainted with the - tails of static timing analysis. The chip designers lack a central reference for information on timing, that covers the basics to the advanced timing veri- cation procedures and techniques.

Rapid increases in chip complexity, increasingly faster clocks, and the proliferation of portable devices have combined to make power dissipation an important design parameter. The power consumption of a digital system determines its heat dissipation as well as battery life. For some systems, power has become the most critical design constraint. Computer-Aided Design Techniques for Low Power Sequential Logic Circuits presents a methodology for low power design. The authors first present a survey of techniques for estimating the average power dissipation of a logic circuit. At the logic level, power dissipation is directly related to average switching activity. A symbolic simulation method that accurately computes the average switching activity in logic circuits is then described. This method is extended to handle sequential logic circuits by modeling correlation in time and by calculating the probabilities of present state lines. Computer-Aided Design Techniques for Low Power Sequential Logic Circuits then presents a survey of methods to optimize logic circuits for low power dissipation which target reduced switching activity. A method to retime a sequential logic circuit where registers are repositioned such that the overall glitching in the circuit is minimized is also described. The authors then detail a powerful optimization method that is based on selectively precomputing the output logic values of a circuit one clock cycle before they are required, and using the precomputed value to reduce internal switching activity in the succeeding clock cycle. Presented next is a survey of methods that reduce switching activity in circuits described at the register-transfer and behavioral levels. Also described is a scheduling algorithm that reduces power dissipation by maximising the inactivity period of the modules in a given circuit. Computer-Aided Design Techniques for Low Power Sequential Logic Circuits concludes with a summary and directions for future research.

'Practical Analog Electronics for Technicians' not only provides an accessible introduction to electronics, but also supplies all the problems and practical activities needed to gain hands-on knowledge and experience. This emphasis on practice is surprisingly unusual in electronics texts, and has already gained Will Kimber popularity through the companion volume, 'Practical Digital Electronics for Technicians'. Written to cover the Advanced GNVQ optional unit in electronics, this book is also ideal for BTEC National, A-level electronics and City & Guilds courses. Together with 'Practical Digital Electronics for Technicians', this text comprises a complete practical electronics course designed for students with little prior knowledge of the subject.

This text contributes to the field of sequential optimization for finite-state machines, introducing several new provably-optimal algorithms, presenting practical software implementations of each of these algorithms and introducing a complete new CAD package, called MINIMALIST. Real-world industrial designs are used as benchmark circuits throughout.

Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. We consider both logic and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes.

This book provides a sound introduction to basic electronic concepts in a lively and practical format. It effectively meets the needs of both the electronics option of the advanced GNVQ in engineering and the BTEC National certificate in electronics and includes hands-on practical investigations and self-test questions which will appeal to a wide range of readers. Applied Electronics employs user-friendly text and a non-mathematical approach to develop the reader's ability and understanding of the principles of analogue and digital electronics. Beginning with the semiconductor devices themselves, it progresses through amplifiers and power supplies to combinational and sequential logic.

This book presents a detailed summary of research on automatic layout of device-level analog circuits that was undertaken in the late 1980s and early 1990s at Carnegie Mellon University. We focus on the work behind the creation of the tools called KOAN and ANAGRAM II, which form part of the core of the CMU ACACIA analog CAD system. KOAN is a device placer for custom analog cells; ANANGRAM II a detailed area router for these analog cells. We strive to present the motivations behind the architecture of these tools, including detailed discussion of the subtle technology and circuit concerns that must be addressed in any successful analog or mixed-signal layout tool. Our approach in organizing the chapters of the book has been to present our algo rithms as a series of responses to these very real and very difficult analog layout problems. Finally, we present numerous examples of results generated by our algorithms. This research was supported in part by the Semiconductor Research Corpora tion, by the National Science Foundation, by Harris Semiconductor, and by the International Business Machines Corporation Resident Study Program. Finally, just for the record: John Cohn was the designer of the KOAN placer; David Garrod was the designer of the ANAGRAM II router (and its predeces sor, ANAGRAM I). This book was architected by all four authors, edited by John Cohn and Rob Rutenbar, and produced in finished form by John Cohn."

This book introduces a family of large-signal stability-based control methods for different power inverters (grid-connected inverter, standalone inverter, single-phase inverter, and three-phase inverter) in practical applications. Power inverters have stability issues, which include the inverter's own instability as well as the inverter's instability in relation to the other power electronic devices in the system (i.e., weak grid and the EMI filter). Most of the stability analyses and solutions are based on small-signal stability technology. Unfortunately, in actuality, the majority of practical instability concerns in power inverter systems are large-signal stability problems, which, when compared to small-signal stability problems, can cause substantial damage to electrical equipment. As a result, researchers must conduct a comprehensive investigation of the large-signal stability challenge and solutions for power inverters. This book can be used as a reference for researchers, power inverters manufacturers, and end-users. As a result, the book will not become obsolete in the near future, regardless of technology advancements.

Describes the basic theory of carrier transport, develops numerical algorithms in FORTRAN used for transport problems or device simulations, and presents real-world examples.

Over 100 scientists met at the IBM Research Laboratory in San Jose. California for a symposium on the Physics and Chemistry of Liquid Crystal Devices. The two-day meeting was intellectually stimulating with excellent oral presentations and with person-to-person discussions. The applications of liquid crystals have developed dramatically in the past ten years. In these few years, they have moved from being a laboratory curiosity to products in the market place. The first commercial application (1940's) of liquid crystals was the preparation of a light polarizer. The second commercial application was their use as temperature sensors. The third major application of liquid crystals dealt with commercial displays. Other current applications include polymeric and graphitic fibers and light attenuators. The future of liquid crystals looks very promising indeed. One can expect to see new fibers of qualities which will be superior to those presently known. Graphitic fibers or other physical forms of graphitic materials will be used as catalytic surfaces for chemical synthesis. In the display area. one can expect to see television screens using liquid crystals. Larger displays than are now used in wrist watches and pocket calculators will become available. Liquid crystals using color displays will become commercially practical. Watches. calculators and television screens will have color.

The third edition of Digital Logic Techniques provides a clear and comprehensive treatment of the representation of data, operations on data, combinational logic design, sequential logic, computer architecture, and practical digital circuits. A wealth of exercises and worked examples in each chapter give students valuable experience in applying the concepts and techniques discussed. Beginning with an objective comparison between analogue and digital representation of data, the author presents the Boolean algebra framework for digital electronics, develops combinational logic design from first principles, and presents cellular logic as an alternative structure more relevant than canonical forms to VLSI implementation. He then addresses sequential logic design and develops a strategy for designing finite state machines, giving students a solid foundation for more advanced studies in automata theory. The second half of the book focuses on the digital system as an entity. Here the author examines the implementation of logic systems in programmable hardware, outlines the specification of a system, explores arithmetic processors, and elucidates fault diagnosis. The final chapter examines the electrical properties of logic components, compares the different logic families, and highlights the problems that can arise in constructing practical hardware systems.

The task of the system architect is to take the correct early decisions despite the uncertainties.

Power-Aware Architecting provides a systematic way to support the system architect in this job. Therefore, an iterative system-level design approach is defined where iterations are based on fast and accurate estimations or predictions of area, performance and energy consumption. This method is illustrated with a concrete real life example of multi-carrier communication. This book is the result of a Ph.D. thesis, which is part of the UbiCom project at Delft University of Technology. I strongly recommend it to any engineer, expert or specialist, who is interested in designing embedded systems-on-a-chip.

Jef van Meerbergen
Professor Eindhoven University of Technology
Fellow Philips Research Eindhoven

This textbook uses design insight, real-life examples, illustrative figures, easy-to-follow equations, and simple SPICE code to show how semiconductor devices (diodes, bipolar-junction transistors (BJTs), and metal-oxide-semiconductor (MOS) field-effect transistors (FETs) ) work independently and collectively in switched-inductor power supplies; how these power supplies transfer power, consume power, and react and respond across frequency; how feedback loops switch, control, and stabilize them; and how the building blocks that comprise them are implemented and designed. This book is focused and complete, with a holistic approach and perspective on power IC design that extends from semiconductor devices to fully-closed feedback systems. Readers will develop the insight needed to interpret, assess, and design switched inductor power ICs, which almost all electronic systems need, yet no other book addresses this way.

This book provides an overview of current hardware security primitives, their design considerations, and applications. The authors provide a comprehensive introduction to a broad spectrum (digital and analog) of hardware security primitives and their applications for securing modern devices. Readers will be enabled to understand the various methods for exploiting intrinsic manufacturing and temporal variations in silicon devices to create strong security primitives and solutions. This book will benefit SoC designers and researchers in designing secure, reliable, and trustworthy hardware. Provides guidance and security engineers for protecting their hardware designs; Covers a variety digital and analog hardware security primitives and applications for securing modern devices; Helps readers understand PUF, TRNGs, silicon odometer, and cryptographic hardware design for system security.

Designing reliable and dependable embedded systems has become increasingly important as the failure of these systems in an automotive, aerospace or nuclear application can have serious consequences. Design and Test Technology for Dependable Systems-on-Chip covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC). This book provides insight into refined classical design and test topics and solutions for IC test technology and fault-tolerant systems.

Several diverse but related topics concerned with semiconductor growth are brought together here, for the first time in a single text. Those studying semiconductor growth from any perspective will find this book invaluable and it will be essential reading for all in the semiconductor industry, whether in applications or in manufacturing.

This book introduces new compilation techniques, using the polyhedron model for the resource-adaptive parallel execution of loop programs on massively parallel processor arrays. The authors show how to compute optimal symbolic assignments and parallel schedules of loop iterations at compile time, for cases where the number of available cores becomes known only at runtime. The compile/runtime symbolic parallelization approach the authors describe reduces significantly the runtime overhead, compared to dynamic or just-in-time compilation. The new, on-demand fault-tolerant loop processing approach described in this book protects loop nests for parallel execution against soft errors.

Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems describes coding approaches for designing fault-tolerant systems, i.e., systems that exhibit structured redundancy that enables them to distinguish between correct and incorrect results or between valid and invalid states. Since redundancy is expensive and counter-intuitive to the traditional notion of system design, the book focuses on resource-efficient methodologies that avoid excessive use of redundancy by exploiting the algorithmic/dynamic structure of a particular combinational or dynamic system. The first part of Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems focuses on fault-tolerant combinational systems providing a review of von Neumann's classical work on Probabilistic Logics (including some more recent work on noisy gates) and describing the use of arithmetic coding and algorithm-based fault-tolerant schemes in algebraic settings. The second part of the book focuses on fault tolerance in dynamic systems. Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems also discusses how, in a dynamic system setting, one can relax the traditional assumption that the error-correcting mechanism is fault-free by using distributed error correcting mechanisms. The final chapter presents a methodology for fault diagnosis in discrete event systems that are described by Petri net models; coding techniques are used to quickly detect and identify failures. From the Foreword "Hadjicostis has significantly expanded the setting to processes occurring in more general algebraic and dynamic systems... The book responds to the growing need to handle faults in complex digital chips and complex networked systems, and to consider the effects of faults at the design stage rather than afterwards." George Verghese, Massachusetts Institute of Technology Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems will be of interest to both researchers and practitioners in the area of fault tolerance, systems design and control.

The primary objective of this NATO Advanced Study Institute (ASI) was to present an up-to-date overview of various current areas of interest in the field of photovoltaic and related photoactive materials. This is a wide-ranging subject area, of significant commercial and environmental interest, and involves major contributions from the disciplines of physics, chemistry, materials, electrical and instrumentation engineering, commercial realisation etc. Therefore, we sought to adopt an inter disciplinary approach, bringing together recognised experts in the various fields while retaining a level of treatment accessible to those active in specific individual areas of research and development. The lecture programme commenced with overviews of the present relevance and historical development of the subject area, plus an introduction to various underlying physical principles of importance to the materials and devices to be addressed in later lectures. Building upon this, the ASI then progressed to more detailed aspects of the subject area. We were also fortunately able to obtain a contribution from Thierry Langlois d'Estaintot of the European Commission Directorate, describing present and future EC support for activities in this field. In addition, poster sessions were held throughout the meeting, to allow participants to present and discuss their current activities. These were supported by what proved to be very effective feedback sessions (special thanks to Martin Stutzmann), prior to which groups of participants enthusiastically met (often in the bar) to identify and agree topics of common interest."

Rapid advances in neural sciences and VLSI design technologies have provided an excellent means to boost the computational capability and efficiency of data and signal processing tasks by several orders of magnitude. With massively parallel processing capabilities, artificial neural networks can be used to solve many engineering and scientific problems. Due to the optimized data communication structure for artificial intelligence applications, a neurocomputer is considered as the most promising sixth-generation computing machine. Typical applica tions of artificial neural networks include associative memory, pattern classification, early vision processing, speech recognition, image data compression, and intelligent robot control. VLSI neural circuits play an important role in exploring and exploiting the rich properties of artificial neural networks by using pro grammable synapses and gain-adjustable neurons. Basic building blocks of the analog VLSI neural networks consist of operational amplifiers as electronic neurons and synthesized resistors as electronic synapses. The synapse weight information can be stored in the dynamically refreshed capacitors for medium-term storage or in the floating-gate of an EEPROM cell for long-term storage. The feedback path in the amplifier can continuously change the output neuron operation from the unity-gain configuration to a high-gain configuration. The adjustability of the vol tage gain in the output neurons allows the implementation of hardware annealing in analog VLSI neural chips to find optimal solutions very efficiently. Both supervised learning and unsupervised learning can be implemented by using the programmable neural chips."

This book serves as a single-source reference to sinusoidal oscillators and waveform generators, using classical as well as a variety of modern electronic circuit building blocks. It provides a state-of-the-art review of a large variety of sinusoidal oscillators and waveform generators and includes a catalogue of over 600 configurations of oscillators and waveform generators, describing their relevant design details and salient performance features/limitations. The authors discuss a number of interesting, open research problems and include a comprehensive collection of over 1500 references on oscillators and non-sinusoidal waveform generators/relaxation oscillators. Offers readers a single-source reference to everything connected to sinusoidal oscillators and waveform generators, using classical as well as modern electronic circuit building blocks; Provides a state-of-the-art review of a large variety of sinusoidal oscillators and waveform generators; Includes a catalog of over 600 configurations of oscillators and waveform generators, with their relevant design details and their salient performance features/limitations.

This book is intended to give a general overview of reliability, faults, fault models, nanotechnology, nanodevices, fault-tolerant architectures and reliability evaluation techniques. Additionally, the book provides an in depth state-of-the-art research results and methods for fault tolerance as well as the methodology for designing fault-tolerant systems out of highly unreliable components.