Application Specific Processors is written for use by engineers who are developing specialized systems (application specific systems). Traditionally, most high performance signal processors have been realized with application specific processors. The explanation is that application specific processors can be tailored to exactly match the (usually very demanding) application requirements. The result is that no processing power' is wasted for unnecessary capabilities and maximum performance is achieved. A disadvantage is that such processors have been expensive to design since each is a unique design that is customized to the specific application. In the last decade, computer-aided design systems have been developed to facilitate the development of application specific integrated circuits. The success of such ASIC CAD systems suggests that it should be possible to streamline the process of application specific processor design. Application Specific Processors consists of eight chapters which provide a mixture of techniques and examples that relate to application specific processing. The inclusion of techniques is expected to suggest additional research and to assist those who are faced with the requirement to implement efficient application specific processors. The examples illustrate the application of the concepts and demonstrate the efficiency that can be achieved via application specific processors. The chapters were written by members and former members of the application specific processing group at the University of Texas at Austin. The first five chapters relate to specific arithmetic which often is the key to achieving high performance in application specific processors. The next two chapters focus on signal processing systems, and the final chapter examines the interconnection of possibly disparate elements to create systems.

Advances in the state of the art mean the signal processing ICs of ever-increasing complexity are being introduced. While the typical portion of a large IC devoted to analog circuits has diminished, the performance of those surviving analog signal processing circuits remains vital and their design challenging. Moreover, the emerging high-definition TV technology has created a new area for IC development, one with formidable signal processing requirements. The antialiasing filters needed for one proposed HDTV decoder motivated the research documented in this book. Sharply selective filters place tight constraints on the permitted excess phase shifts of their constituent circuits. Combined with stringent requirements for low distortion at video frequencies, these constraints challenge the IC filter designer. Integrated Video-Frequency Continuous-Time Filters: High-Performance Realizations in BiCMOS deals with what is arguably the mainstay of analog signal processing circuits. Prominent applications in computer disk-drive read channels, video receivers, rf circuits, and antialiasing and reconstruction in data converters testifies to their importance. Moreover, they are excellent benchmarks for more general analog signal processors. Bipolar and MOSFET transistors, freely combined at the lowest circuit levels, provide the designer with an opportunity to develop potent variations on the standard idioms. The book considers the general principles of BiCMOS circuit design, through to a demanding design problem. This case-study approach allows a concrete discussion of the justification for and practical trade-offs of each design decision. Audience: A reference work for experienced IC designers and a text for advanced IC design students.

Variability is one of the most challenging obstacles for IC design in the nanometer regime. In nanometer technologies, SRAM show an increased sensitivity to process variations due to low-voltage operation requirements, which are aggravated by the strong demand for lower power consumption and cost, while achieving higher performance and density. With the drastic increase in memory densities, lower supply voltages, and higher variations, statistical simulation methodologies become imperative to estimate memory yield and optimize performance and power. This book is an invaluable reference on robust SRAM circuits and statistical design methodologies for researchers and practicing engineers in the field of memory design. It combines state of the art circuit techniques and statistical methodologies to optimize SRAM performance and yield in nanometer technologies. Provides comprehensive review of state-of-the-art, variation-tolerant SRAM circuit techniques; Discusses Impact of device related process variations and how they affect circuit and system performance, from a design point of view; Helps designers optimize memory yield, with practical statistical design methodologies and yield estimation techniques.

This book covers the fundamental principles behind the design of ultra-low power radios and how they can form networks to facilitate a variety of applications within healthcare and environmental monitoring, since they may operate for years off a small battery or even harvest energy from the environment. These radios are distinct from conventional radios in that they must operate with very constrained resources and low overhead. This book provides a thorough discussion of the challenges associated with designing radios with such constrained resources, as well as fundamental design concepts and practical approaches to implementing working designs. Coverage includes integrated circuit design, timing and control considerations, fundamental theory behind low power and time domain operation, and network/communication protocol considerations.

This book presents a new optimization flow for quantum circuits realization. At the reversible level, optimization algorithms are presented to reduce the quantum cost. Then, new mapping approaches to decompose reversible circuits to quantum circuits using different quantum libraries are described. Finally, optimization techniques to reduce the quantum cost or the delay are applied to the resulting quantum circuits. Furthermore, this book studies the complexity of reversible circuits and quantum circuits from a theoretical perspective.

This book is motivated by the need to understand and predict the complex stress distributions, transfer mechanisms, warpage, and potential failures arising from the encapsulation of devices in plastic. Failures like delaminations, package cracking, and metal shift occur due to the build-up of residual stress and warpage in the packages because of the TCE mismatch between the package materials as the package cools from its molding temperature to room temperature. The correct use of finite element tools for these problems is emphasised. F.E. techniques are used to predict the internal package stress distribution and help explain the stress transfer mechanism between the die, die paddle, and plastic after molding. Out-of-plane shear stress components are shown to be responsible for experimentally observed metal shift patterns on the die surface. Delaminations dramatically alter the internal stress state within a package, increasing the tensile stress in the plastic and so the likelihood of plastic cracks, the stress on wire bonds, and the incidence of wire bond failure. The application of F.E. techniques to predict the post-mold warpage of both thermally enhanced PQFPs and TQFPs is described. Simulations of a thermally enhanced PQFP warpage based on standard modelling assumptions alone fail to predict either the magnitude or its direction correctly. The modelling assumptions need to be modified to include the chemical shrinkage of the molding compound to enable accurate predictions of package warpage to be made, particularly when the packages are asymmetric in structure. Microsystem packaging in both plastic and 3D package body styles is reviewed. Although microsystem packaging is derivedfrom IC packaging, additional requirements for microsystems, not common to IC packaging are highlighted. The assembly stresses on a novel microsystem, incorporating a micromachined silicon membrane pump integrated into a 3D plastic encapsulated vertical multichip module package (MCM-V), are analysed.

Wave Pipelining: Theory and CMOS Implementation provides a coherent presentation of the theory of wave pipelined operation of digital circuits and discusses practical design techniques for the realization of wave pipelined circuits in CMOS technology. Wave pipeling is a timing methodology used in digital systems to enhance performance while conserving the number of data registers used. This is achieved by applying new data to the inputs of a combinatorial logic block before the previous outputs are available. In contrast to conventional pipelining, system performance is limited by differences in maximum and minimum circuit delay rather than maximum circuit delays. Realization of practical systems using this technique requires accurate system level and circuit level timing analysis. At the system level, timing constraints identifying valid regions of operation for correct clocking of wave pipelined circuits are presented. Both single stage and multiple stage systems including feedback are considered. At the circuit level, since performance is determined by the maximum circuit delay difference, highly accurate estimates of both maximum and minimum delays are needed. Thus, timing analysis based on traditional gate delay models is not sufficient. For CMOS circuits, data dependent delay models considering the effect of simultaneous multiple input switchings must be used. An algorithm using these delay models for accurate analysis of small to medium sized circuits is implemented in a prototype timing analyzer, XTV. Results are given for a set of benchmark circuits.

This book describes an approach and supporting infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), allowing its associated product to be introduced into the market more quickly.Readers learn step-by-step the key requirements for debugging a modern, silicon SOC implementation, nine factors that complicate this debugging task, and a new debug approach that addresses these requirements and complicating factors.The authors novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug approach is discussed in detail, showing how it helps to meet debug requirements and address the nine, previously identified factors that complicate debugging silicon implementations of SOCs. The authors also derive the debug infrastructure requirements to support debugging of a silicon implementation of an SOC with their CSAR debug approach. This debug infrastructure consists of a generic on-chip debug architecture, a configurable automated design-for-debug flow to be used during the design of an SOC, and customizable off-chip debugger software. Coverage includes an evaluation of the efficiency and effectiveness of the CSAR approach and its supporting infrastructure, using six industrial SOCs and an illustrative, example SOC model.The authors also quantify the hardware cost and design effort to support their approach.
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Systematic Design of CMOS Switched-Current Bandpass Sigma-Delta Modulators for Digital Communication Chips discusses architectures, circuits and procedures for the optimum design of bandpass sigma-delta (SD) A/D interfaces for mixed-signal chips in standard CMOS technologies. The book differs from others in the very detailed and in-depth coverage of switched-current (SI) errors, which supports the design of high performance SI chips. The book starts with a tutorial presentation of the fundamentals of bandpass SD converters, their applications in communications and their most common architectures. It then presents the basic SI building blocks required for their implementation and analyzes in great detail the operation of these blocks. The influence of SI errors on the performance of the SD modulators (SDMs) is also studied. The outcome is a unique set of models which can be employed with a double purpose: namely, to support iterative procedures employed in mapping specifications onto design parameters; and to allow for accurate behavioural time-domain simulation using MATLAB-like tools. The book is completed with two case studies corresponding to modulators for AM digital radio receivers.
The analyses, models and procedures in the book support the design of SI front-ends with performance indexes comparable to those of switched-capacitor circuits, which makes a significant difference as compared to previous works in the area of SI circuits. Together with a detailed revision of the SI literature, the book presents practical recipes on how to get the maximum performance from SI circuits, and illustrates them by means of two case study chips in CMOS submicron technologies. These prototypes constitute the first reported IC realizations of SI bandpass SDMs.
Systematic Design of CMOS Switched-Current Bandpass Sigma-Delta Modulators for Digital Communication Chips contains highly valuable and unique information to be used as a reference by designers of the analog front-end of mixed-signal chips. The models presented in the book will help these designers to increase their productivity. The tutorial, comprehensive coverage of all issues associated with bandpass sigma-delta converters makes the book very well suited for graduate courses. Finally, the very detailed coverage of errors and trade-offs in the operation of switched-current circuits will be found invaluable by teachers of undergraduate analog design courses.

Originally published in 1981, Modern Filter Design remains a classic statement of the principles underlying the analysis and design of active RC and switched capacitor filters. Among other topics, the authors discuss the design of continuous-time, second order active sections (biquads), various measures of sensitivity, and the basic properties and classification of continuous-time and sampled data systems, together with filter transfer functions and approximations.

Explains how to use low power design in an automated design flow, and examine the design time and performance trade-offs

Includes the latest tools and techniques for low power design applied in an ASIC design flow

Focuses on low power in an automated design methodology, a much neglected area

This revised and extended second edition covers problems concerning the design and realization of digital control algorithms for power electronics circuits using digital signal processing (DSP) methods. This book discusses signal processing, starting from analog signal acquisition, through conversion to digital form, methods of filtration and separation, and ending with pulse control of output power transistors. The book is focused on two applications for the considered methods of digital signal processing, a three-phase shunt active power filter and a digital class-D audio power amplifier. The book bridges the gap between power electronics and digital signal processing. Many control algorithms and circuits for power electronics in the current literature are described using analog transmittances. This may not always be acceptable, especially if half of the sampling frequencies and half of the power transistor switching frequencies are close to the band of interest. Therefore in this book, a digital circuit is treated as a digital circuit with its own peculiar characteristics, rather than an analog circuit. This helps to avoid errors and instability. This edition includes a new chapter dealing with selected problems of simulation of power electronics systems together with digital control circuits. The book includes numerous examples using MATLAB and PSIM programs.

"As chip size and complexity continues to grow exponentially, the challenges of functional verification are becoming a critical issue in the electronics industry. It is now commonly heard that logical errors missed during functional verification are the most common cause of chip re-spins, and that the costs associated with functional verification are now outweighing the costs of chip design. To cope with these challenges engineers are increasingly relying on new design and verification methodologies and languages. Transaction-based design and verification, constrained random stimulus generation, functional coverage analysis, and assertion-based verification are all techniques that advanced design and verification teams routinely use today. Engineers are also increasingly turning to design and verification models based on C/C++ and SystemC in order to build more abstract, higher performance hardware and software models and to escape the limitations of RTL HDLs. This new book, Advanced Verification Techniques, provides specific guidance for these advanced verification techniques. The book includes realistic examples and shows how SystemC and SCV can be applied to a variety of advanced design and verification tasks."
- Stuart Swan

Operational Amplifier Speed and Accuracy Improvement proposes a new methodology for the design of analog integrated circuits. The usefulness of this methodology is demonstrated through the design of an operational amplifier. This methodology consists of the following iterative steps: description of the circuit functionality at a high level of abstraction using signal flow graphs; equivalent transformations and modifications of the graph to the form where all important parameters are controlled by dedicated feedback loops; and implementation of the structure using a library of elementary cells. Operational Amplifier Speed and Accuracy Improvement shows how to choose structures and design circuits which improve an operational amplifier's important parameters such as speed to power ratio, open loop gain, common-mode voltage rejection ratio, and power supply rejection ratio. The same approach is used to design clamps and limiting circuits which improve the performance of the amplifier outside of its linear operating region, such as slew rate enhancement, output short circuit current limitation, and input overload recovery.

This book gives a comprehensive introduction to the design challenges of MPSoC platforms, focusing on early design space exploration. It defines an iterative methodology to increase the abstraction level so that evaluation of design decisions can be performed earlier in the design process. These techniques enable exploration on the system level before undertaking time- and cost-intensive development.

This book describes the newest implementations of integrated photodiodes fabricated in nanometer standard CMOS technologies. It also includes the required fundamentals, the state-of-the-art, and the design of high-performance laser drivers, transimpedance amplifiers, equalizers, and limiting amplifiers fabricated in nanometer CMOS technologies. This book shows the newest results for the performance of integrated optical receivers, laser drivers, modulator drivers and optical sensors in nanometer standard CMOS technologies. Nanometer CMOS technologies rapidly advanced, enabling the implementation of integrated optical receivers for high data rates of several Giga-bits per second and of high-pixel count optical imagers and sensors. In particular, low cost silicon CMOS optoelectronic integrated circuits became very attractive because they can be extensively applied to short-distance optical communications, such as local area network, chip-to-chip and board-to-board interconnects as well as to imaging and medical sensors.

Debugging becomes more and more the bottleneck to chip design productivity, especially while developing modern complex integrated circuits and systems at the Electronic System Level (ESL). Today, debugging is still an unsystematic and lengthy process. Here, a simple reporting of a failure is not enough, anymore. Rather, it becomes more and more important not only to find many errors early during development but also to provide efficient methods for their isolation. In Debugging at the Electronic System Level the state-of-the-art of modeling and verification of ESL designs is reviewed. There, a particular focus is taken onto SystemC. Then, a reasoning hierarchy is introduced. The hierarchy combines well-known debugging techniques with whole new techniques to improve the verification efficiency at ESL. The proposed systematic debugging approach is supported amongst others by static code analysis, debug patterns, dynamic program slicing, design visualization, property generation, and automatic failure isolation. All techniques were empirically evaluated using real-world industrial designs. Summarized, the introduced approach enables a systematic search for errors in ESL designs. Here, the debugging techniques improve and accelerate error detection, observation, and isolation as well as design understanding.

Asynchronous Circuit Design for VLSI Signal Processing is a collection of research papers on recent advances in the area of specification, design and analysis of asynchronous circuits and systems. This interest in designing digital computing systems without a global clock is prompted by the ever growing difficulty in adopting global synchronization as the only efficient means to system timing. Asynchronous circuits and systems have long held interest for circuit designers and researchers alike because of the inherent challenge involved in designing these circuits, as well as developing design techniques for them. The frontier research in this area can be traced back to Huffman's publications The Synthesis of Sequential Switching Circuits' in 1954 followed by Unger's book, Asynchronous Sequential Switching Circuits' in 1969 where a theoretical foundation for handling logic hazards was established. In the last few years a growing number of researchers have joined force in unveiling the mystery of designing correct asynchronous circuits, and better yet, have produced several alternatives in automatic synthesis and verification of such circuits. This collection of research papers represents a balanced view of current research efforts in the design, synthesis and verification of asynchronous systems.

With the increased efforts of the analog design community to integrate analog high-frequency front-ends for telecommunications, there has been heightened interest in the behaviour of nonlinear circuits since this can cause considerable degradation of signals. In analog integrated circuits at lower frequencies, such as filters, nonlinear behaviour limits the dynamic range. Analog integrated circuit designers often lack insight into nonlinear circuit behaviour. Indeed, designers are trained to reason in linear or linearized circuits but not in nonlinear ones. Numerical circuit simulations of nonlinear circuit behavior do not provide enough insight to the designer. Distortion Analysis of Analog Integrated Circuits, with a foreword by Robert G. Meyer, provides both qualitative and quantitative insight into the nonlinear behavior of analog integrated circuits at low and high frequencies. General techniques to suppress nonlinear behavior such as pre-distortion, linear and nonlinear feedback are explained in detail and illustrated with realistic examples. In this way the book fills the gap between the theory of nonlinear systems and practical analog integrated circuits. Distortion Analysis of Analog Integrated Circuits provides the reader with an in-depth analysis of elementary transistor stages, both CMOS and bipolar, as well as an analysis of several larger circuits. Hereby use is made of advanced transistor models that are also discussed in the book. The analyses take into account many more effects than in existing publications, thanks to the use of a calculation method that yields closed-form expressions for nonlinear behavior. These expressions are interpreted and illustrated withrealistic numerical examples. Distortion Analysis of Analog Integrated Circuits is essential reading for practicing analog and mixed-signal design engineers and researchers in the field. It is also suitable as a text for an advanced course on the subject. From the foreword: I am sure that the analog circuit design community will [...] welcome this work by Dr. Wambacq and Prof. Sansen as a major contribution to the analog circuit design literature in the area of distortion analysis of electronic circuits. I am personally looking forward to having a copy readily available for reference when designing integrated circuits for communication systems.' Robert G. Meyer, Professor, Electrical Engineering and Computer Sciences, University of California, Berkeley.

This book focuses on the development of design techniques and methodologies for 60-GHz and E-band power amplifiers and transmitters at device, circuit and layout levels. The authors show the recent development of millimeter-wave design techniques, especially of power amplifiers and transmitters, and presents novel design concepts, such as "power transistor layout" and "4-way parallel-series power combiner", that can enhance the output power and efficiency of power amplifiers in a compact silicon area. Five state-of-the-art 60-GHz and E-band designs with measured results are demonstrated to prove the effectiveness of the design concepts and hands-on methodologies presented. This book serves as a valuable reference for circuit designers to develop millimeter-wave building blocks for future 5G applications.

Temperature has been always considered as an appreciable magnitude to detect failures in electric systems. Abnormal status of this variable, both too high and too low, is sign of abnormal behavior in electronic systems. In Thermal Testing of Integrated Circuits the authors present the feasibility to consider temperature as an observable for testing purposes. The coupling of circuits through heat is inherent to the solid-state nature and the inspection of temperature does not interact with Under Test Circuits or Systems, something that does not happen when voltage or current observable are used. In the book the basis of heat propagation, heat conducting mechanisms and temperature sensitivity of semiconductors are focused with a full coverage of the state of the art. We usually have the idea that all the heating processes are slow, which is true in the macroscopic world, but is not in the case of integrated circuits where the reduced size and amount of material and the really high conductivity of substrates make the thermal testing a promising technique. CMOS and BICMOS temperature sensors for built-in thermal testing are presented in the book. The application of temperature as testing magnitude for both on-line and off-line, analog or digital, on-chip or off-chip are considered. The temperature sensing has an inherent directional capability that can be used as an element for localizing failures, so the technique has interesting diagnosis capabilities as well.

This thesis addresses the problem of improving the alignment of carbon nanotubes (CNTs) in transistor applications, taking a unique approach using iptycenes acting as molecular tweezers in combination with a liquid crystal solvent. As part of a project to test the effectiveness of a multi-step method, the so-called Alignment Relay Technique (ART), this work contributed evidence for the selectivity and stability of ART, as well as providing the first proof-of-concept that ART can be used to create CNT field-effect transistors (FETs). The thesis effectively explains and illustrates the chemical synthesis of the tweezers, the concept and actualization of the technique, the various factors observed to influence deposition and selectivity, along with material fabrication using both photolithography and electron beam lithography. This research advances knowledge of transistors and expands the applications of small organic molecules in the field of materials science. Particular highlights of this thesis include: an extensive review of ART, its advantages, and limitations; development of new material chemistry methods for the optimization of semiconducting CNT selectivity; and a comprehensive exploration of fabrication and characterization of CNTFETs for future applications.

Written by an author with extensive practical experience of applying the techniques, this book is aimed at advanced students and researchers as well as professional design engineers. The text focuses on finite impulse response (FIR) filter structures and on infinite impulse response (IIR) SC filters which simulate classical lossless circuits . It includes coverage of the so-called pseudo-lossless SC circuits and especially multirate SC circuits with recovery of the effective pseudo-energy. There is also discussion of other promising approaches to the design of SC circuits; special attention has been paid to the analysis of multirate and multiphase SC circuits using signal flow graphs.

The extensive use of little known electronic principles provides something like the Science of Electronics supplementing the Art of Electronics without involvement of too much theory. Whereas art can only be acquired by doing, the knowledge provided by science can be acquired from books. The ready availability of integrated circuits for practically any application reduces the art of electronics to the art of interfacing these integrated components. The practical knowledge required for that art can only be acquired by doing and not by reading. However, it takes a lot of knowledge to select the best integrated component for achieving a specific goal. Such knowledge is provided in this book. By using a holistic approach in the understanding of the various circuits and by taking ample advantage of the duality between the electrical quantities voltage and current, the understanding of the properties of electronic circuits is made easier. Besides, this approach reduces the amount of mathematics needed for a deeper understanding. Thus, this book is appropriate for scholars at the advanced undergraduate level. In particular, the important aspects of positive and negative feedback in circuits are presented in a compact way by introducing the reverse closed-loop-gain. It is quite clear that a single book cannot cover all aspects of both analog and digital electronics, the latter comprising all circuits needed for data manipulation in digital computers- which is a field in itself.

In this book new experimental investigations of properties of Josephson junctions and systems are explored with the help of recent developments in superconductivity. The theory of the Josephson effect is presented taking into account the influence of multiband and anisotropy effects in new superconducting compounds. Anharmonicity effects in current-phase relation on Josephson junctions dynamics are discussed. Recent studies in analogue and digital superconductivity electronics are presented. Topics of special interest include resistive single flux quantum logic in digital electronics. Application of Josephson junctions in quantum computing as superconducting quantum bits are analyzed. Particular attention is given to understanding chaotic behaviour of Josephson junctions and systems. The book is written for graduate students and researchers in the field of applied superconductivity.