This book contains a selection of papers presented at the 16th AISEM ( Associazione Italiana Sensori e Microsistemi ) National Conference on Sensors and Microsystems, held in Rome 7-9 February 2011. The conference highlighted updated results from both theoretical and applied research in the field of sensors and microsystems. This book presents material in an interdisciplinary approach, covering many aspects of the disciplines related to sensors and microsystems, including physics, chemistry, materials science, biology and applications.

This book provides students and practicing chip designers with an easy-to-follow yet thorough, introductory treatment of the most promising emerging memories under development in the industry. Focusing on the chip designer rather than the end user, this book offers expanded, up-to-date coverage of emerging memories circuit design. After an introduction on the old solid-state memories and the fundamental limitations soon to be encountered, the working principle and main technology issues of each of the considered technologies (PCRAM, MRAM, FeRAM, ReRAM) are reviewed and a range of topics related to design is explored: the array organization, sensing and writing circuitry, programming algorithms and error correction techniques are reviewed comparing the approach followed and the constraints for each of the technologies considered. Finally the issue of radiation effects on memory devices has been briefly treated. Additionally some considerations are entertained about how emerging memories can find a place in the new memory paradigm required by future electronic systems. This book is an up-to-date and comprehensive introduction for students in courses on memory circuit design or advanced digital courses in VLSI or CMOS circuit design. It also serves as an essential, one-stop resource for academics, researchers and practicing engineers.

In Security Trends for FPGA's the authors present an analysis of current threats against embedded systems and especially FPGAs. They discuss about requirements according to the FIPS standard in order to build a secure system. This point is of paramount importance as it guarantees the level of security of a system. Also highlighted are current vulnerabilities of FPGAs at all the levels of the security pyramid. It is essential from a design point of view to be aware of all the levels in order to provide a comprehensive solution. The strength of a system is defined by its weakest point; there is no reason to enhance other protection means, if the weakest point remains untreated. Many severe attacks have considered this weakness in order not to face brute force attack complexity. Several solutions are proposed in Security Trends for FPGA's especially at the logical, architecture and system levels in order to provide a global solution.

Mechanical stress affects the magnitude of base-emitter voltages of forward biased bipolar transistors. This phenomenon is called the piezojunction effect. The piezojunction effect is the main cause of inaccuracy and drift in integrated temperature sensors and bandgap voltage references. The aim of The Piezojunction Effect in Silicon Integrated Circuits and Sensors is twofold. Firstly, to describe techniques that can reduce the mechanical-stress-induced inaccuracy and long-term instability. Secondly, to show, that the piezojunction effect can be applied for new types of mechanical-sensor structures. During IC fabrication and packaging thermo-mechanical stress is induced, when the packaged chips cool down to the temperature of application. The piezojunction effect is caused by a stress-induced change in the conductivity of the minority-charge carriers, while the piezoresistive effect is caused by a similar effect for the majority-charge carriers. To characterise the anisotropic piezojunction effect, the authors performed systematic investigations over wide ranges of mechanical stress and temperature. The experiments have been performed for various crystal and stress orientations. The experimental results have been used to extract the first- and second-order piezojunction (FOPJ and SOPJ) coefficients for bipolar transistors. It is shown how the knowledge of the piezojunction and piezoresistive coefficients can used to minimize the undesirable mechanical-stress effects on the electrical characteristics of transistors and resistors, respectively. Devices with lower mechanical-stress sensitivity can be found by comparing their piezo-coefficients. The layout of the device can also be optimized to reduce the mechanical-stress sensitivity. As a next step it is shown, how the knowledge of the piezo-effects on device level can be used to predict and to reduce their negative influence on circuit level. This is demonstrated for a number of important basic circuits, including translinear circuits, temperature transducers and bandgap references. Finally, it is shown how the piezojunction effect can be used to fabricate stress-sensing elements. It appears that, in comparison with resistive stress-sensing elements, the piezojunction sensors have the advantage of a smaller size and very low power dissipation.

This is the third edition of the European Workshop on Microelectronics Education (EWME). A steady-state regime has now been reached. An international community of university teachers is constituted; they exchange their experience and their pedagogical tools. They discuss the best ways to transfer the rapidly changing techniques to their students, and to introduce them to the new physical and mathematical concepts and models for the innovative techniques, devices, circuits and design methods. The number of abstracts submitted to EWME 2000 (about one hundred) enabled the scientific committee to proceed to a clear selection. EWME is a European meeting. Indeed, authors from 20 different European countries contribute to this volume. Nevertheless, the participation of authors from Brazil, Canada, China, New Zealand, and USA, shows that the workshop gradually attains an international dimension. th The 20 century can be characterized as the "century of electron." The electron, as an elementary particle, was discovered by J.J. Thomson in 1897, and was rapidly used to transfer energy and information. Thanks to electron, universe and micro-cosmos could be explored. Electron became the omnipotent and omnipresent, almost immaterial, angel of our W orId. This was made possible thanks to electronics and, for the last 30 years, to microelectronics. Microelectronics not only modified and even radically transformed the industrial and the every-day landscapes, but it also led to the so-called "information revolution" with which begins the 21 st century.

Microprocessors increasingly control and monitor our most critical systems, including automobiles, airliners, medical systems, transportation grids, and defense systems. The relentless march of semiconductor process technology has given engineers exponentially increasing transistor budgets at constant recurring cost. This has encouraged increased functional integration onto a single die, as well as increased architectural sophistication of the functional units themselves. Additionally, design cycle times are decreasing, thus putting increased schedule pressure on engineers. Not surprisingly, this environment has led to a number of uncaught design flaws. Traditional simulation-based design verification has not kept up with the scale or pace of modern microprocessor system design. Formal verification methods offer the promise of improved bug-finding capability, as well as the ability to establish functional correctness of a detailed design relative to a high-level specification. However, widespread use of formal methods has had to await breakthroughs in automated reasoning, integration with engineering design languages and processes, scalability, and usability.

This book presents several breakthrough design and verification techniques that allow these powerful formal methods to be employed in the real world of high-assurance microprocessor system design.

This book serves as a reference for researchers and designers in Embedded Systems who need to explore design alternatives. It provides a design space exploration methodology for the analysis of system characteristics and the selection of the most appropriate architectural solution to satisfy requirements in terms of performance, power consumption, number of required resources, etc. Coverage focuses on the design of complex multimedia applications, where the choice of the optimal design alternative in terms of application/architecture pair is too complex to be pursued through a full search comparison, especially because of the multi-objective nature of the designer 's goal, the simulation time required and the number of parameters of the multi-core architecture to be optimized concurrently.

This book shows designers how to ensure signal integrity and control noise in high-speed digital systems - particularly important in a Pentium-paced environment where functional logic design is no longer separable from electrical and mechanical design. Highlighting TTL, CMOS, and BiCMOS logic applications in a single source, Signal and Power Integrity in Digital Systems provides a practical solutions-oriented approach to a wide variety of relevant interconnection and timing issues. Special features include noise tolerant logic architectures; power distribution techniques that reduce noise; clock distribution techniques that ensure clock signal quality; signal interconnection techniques that reduce crosstalk, signal loading, and transmission-line effects; how to get optimum performance from high-speed memory devices; and system application tips for high-speed PALs, PLAs, FIFOs, and ASICs. Designers will also appreciate the practical engineering approximations provided for the calculation of design parameters along with illustrations and numerous tables usable for quick reference and comparison of characteristics. It's a book every digital designer should have - engineers involved in the design of computers, peripherals, signal processors, and control and communications equipment, as well as young engineers facing their first designs using high-speed logic devices.

Many systems, devices and appliances used routinely in everyday life, ranging from cell phones to cars, contain significant amounts of software that is not directly visible to the user and is therefore called "embedded." For coordinating the various software components and allowing them to communicate with each other, support software is needed, called an operating system (OS). Because embedded software must function in real time (RT), a RTOS is needed. This book describes a formally developed, network-centric Real-Time Operating System, OpenComRTOS. One of the first in its kind, OpenComRTOS was originally developed to verify the usefulness of formal methods in the context of embedded software engineering. Using the formal methods described in this book produces results that are more reliable while delivering higher performance. The result is a unique real-time concurrent programming system that supports heterogeneous systems with just 5 Kbytes/node. It is compatible with safety related engineering standards, such as IEC61508.

This volume of Analog Circuit Design concentrates on 3 topics: High-Speed Analog-to-Digital Converters, Mixed Signal Design and PLLs and Synthesizers. The book comprises 6 papers on each topic written by internationally recognized experts. These papers have a tutorial nature aimed at improving the design of analog circuits. The book is divided into 3 parts: Part I, High-Speed Analog-to-Digital Converters, describes the latest techniques for producing analog-to-digital converters for applications in disk drives, radio circuits, XDSL and super HiFi audio conversion. Converters having resolutions between 7-bit and 12-bit using CMOS techniques are presented. A 13-bit bandpass sigma-delta modulator for IF signal conversion concludes this part. Part II, Mixed Signal Design, presents papers that detail nearly all known techniques and design issues for mixed signal circuits using CAD tools. Applications for telecom, sigma-delta converters, systems-on-a-chip and RF circuitry are described. Part III, PLLs and Synthesizers, illustrates up-to-date techniques for combination of inductors on a CMOS chip together with PLL techniques to obtain low-noise frequency synthesizers for telecom applications. Special attention is paid to fractional N synthesizers using sigma-delta algorithms. Analog Circuit Design is an essential reference source for analog design engineers and researchers wishing to keep abreast with the latest developments in the field. The tutorial nature of the contributions also makes it suitable for use in an advanced design course.

MEMS (microelectromechanical systems) for RF (radio frequency)/wireless applications is the technological engine enabling the next wave in even smaller, more sophisticated wireless products than those in use right now. MEMS is an exciting young technology and this is the first comprehensive book to address the design of RF MEMS-based circuits for use in high performance wireless systems. This groundbreaking book enables professionals to understand the realm of applications of RF MEMS technology; become knowledgeable of the wide variety and performance levels of RF MEMS devices; and design the architecture of wireless systems to achieve greater system performance with lower power requirements.

This timely volume covers issues and topics in a systematic way that quickly brings engineers up to speed with this technology. What's more, the book features exercises and detailed case studies on working RF MEMS circuits that will help practitioners decide what approaches best fit their design constraints.

This book describes a communication paradigm that could shape the future of wireless communication networks, Opportunistic Spectrum Access (OSA) in Cognitive Radio Networks (CRN). While several theoretical OSA approaches have been proposed, they are challenged by the practical limitations of cognitive radios: the key enabling technology of OSA. This book presents an unprecedented formulation of the OSA problem in CNR that takes into account the practical limitations encountered due to existing technologies. Based on such a problem formulation, this book presents a framework and protocol details implementing the analytically-optimized solution of this problem. Unlike the state-of-the-art of CRN implementations that typically target software define radios which are not suitable for real systems, this book describes the implementation of distributed OSA, using practical radio transceiver technologies. It provides a thorough characterization of the gains available to theoretical OSA approaches if the practical limitations are taken into consideration.

Tackles the cognitive radio networks performance optimization problem, taking into account the practical limitations of today s technologies;Provides thorough performance evaluation in arbitrary, large-scale networks, as well as microscopic, small-scale performance evaluation, using realistic hardware implementation;Presents an empirical study of the gains available over existing techniques by adopting practical approaches;Tackles the cognitive radio networks performance optimization problem, taking into account the practical limitations of today s technologies;Provides thorough performance evaluation in arbitrary, large-scale networks, as well as microscopic, small-scale performance evaluation, using realistic hardware implementation;Presents an empirical study of the gains available over existing techniques by adopting practical approaches;"

Power Aware Design Methodologies is on power-awareness in design. The difference between low-power design and power-awareness in design is that whereas low-power design refers to minimizing power with or without a performance constraint, power-aware design refers to maximizing some other performance metric, subject to a power budget (even while reducing power dissipation).

Power Aware Design Methodologies was conceived as an effort to bring all aspects of power-aware design methodologies together in a single document. It covers several layers of the design hierarchy from technology, circuit logic, and architectural levels up to the system layer. It includes discussion of techniques and methodologies for improving the power efficiency of CMOS circuits (digital and analog), systems on chip, microelectronic systems, wirelessly networked systems of computational nodes and so on. In addition to providing an in-depth analysis of the sources of power dissipation in VLSI circuits and systems and the technology and design trends, this book provides a myriad of state-of-the-art approaches to power optimization and control.

The different chapters of Power Aware Design Methodologies have been written by leading researchers and experts in their respective areas. Contributions are from both academia and industry. The contributors have reported the various technologies, methodologies, and techniques in such a way that they are understandable and useful to the circuit and system designers, tool developers, and academic researchers and students.

Power Aware Design Methodologies is written for the design professional and can be used as a textbook for an advanced course on power-aware designmethodologies.

Analog Signal Generation for Built-In-Self-Test (BIST) of Mixed-Signal Integrated Circuits is a concise introduction to a powerful new signal generation technique. The book begins with a brief introduction to the testing problem and a review of conventional signal generation techniques. The book then describes an oversampling-based oscillator capable of generating high-precision analog tones using a combination of digital logic and D/A conversion. These concepts are then extended to multi-tone testing schemes without introducing a severe hardware penalty. The concepts are extended further to encompass piece-wise linear waveforms such as square, triangular and sawtooth waves. Experimental results are presented to verify the ideas in each chapter and finally, conclusions are drawn. For those readers unfamiliar with delta-sigma modulation techniques, a brief introduction to this subject is also provided in an appendix. The book is ideal for test engineers, researchers and circuits designers with an interest in IC testing methods.

Circuit simulation has become an essential tool in circuit design and without it's aid, analogue and mixed-signal IC design would be impossible. However the applicability and limitations of circuit simulators have not been generally well understood and this book now provides a clear and easy to follow explanation of their function. The material covered includes the algorithms used in circuit simulation and the numerical techniques needed for linear and non-linear DC analysis, transient analysis and AC analysis. The book goes on to explain the numeric methods to include sensitivity and tolerance analysis and optimisation of component values for circuit design. The final part deals with logic simulation and mixed-signal simulation algorithms. There are comprehensive and detailed descriptions of the numerical methods and the material is presented in a way that provides for the needs of both experienced engineers who wish to extend their knowledge of current tools and techniques, and of advanced students and researchers who wish to develop new simulators.

This volume describes the design of relay-based circuit systems from device fabrication to circuit micro-architectures. This book is ideal for both device engineers as well as circuit system designers, and highlights the importance of co-design across design hierarchies when trying to optimize system performance (in this case, energy-efficiency). The book will also appeal to researchers and engineers focused on semiconductor, integrated circuits, and energy efficient electronics.

CMOS DC-DC Converters aims to provide a comprehensive dissertation on the matter of monolithic inductive Direct-Current to Direct-Current (DC-DC) converters. For this purpose seven chapters are defined which will allow the designer to gain specific knowledge on the design and implementation of monolithic inductive DC-DC converters, starting from the very basics.

The design of asynchronous circuits is increasingly important in solving problems such as complexity management, modularity, power consumption and clock distribution in large digital integrated circuits. Since the second half of the 1980s asynchronous circuits have been the subject of a great deal of research following a period of relative oblivion. The lack of interest in asynchronous techniques was motivated by the progressive shift towards synchronous design techniques that had much more structure and were much easier to verify and synthesize. System design requirements made it impossible to totally eliminate the use of asynchronous circuits. Given the objective difficulty encountered by designers, the asynchronous components of electronic systems, such as interfaces, became a serious bottleneck in the design process. The use of new models and some theoretical breakthroughs made it possible to develop asynchronous design techniques that were reliable and effective. Algorithms for Synthesis and Testing of Asynchronous Circuits describes a variety of mathematical models and of algorithms that form the backbone and the body of a new design methodology for asynchronous design. The book is intended for asynchronous hardware designers, for computer-aided tool experts, and for digital designers interested in exploring the possibility of designing asynchronous circuits. It requires a solid mathematical background in discrete event systems and algorithms. While the book has not been written as a textbook, it could nevertheless be used as a reference book in an advanced course in logic synthesis or asynchronous design. Algorithms for Synthesis and Testing of Asynchronous Circuits also includesan extensive literature review, which summarizes and compares classical papers from the 1960s with the most recent developments in the areas of asynchronous circuit design testing and verification. The validity and utility of employment tests have become entangled in the debate over the 1991 Civil Rights Bill. Worried about compliance with new federal guidelines for test validity, and concerned about possible lawsuits, the business world became wary of pre-employment testing in the early 1980s, but the use of employment testing increased throughout that decade.

This book investigates the susceptibility of intrinsic physically unclonable function (PUF) implementations on reconfigurable hardware to optical semi-invasive attacks from the chip backside. It explores different classes of optical attacks, particularly photonic emission analysis, laser fault injection, and optical contactless probing. By applying these techniques, the book demonstrates that the secrets generated by a PUF can be predicted, manipulated or directly probed without affecting the behavior of the PUF. It subsequently discusses the cost and feasibility of launching such attacks against the very latest hardware technologies in a real scenario. The author discusses why PUFs are not tamper-evident in their current configuration, and therefore, PUFs alone cannot raise the security level of key storage. The author then reviews the potential and already implemented countermeasures, which can remedy PUFs' security-related shortcomings and make them resistant to optical side-channel and optical fault attacks. Lastly, by making selected modifications to the functionality of an existing PUF architecture, the book presents a prototype tamper-evident sensor for detecting optical contactless probing attempts.

The motivation for starting the work described in this book was the interest that Hewlett-Packard's microwave circuit designers had in simulation techniques that could tackle the problem of finding steady state solutions for nonlinear circuits, particularly circuits containing distributed elements such as transmission lines. Examining the problem of computing steady-state solutions in this context has led to a collection of novel numerical algorithms which we have gathered, along with some background material, into this book. Although we wished to appeal to as broad an audience as possible, to treat the subject in depth required maintaining a narrow focus. Our compromise was to assume that the reader is familiar with basic numerical methods, such as might be found in [dahlquist74] or [vlach83], but not assume any specialized knowledge of methods for steady-state problems. Although we focus on algorithms for computing steady-state solutions of analog and microwave circuits, the methods herein are general in nature and may find use in other disciplines. A number of new algorithms are presented, the contributions primarily centering around new approaches to harmonic balance and mixed frequency-time methods. These methods are described, along with appropriate background material, in what we hope is a reasonably satisfying blend of theory, practice, and results. The theory is given so that the algorithms can be fully understood and their correctness established.

The tremendous growth in wireless and mobile communications has placed stringent requirements on channel spacing and, by implication, on the phase noise of oscillators. Compounding the challenge has been a recent drive toward implementations of transceivers in CMOS, whose inferior l/f noise performance has usually been thought to disqualify it from use in all but the lowest-performance oscillators. Low noise oscillators are also highly desired in the digital world. The continued drive toward higher clock frequencies translates into a demand for ever-decreasing jitter. There is a need for a deep understanding of the fundamental mechanisms governing the process by which device, substrate, and supply noise turn into jitter and phase noise. Existing models generally offer only qualitative insights, however, and it has not always been clear why they are not quantitatively correct. The Design of Low Noise Oscillators offers a new time-variant phase noise model. By discarding the implicit assumption of time- invariance underlying many other approaches, this model is capable of making quantitative predictions of the phase noise and jitter of different types of oscillators. It is able to attribute a definite amount of phase noise to every noise source in the circuit. Because of its time-variant nature, the model also takes into account the effect of cyclostationary noise sources in a natural way. It details the precise mechanism by which low frequency noise, such as l/f noise, upconverts into close-in phase noise. An important new understanding is that rise and fall time symmetry controls such upconversion. More important, it suggests practical methods for suppressing this upconversion, so thatgood oscillators can be built in technologies with notoriously poor l/f noise performance (such as CMOS or GaAs MESFET). The Design of Low Noise Oscillators will be of interest to both analog and digital circuit as well as RF circuit designers.

This book illustrates a variety of circuit designs on plastic foils and provides all the information needed to undertake successful designs in large-area electronics. The authors demonstrate architectural, circuit, layout, and device solutions and explain the reasons and the creative process behind each. Readers will learn how to keep under control large-area technologies and achieve robust, reliable circuit designs that can face the challenges imposed by low-cost low-temperature high-throughput manufacturing.

Log-domain and translinear filters provide a competitive alternative to the challenges of ever increasing low-voltage, low-power and high frequency demands in the area of continuous-time filters. Since translinear filters are fundamentally large-signal linear, they are capable of realizing a large dynamic range in combination with excellent tunability characteristics. Large-signal linearity is achieved by exploiting the accurate exponential behavior of the bipolar transistor or the subthreshold MOS transistor. A generalization of the dynamic translinear principle exploiting the square law behavior of the MOS transistor is theoretically possible, but not practically relevant. Translinear and log-domain filters are based on the dynamic translinear principle, a generalization of the conventional (static) translinear principle. Besides their application for linear filters, dynamic translinear circuits can also be used for the realization of non-linear dynamic functions, such as oscillators, RMS-DC converters and phase-locked loops. Dynamic Translinear and Log-Domain Circuits: Analysis and Synthesis covers both the analysis and synthesis of translinear circuits. The theory is presented using one unifying framework for both static and dynamic translinear networks, which is based on a current-mode approach. General analysis methods are presented, including the large-signal and non-stationary analysis of noise. A well-structured synthesis method is described greatly enhancing the designability of log-domain and translinear circuits. Comparisons are made with respect to alternative analysis and synthesis methods presented in the literature. The theory is illustrated and verified by various examples and realizations. Dynamic Translinear and Log-Domain Circuits: Analysis and Synthesis is an excellent reference for researchers and circuit designers, and may be used as a text for advanced courses on the topic.

Adaptive filtering is commonly used in many communication applications including speech and video predictive coding, mobile radio, ISDN subscriber loops, and multimedia systems. Existing adaptive filtering topologies are non-concurrent and cannot be pipelined. Pipelined Adaptive Digital Filters presents new pipelined topologies which are useful in reducing area and power and in increasing speed. If the adaptive filter portion of a system suffers from a power-speed-area bottleneck, a solution is provided. Pipelined Adaptive Digital Filters is required reading for all users of adaptive digital filtering algorithms. Algorithm, application and integrated circuit chip designers can learn how their algorithms can be tailored and implemented with lower area and power consumption and with higher speed. The relaxed look-ahead techniques are used to design families of new topologies for many adaptive filtering applications including least mean square and lattice adaptive filters, adaptive differential pulse code modulation coders, adaptive differential vector quantizers, adaptive decision feedback equalizers and adaptive Kalman filters. Those who use adaptive filtering in communications, signal and image processing algorithms can learn the basis of relaxed look-ahead pipelining and can use their own relaxations to design pipelined topologies suitable for their applications. Pipelined Adaptive Digital Filters is especially useful to designers of communications, speech, and video applications who deal with adaptive filtering, those involved with design of modems, wireless systems, subscriber loops, beam formers, and system identification applications. This book can also be used as a text for advanced courses on the topic.