This book presents a new exploration environment for mesh-based, heterogeneous FPGA architectures. It describes state-of-the-art techniques for reducing area requirements in FPGA architectures, which also increase performance and enable reduction in power required. Coverage focuses on reduction of FPGA area by introducing heterogeneous hard-blocks (such as multipliers, adders etc) in FPGAs, and by designing application specific FPGAs. Automatic FPGA layout generation techniques are employed to decrease non-recurring engineering (NRE) costs and time-to-market of application-specific, heterogeneous FPGA architectures.

In three main divisions the book covers combinational circuits, latches, and asynchronous sequential circuits. Combinational circuits have no memorising ability, while sequential circuits have such an ability to various degrees. Latches are the simplest sequential circuits, ones with the shortest memory. The presentation is decidedly non-standard. The design of combinational circuits is discussed in an orthodox manner using normal forms and in an unorthodox manner using set-theoretical evaluation formulas relying heavily on Karnaugh maps. The latter approach allows for a new design technique called composition. Latches are covered very extensively. Their memory functions are expressed mathematically in a time-independent manner allowing the use of (normal, non-temporal) Boolean logic in their calculation. The theory of latches is then used as the basis for calculating asynchronous circuits. Asynchronous circuits are specified in a tree-representation, each internal node of the tree representing an internal latch of the circuit, the latches specified by the tree itself. The tree specification allows solutions of formidable problems such as algorithmic state assignment, finding equivalent states non-recursively, and verifying asynchronous circuits.

Radio-Frequency Microelectronic Circuits for Telecommunication Applications covers the design issues of radio-frequency microelectronic circuits for telecommunication applications with emphasis on devices and circuit-level design. It uses a large number of real examples from industrial design as a vehicle both to teach the principles and to ensure relevance starting from device level modeling to basic RF microelectronic circuit cell design. Modeling for high-frequency operation of both active and passive integrated devices is covered starting from the bipolar transistor to the MOS transistor to the modeling of integrated spiral inductors, resistors, capacitors, varactors and package parasitics structures. A chapter is also devoted to the presentation of the basic definitions and terminology used in RF IC design. The book continues with the presentation of the principal building blocks of an integrated RF front-end, namely, the LNA, the mixer, the VCO and integrated filters. Design paradigms are provided classified on the technology used in each case: pure bipolar, CMOS, BiCMOS or SiGe. Radio-Frequency Microelectronic Circuits for Telecommunication Applications is essential reading for all researchers, practising engineers and designers working in RF electronics. It is also a reference for use in advanced undergraduate or graduate courses in the same field.

A silicon compiler is a software system which can automatically generate an integrated circuit from a user's specification. Anatomy of a Silicon Compiler examines one such compiler in detail, covering the basic framework and design entry, the actual algorithms and libraries which are used, the approach to verification and testing, behavioral synthesis tools and several applications which demonstrate the system's capabilities.

Micro-electronics and so integrated circuit design are heavily driven by technology scaling. The main engine of scaling is an increased system performance at reduced manufacturing cost (per system). In most systems digital circuits dominate with respect to die area and functional complexity. Digital building blocks take full - vantage of reduced device geometries in terms of area, power per functionality, and switching speed. On the other hand, analog circuits rely not on the fast transition speed between a few discrete states but fairly on the actual shape of the trans- tor characteristic. Technology scaling continuously degrades these characteristics with respect to analog performance parameters like output resistance or intrinsic gain. Below the 100 nm technology node the design of analog and mixed-signal circuits becomes perceptibly more dif cult. This is particularly true for low supply voltages near to 1V or below. The result is not only an increased design effort but also a growing power consumption. The area shrinks considerably less than p- dicted by the digital scaling factor. Obviously, both effects are contradictory to the original goal of scaling. However, digital circuits become faster, smaller, and less power hungry. The fast switching transitions reduce the susceptibility to noise, e. g. icker noise in the transistors. There are also a few drawbacks like the generation of power supply noise or the lack of power supply rejection.

It is a great honor to provide an introduction for Dr. Frank Op 't Eynde's and Dr. Willy Sansen's book "Analog Interfaces for Digital Signal Processing Systems." The field of analog integrated circuit design is undergoing rapid evolution. The pervasiveness of digital processing has considerably modified the micro-system architectures: the analog part of complex mixed systems is more and more pushed at the boundary limits of the processing chain. Moreover, the increased performance of digital circuits, in terms of accuracy and speed, are making the specification requirements of analog circuits very strict. In addition to this, the technology, supply voltage and power consumption of analog circuits must be compatible with those, typical for digital circuits. Therefore, in a few words, analog circuits are becoming complex and specialised interfaces between the real world and digital signal processing domains. This technological evolution should be accompanied by an equivalently fast evolution in designer competencies. Knowledge of complicated signal handling should be quickly replaced by know-how of simple but very accurate and very fast signal processing and a solid background in data conversion techniques. All of this through the use of the CMOS (and possibly BiCMOS) technology.

Analog Circuit Design contains the contribution of 18 tutorials of the 20th workshop on Advances in Analog Circuit Design. Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 20 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of:
Topic 1: Low Voltage Low Power, chairman: Andrea Baschirotto
Topic 2: Short Range Wireless Front-Ends, chairman: Arthur van Roermund
Topic 3: Power Management and DC-DC, chairman: Michiel Steyaert.
Analog Circuit Design is an essential reference source for analog circuit designers and researchers wishing to keep abreast with the latest development in the field. The tutorial coverage also makes it suitable for use in an advanced design course.

Optimum envelope-constrained filter design is concerned with time-domain synthesis of a filter such that its response to a specific input signal stays within prescribed upper and lower bounds, while minimizing the impact of input noise on the filter output or the impact of the shaped signal on other systems depending on the application. In many practical applications, such as in TV channel equalization, digital transmission, and pulse compression applied to radar, sonar and detection, the soft least square approach, which attempts to match the output waveform with a specific desired pulse, is not the most suitable one. Instead, it becomes necessary to ensure that the response stays within the hard envelope constraints defined by a set of continuous inequality constraints. The main advantage of using the hard envelope-constrained filter formulation is that it admits a whole set of allowable outputs. From this set one can then choose the one which results in the minimization of a cost function appropriate to the application at hand. The signal shaping problems so formulated are semi-infinite optimization problems. This monograph presents in a unified manner results that have been generated over the past several years and are scattered in the research literature. The material covered in the monograph includes problem formulation, numerical optimization algorithms, filter robustness issues and practical examples of the application of envelope constrained filter design. Audience: Postgraduate students, researchers in optimization and telecommunications engineering, and applied mathematicians.

This book describes ultra low power capacitive sensor interfaces, and presents the realization of a very low power generic sensor interface chip that is adaptable to a broad range of capacitive sensors. The book opens by reviewing important design aspects for autonomous sensor systems, discusses different building blocks, and presents the modular architecture for the generic sensor interface chip. Finally, the generic sensor interface chip is shown in state-of-the-art applications.

On any advanced integrated circuit or "system-on-chip" there is a need for security. In many applications the actual implementation has become the weakest link in security rather than the algorithms or protocols. The purpose of the book is to give the integrated circuits and systems designer an insight into the basics of security and cryptography from the implementation point of view. As a designer of integrated circuits and systems it is important to know both the state-of-the-art attacks as well as the countermeasures. Optimizing for security is different from optimizations for speed, area, or power consumption. It is therefore difficult to attain the delicate balance between the extra cost of security measures and the added benefits.

This book describes the design of optical receivers that use the most economical integration technology, while enabling performance that is typically only found in very expensive devices. To achieve this, all necessary functionality, from light detection to digital output, is integrated on a single piece of silicon. All building blocks are thoroughly discussed, including photodiodes, transimpedance amplifiers, equalizers and post amplifiers.

This reference is for anyone involved with microwave design. It tackles the practical aspects of microwave statistical design and introduces statistical design techniques that encompass many different applications. This presentation focuses on two main example areas - microwave circuits and systems - but any application with a complex relation between design variables and performance and design variable uncertainty can benefit from statistical design.

This book will introduce various power management integrated circuits (IC) design techniques to build future energy-efficient "green" electronics. The goal is to achieve high efficiency, which is essential to meet consumers' growing need for longer battery lives. The focus is to study topologies amiable for full on-chip implementation (few external components) in the mainstream CMOS technology, which will reduce the physical size and the manufacturing cost of the devices.

From the Foreword..... Modern digital signal processing applications provide a large challenge to the system designer. Algorithms are becoming increasingly complex, and yet they must be realized with tight performance constraints. Nevertheless, these DSP algorithms are often built from many constituent canonical subtasks (e.g., IIR and FIR filters, FFTs) that can be reused in other subtasks. Design is then a problem of composing these core entities into a cohesive whole to provide both the intended functionality and the required performance. In order to organize the design process, there have been two major approaches. The top-down approach starts with an abstract, concise, functional description which can be quickly generated. On the other hand, the bottom-up approach starts from a detailed low-level design where performance can be directly assessed, but where the requisite design and interface detail take a long time to generate. In this book, the authors show a way to effectively resolve this tension by retaining the high-level conciseness of VHDL while parameterizing it to get good fit to specific applications through reuse of core library components. Since they build on a pre-designed set of core elements, accurate area, speed and power estimates can be percolated to high- level design routines which explore the design space. Results are impressive, and the cost model provided will prove to be very useful. Overall, the authors have provided an up-to-date approach, doing a good job at getting performance out of high-level design. The methodology provided makes good use of extant design tools, and is realistic in terms of the industrial design process. The approach is interesting in its own right, but is also of direct utility, and it will give the existing DSP CAD tools a highly competitive alternative. The techniques described have been developed within ARPAs RASSP (Rapid Prototyping of Application Specific Signal Processors) project, and should be of great interest there, as well as to many industrial designers. Professor Jonathan Allen, Massachusetts Institute of Technology

For the first time in book form, this comprehensive and systematic monograph presents the methods for the reversible synthesis of logic functions and circuits. This methodology offers designers the capability to solve major problems in system design now and in the future, such as the high rate of power consumption, and the emergence of quantum effects for highly dense ICs. The challenge addressed here is to design reliable systems that consume as little power as possible and in which the signals are processed and transmitted at very high speeds with very high signal integrity. Researchers in academia or industry and graduate students, who work in logic synthesis, computer design, computer-aided design tools, and low power VLSI circuit design, will find this book a valuable resource.

This book covers recent advances in the field of logic synthesis and design, including Boolean Matching, Logic Decomposition, Boolean satisfiability, Advanced Synthesis Techniques and Applications of Logic Design. All of these topics are valuable to CAD engineers working in Logic Design, Logic Optimization, and Verification. Engineers seeking opportunities for optimizing VLSI integrated circuits will find this book as an invaluable reference, since there is no existing book that covers this material in a systematic fashion.

This book covers essential topics in the architecture and design of Internet of Things (IoT) systems. The authors provide state-of-the-art information that enables readers to design systems that balance functionality, bandwidth, and power consumption, while providing secure and safe operation in the face of a wide range of threat and fault models. Coverage includes essential topics in system modeling, edge/cloud architectures, and security and safety, including cyberphysical systems and industrial control systems.

Nineteen experts from the electronics industry, research institutes and universities have joined forces to prepare this book. Vacuum Electronics covers the electrophysical fundamentals, the present state of the art and applications, as well as the future prospects of microwave tubes and systems, optoelectronics vacuum devices, electron and ion beam devices, light and X-ray emitters, particle accelerators and vacuum interrupters. These topics are supplemented by useful information about the materials and technologies of vacuum electronics and vacuum technology."

The second of two volumes, this is a comprehensive treatment of nonlinear circuits, introducing the advanced topics that professionals need to understand for their RF (radio frequency) circuit design work. It presents an introduction to active RF devices and their modelling, and explores nonlinear circuit simulation techniques. Design techniques are addressed for RF transistor amplifiers, oscillators, mixers and frequency multipliers. This reference concludes with an in-depth look at circuits in systems and their radio system applications, illustrating how the components are interconnected to complete a system that meets the necessary specifications.

Synthesis of Finite State Machines: Functional Optimization is one of two monographs devoted to the synthesis of Finite State Machines (FSMs). This volume addresses functional optimization, whereas the second addresses logic optimization. By functional optimization here we mean the body of techniques that: compute all permissible sequential functions for a given topology of interconnected FSMs, and select a best' sequential function out of the permissible ones. The result is a symbolic description of the FSM representing the chosen sequential function. By logic optimization here we mean the steps that convert a symbolic description of an FSM into a hardware implementation, with the goal to optimize objectives like area, testability, performance and so on. Synthesis of Finite State Machines: Functional Optimization is divided into three parts. The first part presents some preliminary definitions, theories and techniques related to the exploration of behaviors of FSMs. The second part presents an implicit algorithm for exact state minimization of incompletely specified finite state machines (ISFSMs), and an exhaustive presentation of explicit and implicit algorithms for the binate covering problem. The third part addresses the computation of permissible behaviors at a node of a network of FSMs and the related minimization problems of non-deterministic finite state machines (NDFSMs). Key themes running through the book are the exploration of behaviors contained in a non-deterministic FSM (NDFSM), and the representation of combinatorial problems arising in FSM synthesis by means of Binary Decision Diagrams (BDDs). Synthesis of Finite State Machines: Functional Optimization will be of interest to researchers and designers in logic synthesis, CAD and design automation.

When you see a nicely presented set of data, the natural response is: "How did they do that; what tricks did they use; and how can I do that for myself?" Alas, usually, you must simply keep wondering, since such tricks-of- the-trade are usually held close to the vest and rarely divulged. Shamefully ignored in the technical literature, measurement and modeling of high-speed semiconductor devices is a fine art. Robust measuring and modeling at the levels of performance found in modern SiGe devices requires extreme dexterity in the laboratory to obtain reliable data, and then a valid model to fit that data.

Drawn from the comprehensive and well-reviewed "Silicon Heterostructure Handbook," this volume focuses on measurement and modeling of high-speed silicon heterostructure devices. The chapter authors provide experience-based tricks-of-the-trade and the subtle nuances of measuring and modeling advanced devices, making this an important reference for the semiconductor industry. It includes easy-to-reference appendices covering topics such as the properties of silicon and germanium, the generalized Moll-Ross relations, the integral charge-control model, and sample SiGe HBT compact model parameters.

Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called "scaling," has highlighted serious advantages as integration density, speed, power consumption, functionality and cost. Direct consequence was the decrease of cost-per-function, so the electronic productivity has largely progressed in this period. Another usually cited trend is the evolution of the in- gration density as expressed by the well-know Moore's Law in 1975: the number of devices per chip doubles every 2 years. This evolution has allowed improving signi?cantly the circuit complexity, offering a great computing power in the case of microprocessor, for example. However, since few years, signi?cant issues appeared such as the increase of the circuit heating, device complexity, variability and dif?culties to improve the integration density. These new trends generate an important growth in development and production costs. Though is it, since 40 years, the evolution of the microelectronics always f- lowed the Moore's law and each dif?culty has found a solution.

SiGe HBTs are the most mature of the Si heterostructure devices and not surprisingly the most completely researched and discussed in the technical literature. However, new effects and nuances of device operation are uncovered year-after-year as transistor scaling advances and application targets march steadily upward in frequency and sophistication. Providing a comprehensive treatment of SiGe HBTs, Silicon Heterostructure Devices covers an amazingly diverse set of topics, ranging from basic transistor physics to noise, radiation effects, reliability, and TCAD simulation.

Drawn from the comprehensive and well-reviewed "Silicon Heterostructure Handbook," this text explores SiGe heterojunction bipolar transistors (HBTs), heterostructure FETs, various other heterostructure devices, as well as optoelectronic components. The book provides an overview, characteristics, and derivative applications for each device covered. It discusses device physics, broadband noise, performance limits, reliability, engineered substrates, and self-assembling nanostructures. Coverage of optoelectronic devices includes Si/SiGe LEDs, near-infrared detectors, photonic transistors for integrated optoelectronics, and quantum cascade emitters. In addition to this substantial collection of material, the book concludes with a look at the ultimate limits of SiGe HBTs scaling. It contains easy-to-reference appendices on topics including the properties of silicon and germanium, the generalized Moll-Ross relations, and the integral charge-control model, and sample SiGe HBT compact model parameters.