The appropriate interconnect model has changed several times over the past two decades due to the application of aggressive technology scaling. New, more accurate interconnect models are required to manage the changing physical characteristics of integrated circuits. Currently, RC models are used to analyze high resistance nets while capacitive models are used for less resistive interconnect. However, on-chip inductance is becoming more important with integrated circuits operating at higher frequencies, since the inductive impedance is proportional to the frequency. The operating frequencies of integrated circuits have increased dramatically over the past decade and are expected to maintain the same rate of increase over the next decade, approaching 10 GHz by the year 2012. Also, wide wires are frequently encountered in important global nets, such as clock distribution networks and in upper metal layers, and performance requirements are pushing the introduction of new materials for low resistance interconnect, such as copper interconnect already used in many commercial CMOS technologies. On-Chip Inductance in High Speed Integrated Circuits deals with the design and analysis of integrated circuits with a specific focus on on-chip inductance effects. It has been described throughout this book that inductance can have a tangible effect on current high speed integrated circuits. For example, neglecting inductance and using an RC interconnect model in a production 0.25 mum CMOS technology can cause large errors (over 35%) in estimates of the propagation delay of on-chip interconnect. It has also been shown that including inductance in the repeater insertion design process as compared to using an RC model improves the overall repeater solution in terms of area, power, and delay with average savings of 40.8%, 15.6%, and 6.7%, respectively. On-Chip Inductance in High Speed Integrated Circuits is full of design and analysis techniques for RLC interconnect. These techniques are compared to techniques traditionally used for RC interconnect design to emphasize the effect of inductance. On-Chip Inductance in High Speed Integrated Circuits will be of interest to researchers in the area of high frequency interconnect, noise, and high performance integrated circuit design.

This book arises from experience the authors have gained from years of work as industry practitioners in the field of Electronic System Level design (ESL). At the heart of all things related to Electronic Design Automation (EDA), the core issue is one of models: what are the models used for, what should the models contain, and how should they be written and distributed. Issues such as interoperability and tool transportability become central factors that may decide which ones are successful and those that cannot get sufficient traction in the industry to survive.

Through a set of real examples taken from recent industry experience, this book will distill the state of the art in terms of System-Level Design models and provide practical guidance to readers that can be put into use. This book is an invaluable tool that will aid readers in their own designs, reduce risk in development projects, expand the scope of design projects, and improve developmental processes and project planning.

The main focus of this book is to provide the reader with a deep understanding of modeling and design strategies of Current-Mode digital circuits, as well as to organize in a coherent manner all the original and powerful authorsa (TM) results in the domain of Current-Mode digital circuits.

Model and Design of Bipolar and MOS Current-Mode Logic includes bipolar Current-Mode digital circuits, which emerged as an approach to realize digital circuits with the highest speed, and CMOS Current-Mode digital circuits, which together with its speed performance has been rediscovered to allow logic gates implementations having the feature of low noise level generation.

Model and Design of Bipolar and MOS Current-Mode Logic allows the reader not only to understand the operating principle and the features of bipolar and MOS Current-Mode digital circuits, but also to design optimized digital gates. And, although the material is presented in a formal and theoretical manner, much emphasis is devoted to a design perspective. Moreover, to further link the booka (TM)s theoretical aspects with practical issues, and to provide the reader with an idea of the real order of magnitude involved assuming actual technologies, numerical examples together with SPICE simulations are included in the book.

Model and Design of Bipolar and MOS Current-Mode Logic can be used as a reference to practicing engineers working in this area and as text book to senior undergraduate, graduate and postgraduate students (already familiar with electronic circuits and logic gates) who want to extend their knowledge and cover all aspects of the analysis and design of Current-Mode digital circuits.

This book shows readers how to design semiconductor devices using the most common and lowest cost logic CMOS processes. Readers will benefit from the author's extensive, industrial experience and the practical approach he describes for designing efficiently semiconductor devices that typically have to be implemented using specialized processes that are expensive, time-consuming, and low-yield. The author presents an integrated picture of semiconductor device physics and manufacturing techniques, as well as numerous practical examples of device designs that are tried and true.

This book reveals why carbon is playing such an increasingly prominent role as a sensing material. The various steps that transform a raw material in a sensing device are thoroughly presented and critically discussed.The authors deal with all aspects of carbon-based sensors, starting from the various hybridization and allotropes of carbon, with specific focus on micro and nano sized carbons (e.g., carbon nanotubes, graphene) and their growth processes. The discussion then moves to the role of functionalization and the different routes to achieve it. Finally, a number of sensing applications in various fields are presented, highlighting the connection with the basic properties of the various carbon allotropes. Readers will benefit from this book s bottom-up approach, which starts from the local bonding in carbon solids and ends with sensing applications, linking the local hybridization of carbon atoms and its modification by functionalization to specific device performance. This book is a must-have in the library of any scientist involved in carbon based sensing application."

Oscilloscopes are essential tools for checking circuit operation and diagnosing faults, and an enormous range of models are available. But which is the right one for a particular application? Which features are essential and which not so important? Ian Hickman has the answers.
This handy guide to oscilloscopes is essential reading for anyone who has to use a 'scope for their work or hobby: electronics designers, technicians, anyone in industry involved in test and measurement, electronics enthusiasts... Ian Hickman's review of all the latest types of 'scope currently available will prove especially useful for anyone planning to buy - or even build - an oscilloscope.
The science and electronics of how oscilloscopes work is explained in order to enhance the reader's appreciation of how to use their 'scope. The practical use of oscilloscope is explained with clarity and supported with examples, encouraging the reader to think about the application of their oscilloscope and improve their use of this complex instrument.
The advance of digital technology makes this timely revision of Ian Hickman's well known book an essential update for electronics professionals and enthusiasts alike.
The only fully up-to-date guide to oscilloscopes available
A practical guide to getting the most out of an oscilloscope
Essential reading for anyone planning to invest in an expensive piece of equipment

Introduction The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as inter connect delay, noise and crosstalk, signal integrity, parasitics effects, and power dissipation, that invalidate the assumptions that form the basis of previous design methodologies and tools. This book is intended to sample the most important, contemporary, and advanced layout opti mization problems emerging with the advent of very deep submicron technologies in semiconductor processing. We hope that it will stimulate more people to perform research that leads to advances in the design and development of more efficient, effective, and elegant algorithms and design tools. Organization of the Book The book is organized as follows. A multi-stage simulated annealing algorithm that integrates floorplanning and interconnect planning is pre sented in Chapter 1. To reduce the run time, different interconnect plan ning approaches are applied in different ranges of temperatures. Chapter 2 introduces a new design methodology - the interconnect-centric design methodology and its centerpiece, interconnect planning, which consists of physical hierarchy generation, floorplanning with interconnect planning, and interconnect architecture planning. Chapter 3 investigates a net-cut minimization based placement tool, Dragon, which integrates the state of the art partitioning and placement techniques."

Microelectromechanical Systems (MEMS) stand poised for the next major breakthrough in the silicon revolution that began with the transistor in the 1960s and has revolutionized microelectronics. MEMS allow one to not only observe and process information of all types from small scale systems, but also to affect changes in systems and the environment at that scale. "RF MEMS Switches and Integrated Switching Circuits" builds on the extensive body of literature that exists in research papers on analytical and numerical modeling and design based on RF MEMS switches and micromachined switching circuits, and presents a unified framework of coverage. This volume includes, but is not limited to, RF MEMS approaches, developments from RF MEMS switches to RF switching circuits, and MEMS switch components in circuit systems. This book also: -Presents RF Switches and switching circuit MEMS devices in a unified framework covering all aspects of engineering innovation, design, modeling, fabrication, control and experimental implementation -Discusses RF switch devices in detail, with both system and component-level circuit integration using micro- and nano-fabrication techniques -Includes an emphasis on design innovation and experimental relevance rather than basic electromagnetic theory and device physics "RF MEMS Switches and Integrated Switching Circuits" is perfect for engineers, researchers and students working in the fields of MEMS, circuits and systems and RFs.

In three main divisions the book covers combinational circuits, latches, and asynchronous sequential circuits. Combinational circuits have no memorising ability, while sequential circuits have such an ability to various degrees. Latches are the simplest sequential circuits, ones with the shortest memory. The presentation is decidedly non-standard. The design of combinational circuits is discussed in an orthodox manner using normal forms and in an unorthodox manner using set-theoretical evaluation formulas relying heavily on Karnaugh maps. The latter approach allows for a new design technique called composition. Latches are covered very extensively. Their memory functions are expressed mathematically in a time-independent manner allowing the use of (normal, non-temporal) Boolean logic in their calculation. The theory of latches is then used as the basis for calculating asynchronous circuits. Asynchronous circuits are specified in a tree-representation, each internal node of the tree representing an internal latch of the circuit, the latches specified by the tree itself. The tree specification allows solutions of formidable problems such as algorithmic state assignment, finding equivalent states non-recursively, and verifying asynchronous circuits.

This book explores the direct thrust force control (DTFC) of tubular surface-mount linear permanent magnet synchronous motors (linear PMSMs). It presents a detailed account and analysis of several advanced nonlinear control schemes, based on the direct thrust control principle, to achieve a reduction in steady-state ripple in thrust force with faster transient response, and describes their experimental validation. It also provides rigorous details of the dynamic modelling of linear PMSMs from a control system perspective, and demonstrates the superior control performance of the proposed techniques compared to the current state-of-the-art techniques. Lastly, the book proposes and validates a stator flux observer for sensorless speed estimation comprising a linear state observer and an improved sliding mode component.

This book analyzes multi-MHz high frequency resonant DC-DC power converters with operating frequencies ranging from several MHz to tens of MHz in detail, aiming to support researchers and engineers with a focus on multi-MHz high frequency converters. The inverter stage, rectifier stage, matching network stage are analyzed in detail. Based on the three basic stages, typical non-isolated and isolated resonant DC-DC converters are depicted. To reduce the high driving loss under multi-MHz, resonant driving methods are introduced and improved. Also, the design and selection methods of passive and active component under multi-MHz frequency are described, especially for aircore inductor and transformer. Furthermore, multi-MHz resonant converter provides an approach for achieving flexible system.

Customers increasingly expect products that are smaller, have improved functionality and reliabiltiy, and cost less. Minaturization and integration of mechanical, sensing, and control functions within confined spaces is becoming an important trend in designing new products in the automotive, biomedical, pharaceutical and telecommunications industries in particular.

The International Precision Assembly Seminar (IPAS) is a premier international forum for reporting and discussing key technological developments in the field of mini and micro assembly automation. The contributions to the 3rd IPAS'2006 seminar have been grouped into 6 sections. Part 1 deals with new techniques for the handling and feeding of micro parts. Micro-robotics and robot applications for micro assembly are discussed in Part 2. An overview of different design and planning applications for microassembly is provided in Part 3. Part 4 is dedicated to reconfigurable and modular micro assembly systems and control applications. The economic aspects of microassembly including new business models are discussed in Part 5 while Part 6 presents specific technical solutions and microassembly applications.

This book explores the design implications of emerging, non-volatile memory (NVM) technologies on future computer memory hierarchy architecture designs. Since NVM technologies combine the speed of SRAM, the density of DRAM, and the non-volatility of Flash memory, they are very attractive as the basis for future universal memories. This book provides a holistic perspective on the topic, covering modeling, design, architecture and applications. The practical information included in this book will enable designers to exploit emerging memory technologies to improve significantly the performance/power/reliability of future, mainstream integrated circuits.

This work provides a comprehensive discussion of the bias dependence of equivalent circuit parameters for the three devices and an extensive discussion of temperature dependence. It: covers recess-etched MESFETs and self-aligned MESFETs with and without lightly-doped-drains and JFETs; analyzes GaAs-based pHEMTS and InP lattice-matched HEMT equivalent circuits; and describes a large-signal, temperature-dependent model extractor for A1GaAs-GaAs HBTs. The book is intended for circuit designers, process and device developers and test engineers.

In recent years, there has been considerable interest in highly integrated, low power, portable wireless devices. This monograph focuses on the problem of low power GFSK/GMSK modulation and presents an architectural approach for improved performance. Including several valuable tools for the practicing engineer.

Given the growing size and heterogeneity of Systems on Chip (SOC), the design process from initial specification to chip fabrication has become increasingly complex. This growing complexity provides incentive for designers to use high-level languages such as C, SystemC, and SystemVerilog for system-level design. While a major goal of these high-level languages is to enable verification at a higher level of abstraction, allowing early exploration of system-level designs, the focus so far for validation purposes has been on traditional testing techniques such as random testing and scenario-based testing. This book focuses on high-level verification, presenting a design methodology that relies upon advances in synthesis techniques as well as on incremental refinement of the design process. These refinements can be done manually or through elaboration tools. This book discusses verification of specific properties in designs written using high-level languages, as well as checking that the refined implementations are equivalent to their high-level specifications. The novelty of each of these techniques is that they use a combination of formal techniques to do scalable verification of system designs completely automatically. The verification techniques presented in this book include methods for verifying properties of high-level designs and methods for verifying that the translation from high-level design to a low-level Register Transfer Language (RTL) design preserves semantics. Used together, these techniques guarantee that properties verified in the high-level design are preserved through the translation to low-level RTL.

Wireless communication has emerged as an independent discipline in the past decades. Everything from cellular voice telephony to wireless data transmission using wireless sensor networks has profoundly impacted the safety, production, and productivity of industries and our lifestyle as well. After a decade of exponential growth, the wireless industry is one of the largest industries in the world. Therefore, it would be an injustice if the wireless communication is not explored for mining industry. Underground mines, which are characterized by their tough working conditions and hazardous environments, require fool-proof mine-wide communication systems for smooth functioning of mine workings and ensuring better safety. Proper and re- able communication systems not only save the machine breakdown time but also help in immediate passing of messages from the vicinity of underground working area to the surface for day-to-day normal mining operations as well as for speedy rescue operations in case of disaster. Therefore, a reliable and effective commu- cation system is an essential requisite for safe working, and maintaining requisite production and productivity of underground mines. Most of the existing systems generally available in underground mines are based on line (wired) communication principle, hence these are unable to withstand in the disaster conditions and dif?cult to deploy in inaccessible places. Therefore, wireless communication is an indispe- able, reliable, and convenient system and essential in case of day-to-day normal duty or disaster situations.

Over the last 40 years, Principles of Transistor Circuits has provided students and practitioners with a text they can rely on to keep them at the forefront of transistor circuit design.
Although integrated circuits have widespread application, the role of discrete transistors both as important building blocks which students must understand, and as practical solutions to design problems, remains undiminished.
The ninth edition has been thoroughly updated to cover the latest technology and applications, including computer circuit simulation, and many diagrams have been revised to bring them in line with current usage. Updated topics include thyristors, Darlington transistors, amplifiers, ring modulators, power supplies, optoelectronics and logic circuits.

Stan Amos, formerly head of Technical Publications Section Engineering Training Department BBC, has been writing about electronics since the 1950s.
Mike James is an established author and experienced FE lecturer. He currently works for Westland. His latest Newnes titles are Microcontroller Cookbook and Higher Electronics.
The transistor circuits bible
Updated with new developments in technology and applications
Accessible step-by-step introduction ideal for novices

This book describes the computational challenges posed by the progression toward nanoscale electronic devices and increasingly short design cycles in the microelectronics industry, and proposes methods of model reduction which facilitate circuit and device simulation for specific tasks in the design cycle. The goal is to develop and compare methods for system reduction in the design of high dimensional nanoelectronic ICs, and to test these methods in the practice of semiconductor development. Six chapters describe the challenges for numerical simulation of nanoelectronic circuits and suggest model reduction methods for constituting equations. These include linear and nonlinear differential equations tailored to circuit equations and drift diffusion equations for semiconductor devices. The performance of these methods is illustrated with numerical experiments using real-world data. Readers will benefit from an up-to-date overview of the latest model reduction methods in computational nanoelectronics.

This book provides a complete overview of significant design challenges in respect to circuit miniaturization and power reduction of the neural recording system, along with circuit topologies, architecture trends, and (post-silicon) circuit optimization algorithms. The introduced novel circuits for signal conditioning, quantization, and classification, as well as system configurations focus on optimized power-per-area performance, from the spatial resolution (i.e. number of channels), feasible wireless data bandwidth and information quality to the delivered power of implantable system.

H-infinity engineering continues to establish itself as a discipline of applied mathematics. As such, this extensively illustrated monograph makes a significant application of H-infinity theory to electronic amplifier design, demonstrating how recent developments in H-infinity engineering equip amplifier designers with new tools and avenues for research.

The presentation, at the interface of applied mathematics and engineering, emphasizes how to (1) compute the best possible performance available from any matching circuits; (2) benchmark existing matching solutions; and (3) generalize results to multiple amplifiers. As the monograph develops, many research directions are pointed out for both disciplines. The physical meaning of a mathematical problem is made explicit for the mathematician, while circuit problems are presented in the H-infinity framework for the engineer. A final chapter organizes these research topics into a collection of open problems ranging from electrical engineering, numerical implementations, and generalizations to H-infinity theory.

This book discusses the trade-offs involved in designing direct RF digitization receivers for the radio frequency and digital signal processing domains. A system-level framework is developed, quantifying the relevant impairments of the signal processing chain, through a comprehensive system-level analysis. Special focus is given to noise analysis (thermal noise, quantization noise, saturation noise, signal-dependent noise), broadband non-linear distortion analysis, including the impact of the sampling strategy (low-pass, band-pass), analysis of time-interleaved ADC channel mismatches, sampling clock purity and digital channel selection. The system-level framework described is applied to the design of a cable multi-channel RF direct digitization receiver. An optimum RF signal conditioning, and some algorithms (automatic gain control loop, RF front-end amplitude equalization control loop) are used to relax the requirements of a 2.7GHz 11-bit ADC.
A two-chip implementation is presented, using BiCMOS and 65nm CMOS processes, together with the block and system-level measurement results. Readers will benefit from the techniques presented, which are highly competitive, both in terms of cost and RF performance, while drastically reducing power consumption.
"

Cellular Neural Networks (CNNs) constitute a class of nonlinear, recurrent and locally coupled arrays of identical dynamical cells that operate in parallel. ANALOG chips are being developed for use in applications where sophisticated signal processing at low power consumption is required. Signal processing via CNNs only becomes efficient if the network is implemented in analog hardware. In view of the physical limitations that analog implementations entail, robust operation of a CNN chip with respect to parameter variations has to be insured. By far not all mathematically possible CNN tasks can be carried out reliably on an analog chip; some of them are inherently too sensitive. This book defines a robustness measure to quantify the degree of robustness and proposes an exact and direct analytical design method for the synthesis of optimally robust network parameters. The method is based on a design centering technique which is generally applicable where linear constraints have to be satisfied in an optimum way. Processing speed is always crucial when discussing signal-processing devices. In the case of the CNN, it is shown that the setting time can be specified in closed analytical expressions, which permits, on the one hand, parameter optimization with respect to speed and, on the other hand, efficient numerical integration of CNNs. Interdependence between robustness and speed issues are also addressed. Another goal pursued is the unification of the theory of continuous-time and discrete-time systems. By means of a delta-operator approach, it is proven that the same network parameters can be used for both of these classes, even if their nonlinear output functions differ. More complex CNN optimization problems that cannot be solved analytically necessitate resorting to numerical methods. Among these, stochastic optimization techniques such as genetic algorithms prove their usefulness, for example in image classification problems. Since the inception of the CNN, the problem of finding the network parameters for a desired task has been regarded as a learning or training problem, and computationally expensive methods derived from standard neural networks have been applied. Furthermore, numerous useful parameter sets have been derived by intuition. In this book, a direct and exact analytical design method for the network parameters is presented. The approach yields solutions which are optimum with respect to robustness, an aspect which is crucial for successful implementation of the analog CNN hardware that has often been neglected. This beautifully rounded work provides many interesting and useful results, for both CNN theorists and circuit designers.' Leon O. Chua

This book deals with energy delivery challenges of the power processing unit of modern computer microprocessors. It describes in detail the consequences of current trends in miniaturization and clock frequency increase, upon the power delivery unit, referred to as voltage regulator. This is an invaluable reference for anybody needing to understand the key performance limitations and opportunities for improvement, from both a circuit and systems perspective, of state-of-the-art power solutions for next generation CPUs.

High-speed, power-efficient analog integrated circuits can be used as standalone devices or to interface modern digital signal processors and micro-controllers in various applications, including multimedia, communication, instrumentation, and control systems. New architectures and low device geometry of complementary metaloxidesemiconductor (CMOS) technologies have accelerated the movement toward system on a chip design, which merges analog circuits with digital, and radio-frequency components.