This handbook provides ready access to all of the major concepts, techniques, problems, and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, written by professionals in several disciplines, has treated notation and mathematics in ways that vary from source to source. This book opens with a clear description of the shortcomings of conventional testing as applied to complex digital circuits, revewing by comparison the principles of design for testability of more advanced digital technology. Offers in-depth discussions of test sequence generation and response data compression, including pseudorandom sequence generators; the mathematics of shift-register sequences and their potential for built-in testing. Also details random and memory testing and the problems of assessing the efficiency of such tests, and the limitations and practical concerns of built-in testing.

This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes. It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package.

There are many techniques for analyzing IC fails, but they are scattered over the professional IC test and diagnosis literature, and in various statistics and data mining handbooks. Moreover, many data mining techniques that are standard in other data analysis environments, and that are appropriate for analyzing IC fails, have not yet been employed for that purpose.

Data Mining and Diagnosing IC Fails addresses the problem of obtaining maximum information from (functional) integrated circuit fail data about the defects that caused the fails. It starts at the highest level from mere sort codes, and drills down via various data mining techniques to detailed logic diagnosis. The various approaches discussed in this book have a thorough theoretical underpinning, but are geared towards applications on real life fail data and state of the art ICs. This book brings together a large number of analysis techniques that are suitable for IC fail data, but that are not available elsewhere in a single place. Several of the techniques, in fact, have been presented only recently in technical conferences.

The purpose of the book is to bring together in one place a large number of analysis, data mining and diagnosis techniques that have proven to be useful in analyzing IC fails. The descriptions of the techniques and analysis routines is sufficiently detailed that professional manufacturing engineers can implement them in their own work environment.

Simplified Design of V/F Converters shows how to design and experiment with V/F converters, both voltage-to-frequency and frequency-to-voltage. The design approach here is the same one used in all of John Lenk's best-selling books on simplified and practical design. Throughout the book, design problems start with guidelines for selecting all components on a trial-value basis, assuming a specific design goal and set of conditions. Then, using the guideline values in experimental circuits, the desired results are produced by varying the experimental component values, if needed.

If you are a working engineer responsible for designing VFCs, or selecting IC converters, the variety of circuit configurations described here should simplify your task. Not only does the book describe converter-circuit designs, but it also covers the most popular forms of VFC ICs available. Throughout the book, you will find a wealth of information on VFC ICs and related components, including how to test and troubleshoot completed circuits.
For all skill levels.
How to design and build V/F-converter circuits from scratch.

High-speed, power-efficient analog integrated circuits can be used as standalone devices or to interface modern digital signal processors and micro-controllers in various applications, including multimedia, communication, instrumentation, and control systems. New architectures and low device geometry of complementary metaloxidesemiconductor (CMOS) technologies have accelerated the movement toward system on a chip design, which merges analog circuits with digital, and radio-frequency components.

Written by the inventor of the ultrahigh Q-value resonator, this text describes innovations in high-temperature superconducting (HTS) microwave circuits and explains the fundamental principles. The book shows how to analyze, design, characterize and test the circuits created. Each chapter gives application information on: materials and characterization; transmission lines; passive components; active devices; HTS/III device hybrid circuits; high Q-value resonators; and packaging. Augmented with 202 equations and 137 illustrations, "High-Temperature Superconducting Microwave Cricuits" offers information for microwave engineers, system engineers, and material scientists. University students should find the text useful for learning about the next generation of microwave circuits.

This book focuses on modeling, simulation and analysis of analog circuit aging. First, all important nanometer CMOS physical effects resulting in circuit unreliability are reviewed. Then, transistor aging compact models for circuit simulation are discussed and several methods for efficient circuit reliability simulation are explained and compared. Ultimately, the impact of transistor aging on analog circuits is studied. Aging-resilient and aging-immune circuits are identified and the impact of technology scaling is discussed.

The models and simulation techniques described in the book are intended as an aid for device engineers, circuit designers and the EDA community to understand and to mitigate the impact of aging effects on nanometer CMOS ICs.

Written to be compatible with a companion text, Fundamentals of acoustics (Wiley, 1982), which covers the basics and math concepts. For seniors and first-year graduate students who need a detailed, engineering design guide to acoustics applications written from an applied science and engineering bas

This book describes optical receiver solutions integrated in standard CMOS technology, attaining high-speed short-range transmission within cost-effective constraints. These techniques support short reach applications, such as local area networks, fiber-to-the-home and multimedia systems in cars and homes. The authors show how to implement the optical front-end in the same technology as the subsequent digital circuitry, leading to integration of the entire receiver system in the same chip. The presentation focuses on CMOS receiver design targeting gigabit transmission along a low-cost, standardized plastic optical fiber up to 50m in length. This book includes a detailed study of CMOS optical receiver design - from building blocks to the system level.

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Synthesis Techniques and Optimization for Reconfigurable Systems discusses methods used to model reconfigurable applications at the system level, many of which could be incorporated directly into modern compilers. The book also discusses a framework for reconfigurable system synthesis, which bridges the gap between application-level compiler analysis and high-level device synthesis. The development of this framework (discussed in Chapter 5), and the creation of application analysis which further optimize its output (discussed in Chapters 7, 8, and 9), represent over four years of rigorous investigation within UCLA's Embedded and Reconfigurable Laboratory (ERLab) and UCSB's Extensible, Programmable and Reconfigirable Embedded SystemS (ExPRESS) Group. The research of these systems has not yet matured, and we continually strive to develop data and methods, which will extend the collective understanding of reconfigurable system synthesis.
Synthesis Techniques and Optimization for Reconfigurable Systems assumes a basic understanding of logic design, hardware synthesis (from high-level architecture generation down to placement and routing), and the structure and form of high-level application constructs (such as loops and branches). However, this book may be read and used in the absence of such background knowledge. This text is aimed at researchers and system-level designers (both academic and industrial), but could easily be used as the text of graduate-level course on reconfigurable system synthesis techniques.

Analog Circuit Design contains eighteen tutorials, reflecting the contributions of six experts, as presented at the 15th workshop on Advances in Analog Circuit Design (AACD). Provides 18 overviews of analog circuit design in High-Speed A-D Converters, Automotive Electronics and Ultra-Low Power Wireless. An essential reference source for the latest developments in the field, tutorial coverage makes it suitable for advanced design courses.

In the arena of Parasitic-Aware Design of CMOS RF Circuits, efforts are aimed at the realization of true single-chip radios with few, if any, off-chip components. Ironically, the on-chip passive components required for RF integration pose miore serious challenges to SOC integration than the active CMOS and BJT devices. This is not surprising since modern digital IC designs are dominated as much, or more, by interconnectg characteristics than by active device properties. In any event, the co-integration of active and passive devices in RFIC design represents a serious design problem and an even more daunting manufacturing challenge. If conventional mixed-signal design techniques are employed, parasitics associated with passive elements (resistors, capacitors, inductors, transformers, pads, etc.) and the package effectively de-tune RF circuits rendering them sub-optimal or virtually useless. Hence, dealing with parasitics in an effective way as part of the design process is an essential emerging methodology in modern SOC design. The parasitic-aware RF circuit synthesis techinques described in this book effectively address this critical problem.

What is exactly "Safety"? A safety system should be defined as a system that will not endanger human life or the environment. A safety-critical system requires utmost care in their specification and design in order to avoid possible errors in their implementation that should result in unexpected system's behavior during his operating "life." An inappropriate method could lead to loss of life, and will almost certainly result in financial penalties in the long run, whether because of loss of business or because the imposition of fines. Risks of this kind are usually managed with the methods and tools of the "safety engineering." A life-critical system is designed to 9 lose less than one life per billion (10 ). Nowadays, computers are used at least an order of magnitude more in safety-critical applications compared to two decades ago. Increasingly electronic devices are being used in applications where their correct operation is vital to ensure the safety of the human life and the environment. These application ranging from the anti-lock braking systems (ABS) in automobiles, to the fly-by-wire aircrafts, to biomedical supports to the human care. Therefore, it is vital that electronic designers be aware of the safety implications of the systems they develop. State of the art electronic systems are increasingly adopting progr- mable devices for electronic applications on earthling system. In particular, the Field Programmable Gate Array (FPGA) devices are becoming very interesting due to their characteristics in terms of performance, dimensions and cost.

This book contains extended and revised versions of the best papers presented at the 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, held in Madrid, Spain, in September 2010. The 14 papers included in the book were carefully reviewed and selected from the 52 full papers presented at the conference. The papers cover a wide variety of excellence in VLSI technology and advanced research. They address the current trend toward increasing chip integration and technology process advancements bringing about stimulating new challenges both at the physical and system-design levels, as well as in the test of theses systems.

This book describes how evolutionary algorithms (EA), including genetic algorithms (GA) and particle swarm optimization (PSO) can be utilized for solving multi-objective optimization problems in the area of embedded and VLSI system design. Many complex engineering optimization problems can be modelled as multi-objective formulations. This book provides an introduction to multi-objective optimization using meta-heuristic algorithms, GA and PSO and how they can be applied to problems like hardware/software partitioning in embedded systems, circuit partitioning in VLSI, design of operational amplifiers in analog VLSI, design space exploration in high-level synthesis, delay fault testing in VLSI testing and scheduling in heterogeneous distributed systems. It is shown how, in each case, the various aspects of the EA, namely its representation and operators like crossover, mutation, etc, can be separately formulated to solve these problems. This book is intended for design engineers and researchers in the field of VLSI and embedded system design. The book introduces the multi-objective GA and PSO in a simple and easily understandable way that will appeal to introductory readers.

LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers fits in the quest for complete CMOS integration of wireless receiver front-ends. With a combined discussion of both RF and ESD performance, it tackles one of the final obstacles on the road to CMOS integration. The book is conceived as a design guide for those actively involved in the design of CMOS wireless receivers.

The book starts with a comprehensive introduction to the performance requirements of low-noise amplifiers in wireless receivers. Several popular topologies are explained and compared with respect to future technology and frequency scaling. The ESD requirements are introduced and related to the state-of-the-art protection devices and circuits.

LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers provides an extensive theoretical treatment of the performance of CMOS low-noise amplifiers in the presence of ESD-protection circuitry. The influence of the ESD-protection parasitics on noise figure, gain, linearity, and matching are investigated. Several RF-ESD co-design solutions are discussed allowing both high RF-performance and good ESD-immunity for frequencies up to and beyond 5 GHz. Special attention is also paid to the layout of both active and passive components.

LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers offers the reader intuitive insight in the LNA's behavior, as well as the necessary mathematical background to optimize its performance. All material is experimentally verified with several CMOS implementations, among which a fully integrated GPS receiver front-end. The book is essential reading for RF design engineers and researchers in the field and is also suitable as a text book for an advanced course on the subject.

This is the seventh book in the popular Simplified Design series from John Lenk, which teaches engineers, technicians, and students to use and modify off-the-shelf ICs to suit their individual design needs.
The first chapter of this book describes the basic operation of microprocessor supervisory circuits and how to use manufacturer data sheets to make your component selections. Later chapters describe the internal operations of various commonly-available ICs and how to select and modify them.
The most common microprocessor-supervisory functions include: power-on reset, low-voltage reset for glitch and brownout, memory-write protection, power-fail warning, battery backup switchover, and watchdog timer. While these functions are not difficult to implement individually, they can be complex in combination, particularly when there are space limitations. Simplified Design of Microprocessor-Supervisory Circuits will allow designers to evaluate tradeoffs and features more easily and quickly.

In the EDN Series for Design Engineers
Specifications and modification hints for many IC types
Shows how to use and modify off-the-shelf ICs for semi-custom supervisory circuits

This book presents the methodologies and for embedded systems design, using field programmable gate array (FPGA) devices, for the most modern applications. Coverage includes state-of-the-art research from academia and industry on a wide range of topics, including applications, advanced electronic design automation (EDA), novel system architectures, embedded processors, arithmetic, and dynamic reconfiguration.

This book provides a systematic and comprehensive insight into current sensing techniques. In addition to describing theoretical and practical aspects of current sensing, the author derives practical design guidelines for achieving an optimal performance through a systematic analysis of different circuit principles. Voltage sense amplifiers are also considered, since they are used as a final comparator in a current sense amplifier. Innovative concepts, such as compensation of the bitline multiplexer and auto-power-down, are elucidated. Although the focus is on embedded static random access memory (SRAM), the material presented applies to any current-providing memory type, e.g. also to emerging memory technologies such as MRAM. The book will appeal to design engineers in industry and also to researchers wishing to learn about, and apply, current sensing techniques.

This work is intended for product designers and consultants in the RF and wireless communications industry. It is also suitable for use as a university-level text and as a reference for professional trainers. The guide contains measurement methods, system calculations, statistical procedures and actual circuit and measurement examples which can be put into practice. It comes with a diskette containing a database of drawings, schematics, text and the convenience of live equations. (The diskette operates on Macintosh Ststem 7 or later, Windows 3.1 or later and Microsoft Excel 4.0 or later).

This book describes Smart Cities and the information technologies that will provide better living conditions in the cities of tomorrow. It brings together research findings from 27 countries across the globe, from academia, industry and government. It addresses a number of crucial topics in state of the arts of technologies and solutions related to smart cities, including big data and cloud computing, collaborative platforms, communication infrastructures, smart health, sustainable development and energy management. Information Innovation Technology in Smart Cities is essential reading for researchers working on intelligence and information communication systems, big data, Internet of Things, Cyber Security, and cyber-physical energy systems. It will be also invaluable resource for advanced students exploring these areas.

This book provides an introduction to the emerging area of "Brain-Machine Interfaces," with emphasis on the operation and practical design aspects. The book will help both electrical & bioengineers as well as neuroscience investigators to learn about the next generation brain-machine interfaces. The comprehensive review and design analysis will be very helpful for researchers who are new to this area or interested in the study of the brain. The in-depth discussion of practical design issues especially in animal experiments will also be valuable for experienced researchers.

This book describes a set of tools and algorithms then enable the electrical engineer in fields such as circuit design, power delivery, signal integrity, analog design, package and board modeling to arrive at approximate and exact solutions robustly and relatively efficiently, even when typical software packages may fail to do so. By leveraging well established and time tested methods, the author demonstrates how the practitioner will be able to deal with various circuit design problems and signal integrity issues both in the frequency and time domains. The presented tool set is an alternative to "brute force" time discretization and software utilization, offering great insight into the operations of linear systems ranging from RLC networks to device modeling.

This book shows readers how to develop energy-efficient algorithms and hardware architectures to enable high-definition 3D video coding on resource-constrained embedded devices. Users of the Multiview Video Coding (MVC) standard face the challenge of exploiting its 3D video-specific coding tools for increasing compression efficiency at the cost of increasing computational complexity and, consequently, the energy consumption. This book enables readers to reduce the multiview video coding energy consumption through jointly considering the algorithmic and architectural levels. Coverage includes an introduction to 3D videos and an extensive discussion of the current state-of-the-art of 3D video coding, as well as energy-efficient algorithms for 3D video coding and energy-efficient hardware architecture for 3D video coding.