A brain-computer interface (BCI) establishes a direct output channel between the human brain and external devices. BCIs infer user intent via direct measures of brain activity and thus enable communication and control without movement. This book, authored by experts in the field, provides an accessible introduction to the neurophysiological and signal-processing background required for BCI, presents state-of-the-art non-invasive and invasive approaches, gives an overview of current hardware and software solutions, and reviews the most interesting as well as new, emerging BCI applications. The book is intended not only for students and young researchers, but also for newcomers and other readers from diverse backgrounds keen to learn about this vital scientific endeavour.

This book describes the use of low-power low-cost and extremely small radios to provide essential time reference for wireless sensor networks. The authors explain how to integrate such radios in a standard CMOS process to reduce both cost and size, while focusing on the challenge of designing a fully integrated time reference for such radios. To enable the integration of the time reference, system techniques are proposed and analyzed, several kinds of integrated time references are reviewed, and mobility-based references are identified as viable candidates to provide the required accuracy at low-power consumption. Practical implementations of a mobility-based oscillator and a temperature sensor are also presented, which demonstrate the required accuracy over a wide temperature range, while drawing 51-uW from a 1.2-V supply in a 65-nm CMOS process."

System-on-Chip (SoC) is believed to represent the next major market for microelectronics, and there is a considerable interest world-wide in developing effective methods and tools to support the SoC paradigm. The field of SoC is broad and expanding and at present the technical and technological literature about the overall state-of-the-art in SoC is dispersed across a wide spectrum of books, journals, and conference proceedings. This edited book is an attempt to provide a comprehensive and accessible source of state-of-the-art information on existing and emerging SoC key research areas. In particular, the book covers the general principles and ideas of designing, validating and testing complex embedded computing systems and their underlying tradeoffs. Twenty-five international research groups have contributed to the book. Each contribution has an up-to-date survey highlighting the key achievements and future trends. To facilitate the understanding of the various topics covered in the book, each chapter has some background covering the basic principles, and extensive list of references. To enhance the book readability, the chapters are grouped into eight parts, each part examining a particular theme of SoC, including system design, embedded software, power management, reconfigurable computing, network-on-chip, verification and test. The book will be of interest to graduate students, designers and managers working in Electronic and Computer engineering.

Low Power Consumption is one of the critical issues in the performance of small battery-powered handheld devices. Mobile terminals feature an ever increasing number of wireless communication alternatives including GPS, Bluetooth, GSM, 3G, WiFi or DVB-H. Considering that the total power available for each terminal is limited by the relatively slow increase in battery performance expected in the near future, the need for efficient circuits is now critical. This book presents the basic techniques available to design low power RF CMOS analogue circuits. It gives circuit designers a complete guide of alternatives to optimize power consumption and explains the application of these rules in the most common RF building blocks: LNA, mixers and PLLs. It is set out using practical examples and offers a unique perspective as it targets designers working within the standard CMOS process and all the limitations inherent in these technologies.

This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect. It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools. Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms, NoC router design, NoC-based system integration, verification and testing, and NoC reliability. Case studies are used to illuminate new design methodologies.

In three parts, this book contributes to the advancement of engineering education and that serves as a general reference on digital signal processing. Part I presents the basics of analog and digital signals and systems in the time and frequency domain. It covers the core topics: convolution, transforms, filters, and random signal analysis. It also treats important applications including signal detection in noise, radar range estimation for airborne targets, binary communication systems, channel estimation, banking and financial applications, and audio effects production. Part II considers selected signal processing systems and techniques. Core topics covered are the Hilbert transformer, binary signal transmission, phase-locked loops, sigma-delta modulation, noise shaping, quantization, adaptive filters, and non-stationary signal analysis. Part III presents some selected advanced DSP topics.

This book tackles head-on the challenges of digital design in the era of billion-transistor SoCs. It discusses fundamental design concepts in design and coding required to produce robust, functionally correct designs. It also provides specific techniques for measuring and minimizing complexity in RTL code. Finally, it discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages must progress to address the needs of tomorrow 's SoC designs.

This book introduces new massively parallel computer (MPSoC) architectures called invasive tightly coupled processor arrays. It proposes strategies, architecture designs, and programming interfaces for invasive TCPAs that allow invading and subsequently executing loop programs with strict requirements or guarantees of non-functional execution qualities such as performance, power consumption, and reliability. For the first time, such a configurable processor array architecture consisting of locally interconnected VLIW processing elements can be claimed by programs, either in full or in part, using the principle of invasive computing. Invasive TCPAs provide unprecedented energy efficiency for the parallel execution of nested loop programs by avoiding any global memory access such as GPUs and may even support loops with complex dependencies such as loop-carried dependencies that are not amenable to parallel execution on GPUs. For this purpose, the book proposes different invasion strategies for claiming a desired number of processing elements (PEs) or region within a TCPA exclusively for an application according to performance requirements. It not only presents models for implementing invasion strategies in hardware, but also proposes two distinct design flavors for dedicated hardware components to support invasion control on TCPAs.

This book provides a detailed analysis of all aspects of capacitive DC-DC converter design: topology selection, control loop design and noise mitigation. Readers will benefit from the authors' systematic overview that starts from the ground up, in-depth circuit analysis and a thorough review of recently proposed techniques and design methodologies. Not only design techniques are discussed, but also implementation in CMOS is shown, by pinpointing the technological opportunities of CMOS and demonstrating the implementation based on four state-of-the-art prototypes. "

This book describes the design of CMOS circuits for ultra-low power consumption including analog, radio frequency (RF), and digital signal processing circuits (DSP). The book addresses issues from circuit and system design to production design, and applies the ultra-low power circuits described to systems for digital hearing aids and capsule endoscope devices. Provides a valuable introduction to ultra-low power circuit design, aimed at practicing design engineers; Describes all key building blocks of ultra-low power circuits, from a systems perspective; Applies circuits and systems described to real product examples such as hearing aids and capsule endoscopes.

The road vehicle of the future will embrace innovations from three major automotive technology fields: driver assistance systems, vehicle networking and alternative propulsion. Smart systems such as adaptive ICT components and MEMS devices, novel network architectures, integrated sensor systems, intelligent interfaces and functional materials form the basis of these features and permit their successful and synergetic integration. They increasingly appear to be the key enabling technologies for safe and green road mobility. For more than fifteen years the International Forum on Advanced Microsystems for Automotive Applications (AMAA) has been successful in detecting novel trends and in discussing the technological implications from early on. The topic of the AMAA 2013 will be Smart Systems for Safe and Green Vehicles . This book contains peer-reviewed papers written by leading engineers and researchers which all address the ongoing research and novel developments in the field.

www.amaa.de

This book describes a novel, efficient and powerful scheme for designing and evaluating the performance characteristics of any electronic filter designed with predefined specifications. The author explains techniques that enable readers to eliminate complicated manual, and thus error-prone and time-consuming, steps of traditional design techniques. The presentation includes demonstration of efficient automation, using an ANSI C language program, which accepts any filter design specification (e.g. Chebyschev low-pass filter, cut-off frequency, pass-band ripple etc.) as input and generates as output a SPICE(Simulation Program with Integrated Circuit Emphasis) format netlist. Readers then can use this netlist to run simulations with any version of the popular SPICE simulator, increasing accuracy of the final results, without violating any of the key principles of the traditional design scheme.

To satisfy the higher requirements of digitally converged embedded systems, this book describes heterogeneous multicore technology that uses various kinds of low-power embedded processor cores on a single chip. With this technology, heterogeneous parallelism can be implemented on an SoC, and greater flexibility and superior performance per watt can then be achieved. This book defines the heterogeneous multicore architecture and explains in detail several embedded processor cores including CPU cores and special-purpose processor cores that achieve highly arithmetic-level parallelism. The authors developed three multicore chips (called RP-1, RP-2, and RP-X) according to the defined architecture with the introduced processor cores. The chip implementations, software environments, and applications running on the chips are also explained in the book. Provides readers an overview and practical discussion of heterogeneous multicore technologies from both a hardware and software point of view; Discusses a new, high-performance and energy efficient approach to designing SoCs for digitally converged, embedded systems; Covers hardware issues such as architecture and chip implementation, as well as software issues such as compilers, operating systems, and application programs; Describes three chips developed according to the defined heterogeneous multicore architecture, including chip implementations, software environments, and working applications.

This book presents a systematic approach to analyzing the challenging engineering problems posed by the need for security and privacy in implantable medical devices (IMD). It describes in detail new issues termed as lightweight security, due to the associated constraints on metrics such as available power, energy, computing ability, area, execution time, and memory requirements. Coverage includes vulnerabilities and defense across multiple levels, with basic abstractions of cryptographic services and primitives such as public key cryptography, block ciphers and digital signatures. Experts from Computer Security and Cryptography present new research which shows vulnerabilities in existing IMDs and proposes solutions. Experts from Privacy Technology and Policy will discuss the societal, legal and ethical challenges surrounding IMD security as well as technological solutions that build on the latest in Computer Science privacy research, as well as lightweight solutions appropriate for implementation in IMDs.

As integrated circuits get smaller and more complex, power densities are increasing, leading to more heat generation. Dealing with this heat is fast becoming the most important design bottleneck of current and future integrated circuits, where power envelopes are defined by the ability of the system to dissipate the generated heat. Thermal effects are forcing chip designers to apply conservative design margins, creating sub-optimal results. At a larger scale, cooling is the second most costly item in the electricity bills of well-designed high-performance computing and data centers, costing 30-50% of the total. Thermal monitoring and management in integrated circuits is therefore becoming increasingly important. This book covers thermal monitoring and management in integrated circuits, with a focus on devices and materials that are intimately integrated on-chip as opposed to in-package or on-board. The devices and circuits discussed include various designs used for the purpose of converting temperature to a digital measurement and actively biased circuits that reverse thermal gradients on chips for the purpose of cooling. Topics covered include an overview of heat in integrated circuits and systems, on-chip temperature sensing, dynamic thermal management, active cooling, and mitigating thermal events at the system-level and above.

This book provides comprehensive coverage of the latest trends/advances in subjective and objective quality evaluation for traditional visual signals, such as 2D images and video, as well as the most recent challenges for the field of multimedia quality assessment and processing, such as mobile video and social media. Readers will learn how to ensure the highest storage/delivery/ transmission quality of visual content (including image, video, graphics, animation, etc.) from the server to the consumer, under resource constraints, such as computation, bandwidth, storage space, battery life, etc.

This book introduces readers to a variety of tools for analog layout design automation. After discussing the placement and routing problem in electronic design automation (EDA), the authors overview a variety of automatic layout generation tools, as well as the most recent advances in analog layout-aware circuit sizing. The discussion includes different methods for automatic placement (a template-based Placer and an optimization-based Placer), a fully-automatic Router and an empirical-based Parasitic Extractor. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. All the methods described are applied to practical examples for a 130nm design process, as well as placement and routing benchmark sets.

This book demonstrates the usefulness of the switching function in analyzing powers electronic circuits in the steady state. A procedure is suggested for the effective application of this effective application of this method for the analysis of all types of power electronic circuits. The Kirchoff's Laws and the Superposition theorem are applied by introducing the appropriate switching functions in order to derive Unified Expressions of voltage and current in switched circuits valid at all times. The exact expressions of the current in each semiconductor device in the circuit enables the circuit designer to collect all the relevant data to set the ratings of the device such as rms, average and peak values of voltage and current. The order of the voltage and current harmonics at any point in the circuit are derived with simple arithmetic. Compact expressions are derived for Sinusoidal PWM signals based on the switching function. The order, magnitude and phase of each component are derived directly from the expression with simple arithmetic. The educator has a simple way to present to his students the mechanism of operation of complex switched circuits where all the statements regarding their operation are actually presented in the model of the circuit.

The Information and communication technology (ICT) industry is said to account for 2% of the worldwide carbon emissions - a fraction that continues to grow with the relentless push for more and more sophisticated computing equipment, c- munications infrastructure, and mobile devices. While computers evolved in the directionofhigherandhigherperformanceformostofthelatterhalfofthe20thc- tury, the late 1990's and early 2000'ssaw a new emergingfundamentalconcern that has begun to shape our day-to-day thinking in system design - power dissipation. As we elaborate in Chapter 1, a variety of factors colluded to raise power-ef?ciency as a ?rst class design concern in the designer's mind, with profound consequences all over the ?eld: semiconductor process design, circuit design, design automation tools, system and application software, all the way to large data centers. Power-ef?cient System Design originated from a desire to capture and highlight the exciting developments in the rapidly evolving ?eld of power and energy op- mization in electronic and computer based systems. Tremendous progress has been made in the last two decades, and the topic continues to be a fascinating research area. To develop a clearer focus, we have concentrated on the relatively higher level of design abstraction that is loosely called the system level. In addition to the ext- sive coverage of traditional power reduction targets such as CPU and memory, the book is distinguished by detailed coverage of relatively modern power optimization ideas focussing on components such as compilers, operating systems, servers, data centers, and graphics processors.

More and more information, audio and video but also a range of other information type, is generated, processed and used by machines today, even though the end user may be a human. The result over the past 15 years has been a substantial increase in the type of information and change in the way humans generate, classify, store, search, access and consume information. Conversion of information to digital form is a prerequisite for this enhanced machine role, but must be done having in mind requirements such as compactness, fidelity, interpretability etc. This book presents new ways of dealing with digital information and new types of digital information underpinning the evolution of society and business.

The aim of this book is to expand and improve upon the existing knowledge on discrete-time 1-bit look-ahead sigma-delta modulation in general, and to come to a solution for the above mentioned specific issues arising from 1-bit sigma-delta modulation for SA-CD. In order to achieve this objective an analysis is made of the possibilities for improving the performance of digital noise-shaping look-ahead solutions. On the basis of the insights obtained from the analysis, several novel generic 1-bit look-ahead solutions that improve upon the state-of-the-art will be derived and their performance will be evaluated and compared. Finally, all the insights are combined with the knowledge of the SA-CD lossless data compression algorithm to come to a specifically for SA-CD optimized look-ahead design.

Modeling of photovoltaic sources and their emulation by means of power electronic converters are challenging issues. The former is tied to the knowledge of the electrical behavior of the PV generator; the latter consists in its realization by a suitable power amplifier. This extensive introduction to the modeling of PV generators and their emulation by means of power electronic converters will aid in understanding and improving design and set up of new PV plants. The main benefit of reading Photovoltaic Sources is the ability to face the emulation of photovoltaic generators obtained by the design of a suitable equipment in which voltage and current are the same as in a real source. This is achieved according to the following steps: the source electrical behavior modeling, the power converter design, including its control, for the laboratory emulator. This approach allows the reader to cope with the creation of an indoor virtual photovoltaic plant, in which the environmental conditions can be imposed by the user, for testing real operation including maximum power point tracking, partial shading, control for the grid or load interfacing, etc. Photovoltaic Sources is intended to meet the demands of postgraduate level students, and should prove useful to professional engineers and researchers dealing with the problems associated with modeling and emulation of photovoltaic sources.

This book is about security in embedded systems and it provides an authoritative reference to all aspects of security in system-on-chip (SoC) designs. The authors discuss issues ranging from security requirements in SoC designs, definition of architectures and design choices to enforce and validate security policies, and trade-offs and conflicts involving security, functionality, and debug requirements. Coverage also includes case studies from the "trenches" of current industrial practice in design, implementation, and validation of security-critical embedded systems. Provides an authoritative reference and summary of the current state-of-the-art in security for embedded systems, hardware IPs and SoC designs; Takes a "cross-cutting" view of security that interacts with different design and validation components such as architecture, implementation, verification, and debug, each enforcing unique trade-offs; Includes high-level overview, detailed analysis on implementation, and relevant case studies on design/verification/debug issues related to IP/SoC security.

Tin (Sn) whiskers are electrically conductive, single crystal eruptions that grow from Sn film surfaces. Their high aspect ratio presents reliability problems for the electronics industry due to bridging and metal arcing, leading to malfunctions and catastrophic failures in many electronic systems (including satellite and defense sectors). Due to legislation in the EU, Japan, and the U.S., mandating a gradual shift from lead (Pb)-based to lead-free solders and board finishes, there has been a reemergence of Sn whiskers. Continuing reports of Sn whisker induced failures coupled with the lack of an industry-accepted understanding of whisker growth and/or test methods to identify whisker prone products has made pure/high Sn substitutes a risky proposition in high reliability systems. This thesis is designed to clarify and control the fundamental mechanisms that govern whisker formation. The research focuses on reproducible "laboratory" created whiskers under a variety of rigorously controlled environmental factors such as film thickness, film stress, substrate material, gas environment, and humidity exposure, which are known to play a significant role in whisker production. The ultimate question of how to impede and/or prevent whisker growth is also addressed and shows that whisker prevention is possible via hard metal capping films, which are impenetrable by whiskers.

Today s semiconductor memory market is divided between two types of memory: DRAM and Flash. Each has its own advantages and disadvantages. While DRAM is fast but volatile, Flash is non-volatile but slow. A memory system based on self-organized quantum dots (QDs) as storage node could combine the advantages of modern DRAM and Flash, thus merging the latter s non-volatility with very fast write times.

This thesis investigates the electronic properties of and carrier dynamics in self-organized quantum dots by means of time-resolved capacitance spectroscopy and time-resolved current measurements. The first aim is to study the localization energy of various QD systems in order to assess the potential of increasing the storage time in QDs to non-volatility. Surprisingly, it is found that the major impact of carrier capture cross-sections of QDs is to influence, and at times counterbalance, carrier storage in addition to the localization energy. The second aim is to study the coupling between a layer of self-organized QDs and a two-dimensional hole gas (2DHG), which is relevant for the read-out process in memory systems. The investigation yields the discovery of the many-particle ground states in the QD ensemble.In addition to its technological relevance, the thesis also offers new insights into the fascinating field of nanostructure physics."