This book addresses the theoretical and practical circuit and system concepts that underpin the design of reliable and reproducible, high performance, monolithic feedback circuits. It is intended for practicing electronics engineers and students who wish to acquire an insightful understanding of the ways in which open loop topologies, closed loop architectures, and fundamental circuit theoretic issues combine to determine the limits of performance of analog networks. Since many of the problems that underpin high speed digital circuit design are a subset of the analysis and design dilemmas confronted by wideband analog circuit designers, the book is also germane to high performance digital circuit design.

This textbook presents the mathematical theory and techniques necessary for analyzing and modeling high-performance global networks, such as the Internet. The three main building blocks of high-performance networks are links, switching equipment connecting the links together and software employed at the end nodes and intermediate switches. This book provides the basic techniques for modeling and analyzing these last two components. Topics covered include, but are not limited to: Markov chains and queuing analysis, traffic modeling, interconnection networks and switch architectures and buffering strategies.

This text/reference provides background for those new to the field, gives numerous problems sets and practical examples, and discusses computer aided design and analysis. Annotation copyright Book News, Inc. Portland, Or.

This book fits in the quest for highly efficient fully integrated xDSL modems for central office applications. It presents a summary of research at one of Europe 's most famous analog design research groups over a five year period. The book focuses on the line driver, the most demanding building block of the xDSL modem for lowering power.

The book covers the total design flow of monolithic CMOS high voltage circuits. It is essential reading for analog design engineers.

This book is dedicated to Prof. Peter Young on his 70th birthday. Professor Young has been a pioneer in systems and control, and over the past 45 years he has influenced many developments in this field. This volume comprises a collection of contributions by leading experts in system identification, time-series analysis, environmetric modelling and control system design - modern research in topics that reflect important areas of interest in Professor Young's research career. Recent theoretical developments in and relevant applications of these areas are explored treating the various subjects broadly and in depth. The authoritative and up-to-date research presented here will be of interest to academic researcher in control and disciplines related to environmental research, particularly those to with water systems. The tutorial style in which many of the contributions are composed also makes the book suitable as a source of study material for graduate students in those areas.

This book describes an approach for designing Systems-on-Chip such that the system meets precise mathematical requirements. The methodologies presented enable embedded systems designers to reuse intellectual property (IP) blocks from existing designs in an efficient, reliable manner, automatically generating correct SoCs from multiple, possibly mismatching, components.

Model based testing is the most powerful technique for testing hardware and software systems. Models in Hardware Testing describes the use of models at all the levels of hardware testing. The relevant fault models for nanoscaled CMOS technology are introduced, and their implications on fault simulation, automatic test pattern generation, fault diagnosis, memory testing and power aware testing are discussed. Models and the corresponding algorithms are considered with respect to the most recent state of the art, and they are put into a historical context by a concluding chapter on the use of physical fault models in fault tolerance.

Due to the ever increasing electric fields in scaled CMOS devices, reliability is becoming a showstopper for further scaled technology nodes. Although several groups have already demonstrated functional Si channel devices with aggressively scaled Equivalent Oxide Thickness (EOT) down to 5A, a 10 year reliable device operation cannot be guaranteed anymore due to severe Negative Bias Temperature Instability.

This book focuses on the reliability of the novel (Si)Ge channel quantum well pMOSFET technology. This technology is being considered for possible implementation in next CMOS technology nodes, thanks to its benefit in terms of carrier mobility and device threshold voltage tuning. We observe that it also opens a degree of freedom for device reliability optimization. By properly tuning the device gate stack, sufficiently reliable ultra-thin EOT devices with a 10 years lifetime at operating conditions are demonstrated.

The extensive experimental datasets collected on a variety of processed 300mm wafers and presented here show the reliability improvement to be process - and architecture-independent and, as such, readily transferable to advanced device architectures as Tri-Gate (finFET) devices. We propose a physical model to understand the intrinsically superior reliability of the MOS system consisting of a Ge-based channel and a SiO2/HfO2 dielectric stack.

The improved reliability properties here discussed strongly support (Si)Ge technology as a clear frontrunner for future CMOS technology nodes."

This edited volume presents the proceedings of the AMAA 2015 conference, Berlin, Germany. The topical focus of the 2015 conference lies on smart systems for green and automated driving. The automobile of the future has to respond to two major trends, the electrification of the drivetrain, and the automation of the transportation system. These trends will not only lead to greener and safer driving but re-define the concept of the car completely, particularly if they interact with each other in a synergetic way as for autonomous parking and charging, self-driving shuttles or mobile robots. Key functionalities like environment perception are enabled by electronic components and systems, sensors and actuators, communication nodes, cognitive systems and smart systems integration. The book will be a valuable read for research experts and professionals in the automotive industry but the book may also be beneficial for graduate students.

This book describes design techniques that can be used to mitigate crosstalk in high-speed I/O circuits. The focus of the book is in developing compact and low power integrated circuits for crosstalk cancellation, inter-symbol interference (ISI) mitigation and improved bit error rates (BER) at higher speeds. This book is one of the first to discuss in detail the problem of crosstalk and ISI mitigation encountered as data rates have continued beyond 10Gb/s. Readers will learn to avoid the data performance cliff, with circuits and design techniques described for novel, low power crosstalk cancellation methods that are easily combined with current ISI mitigation architectures.

Since scaling of CMOS is reaching the nanometer area serious limitations enforce the introduction of novel materials, device architectures and device concepts. Multi-gate devices employing high-k gate dielectrics are considered as promising solution overcoming these scaling limitations of conventional planar bulk CMOS. Variation Aware Analog and Mixed-Signal Circuit Design in Emerging Multi-Gate CMOS Technologies provides a technology oriented assessment of analog and mixed-signal circuits in emerging high-k and multi-gate CMOS technologies.

This book provides a single-source reference to the state-of-the art in tunneling field effect transistors (TFETs). Readers will learn the TFETs physics from advanced atomistic simulations, the TFETs fabrication process and the important roles that TFETs will play in enabling integrated circuit designs for power efficiency.

Since the 1997 Kyoto protocol of reduction of greenhouse gas emissions, the development of novel refrigerators has been a priority within the scientific community. Although magnetocaloric materials are promising candidates, they still need a large magnetic field to induce a giant T as well as powerful and costly magnets. However, in electrocaloric materials (ECMs) a temperature change may be achieved by applying or removing an electric field. Since a giant electrocaloric effect on ferroelectric thin films was reported in Science in 2006, researchers have been inspired to explore such effect in different ferroelectric thin films. This book reviews electrocaloric effects observed in bulk materials as well as recent promising advances in thin films, with special emphasis on the ferroelectric, antiferroelectric and relaxor nature of ECMs. It reports a number of considerations about the future of ECMs as a means of achieving an efficient, ecologically sustainable and low cost refrigerator.

The electronics and information technology revolution continues, but it is a critical time in the development of technology. Once again, we stand on the brink of a new era where emerging research will yield exciting applications and products destined to transform and enrich our daily lives! The potential is staggering and the ultimate impact is unimaginable, considering the continuing marriage of te- nology with fields such as medicine, communications and entertainment, to name only a few. But who will actually be responsible for transforming these potential new pr- ucts into reality? The answer, of course, is today's (and tomorrow's) design en- neers! The design of integrated circuits today remains an essential discipline in s- port of technological progress, and the authors of this book have taken a giant step forward in the development of a practice-oriented treatise for design engineers who are interested in the practical, industry-driven world of integrated circuit - sign.

This book shows that digitally assisted analog to digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits.

Ultra-thin chips are the "smart skin" of a conventional silicon chip. This book shows how very thin and flexible chips can be fabricated and used in many new applications in microelectronics, Microsystems, biomedical and other fields. It provides a comprehensive reference to the fabrication technology, post processing, characterization and the applications of ultra-thin chips.

This book provides an introduction to software-defined radio and cognitive radio, along with methodologies for applying knowledge representation, semantic web, logic reasoning and artificial intelligence to cognitive radio, enabling autonomous adaptation and flexible signaling. Readers from the wireless communications and software-defined radio communities will use this book as a reference to extend software-defined radio to cognitive radio, using the semantic technology described.

This book shares with readers practical design knowledge gained from the author's 24 years of IC design experience. The author addresses issues and challenges faced commonly by IC designers, along with solutions and workarounds. Guidelines are described for tackling issues such as clock domain crossing, using lockup latch to cross clock domains during scan shift, implementation of scan chains across power domain, optimization methods to improve timing, how standard cell libraries can aid in synthesis optimization, BKM (best known method) for RTL coding, test compression, memory BIST, usage of signed Verilog for design requiring +ve and -ve calculations, state machine, code coverage and much more. Numerous figures and examples are provided to aid the reader in understanding the issues and their workarounds.

This book is dedicated to the analysis of parametric amplification with special emphasis on the MOS discrete-time implementation. This implementation is demonstrated by the presentation of several circuits where the MOS parametric amplifier cell is used: small gain amplifier, comparator with embedded pre-amplification, discrete-time mixer/IIR-Filter, and analog-to-digital converter (ADC). Experimental results are shown to validate the overall design technique.

This book presents novel research techniques, algorithms, methodologies and experimental results for high level power estimation and power aware high-level synthesis. Readers will learn to apply such techniques to enable design flows resulting in shorter time to market and successful low power ASIC/FPGA design.

This book walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process and how to address each aspect at the proper design step starting with the design and layout of standard cells and how to yield-grade libraries for critical area and lithography artifacts through place and route, CMP model based simulation and dummy-fill insertion, mask planning, simulation and manufacturing, and through statistical design and statistical timing closure of the design. It alerts the designer to the pitfalls to watch for and to the good practices that can enhance a design's manufacturability and yield. This book is a must read book the serious practicing IC designer and an excellent primer for any graduate student intent on having a career in IC design or in EDA tool development.

This book presents a tutorial review of van der Pol model, a universal oscillator model for the analysis of modern RC oscillators in weak and strong nonlinear regimes. A detailed analysis of the injection locking in van der Pol oscillators is also presented. The relation between the van der Pol parameters and several circuit implementations in CMOS nanotechnology is given, showing that this theory is very useful in the optimization of oscillator key parameters, such as: frequency, amplitude and phase relationship. The authors discuss three different examples: active coupling RC oscillators, capacitive coupling RC oscillators, and two-integrator oscillator working in the sinusoidal regime. * Provides a detailed tutorial on the van der Pol oscillator model, which can be the basis for the analysis of modern RC oscillators in weak and strong nonlinear regimes; * Demonstrations the relationship between the van der Pol parameters and several circuit implementations in CMOS nanotechnology, showing that this theory is a powerful tool in the optimization of key oscillator parameters; * Provides three circuit prototypes implemented in modern CMOS nanotechnology in the GHz range, with applications in low area, low power, low cost, wireless sensor network (WSN) applications (e.g. IoT, BLE).

Solid State Lighting Reliability: Components to Systems begins with an explanation of the major benefits of solid state lighting (SSL) when compared to conventional lighting systems including but not limited to long useful lifetimes of 50,000 (or more) hours and high efficacy. When designing effective devices that take advantage of SSL capabilities the reliability of internal components (optics, drive electronics, controls, thermal design) take on critical importance. As such a detailed discussion of reliability from performance at the device level to sub components is included as well as the integrated systems of SSL modules, lamps and luminaires including various failure modes, reliability testing and reliability performance. A follow-up, Solid State Lighting Reliability Part 2, was published in 2017.

This handbook provides ready access to all of the major concepts, techniques, problems, and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, written by professionals in several disciplines, has treated notation and mathematics in ways that vary from source to source. This book opens with a clear description of the shortcomings of conventional testing as applied to complex digital circuits, revewing by comparison the principles of design for testability of more advanced digital technology. Offers in-depth discussions of test sequence generation and response data compression, including pseudorandom sequence generators; the mathematics of shift-register sequences and their potential for built-in testing. Also details random and memory testing and the problems of assessing the efficiency of such tests, and the limitations and practical concerns of built-in testing.