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Books > Professional & Technical > Electronics & communications engineering > Electronics engineering > Circuits & components
Due to the ever increasing electric fields in scaled CMOS devices, reliability is becoming a showstopper for further scaled technology nodes. Although several groups have already demonstrated functional Si channel devices with aggressively scaled Equivalent Oxide Thickness (EOT) down to 5A, a 10 year reliable device operation cannot be guaranteed anymore due to severe Negative Bias Temperature Instability. This book focuses on the reliability of the novel (Si)Ge channel quantum well pMOSFET technology. This technology is being considered for possible implementation in next CMOS technology nodes, thanks to its benefit in terms of carrier mobility and device threshold voltage tuning. We observe that it also opens a degree of freedom for device reliability optimization. By properly tuning the device gate stack, sufficiently reliable ultra-thin EOT devices with a 10 years lifetime at operating conditions are demonstrated. The extensive experimental datasets collected on a variety of processed 300mm wafers and presented here show the reliability improvement to be process - and architecture-independent and, as such, readily transferable to advanced device architectures as Tri-Gate (finFET) devices. We propose a physical model to understand the intrinsically superior reliability of the MOS system consisting of a Ge-based channel and a SiO2/HfO2 dielectric stack. The improved reliability properties here discussed strongly support (Si)Ge technology as a clear frontrunner for future CMOS technology nodes."
This edited volume presents the proceedings of the AMAA 2015 conference, Berlin, Germany. The topical focus of the 2015 conference lies on smart systems for green and automated driving. The automobile of the future has to respond to two major trends, the electrification of the drivetrain, and the automation of the transportation system. These trends will not only lead to greener and safer driving but re-define the concept of the car completely, particularly if they interact with each other in a synergetic way as for autonomous parking and charging, self-driving shuttles or mobile robots. Key functionalities like environment perception are enabled by electronic components and systems, sensors and actuators, communication nodes, cognitive systems and smart systems integration. The book will be a valuable read for research experts and professionals in the automotive industry but the book may also be beneficial for graduate students.
This book describes design techniques that can be used to mitigate crosstalk in high-speed I/O circuits. The focus of the book is in developing compact and low power integrated circuits for crosstalk cancellation, inter-symbol interference (ISI) mitigation and improved bit error rates (BER) at higher speeds. This book is one of the first to discuss in detail the problem of crosstalk and ISI mitigation encountered as data rates have continued beyond 10Gb/s. Readers will learn to avoid the data performance cliff, with circuits and design techniques described for novel, low power crosstalk cancellation methods that are easily combined with current ISI mitigation architectures.
Since scaling of CMOS is reaching the nanometer area serious limitations enforce the introduction of novel materials, device architectures and device concepts. Multi-gate devices employing high-k gate dielectrics are considered as promising solution overcoming these scaling limitations of conventional planar bulk CMOS. Variation Aware Analog and Mixed-Signal Circuit Design in Emerging Multi-Gate CMOS Technologies provides a technology oriented assessment of analog and mixed-signal circuits in emerging high-k and multi-gate CMOS technologies.
This book provides a single-source reference to the state-of-the art in tunneling field effect transistors (TFETs). Readers will learn the TFETs physics from advanced atomistic simulations, the TFETs fabrication process and the important roles that TFETs will play in enabling integrated circuit designs for power efficiency.
Since the 1997 Kyoto protocol of reduction of greenhouse gas emissions, the development of novel refrigerators has been a priority within the scientific community. Although magnetocaloric materials are promising candidates, they still need a large magnetic field to induce a giant T as well as powerful and costly magnets. However, in electrocaloric materials (ECMs) a temperature change may be achieved by applying or removing an electric field. Since a giant electrocaloric effect on ferroelectric thin films was reported in Science in 2006, researchers have been inspired to explore such effect in different ferroelectric thin films. This book reviews electrocaloric effects observed in bulk materials as well as recent promising advances in thin films, with special emphasis on the ferroelectric, antiferroelectric and relaxor nature of ECMs. It reports a number of considerations about the future of ECMs as a means of achieving an efficient, ecologically sustainable and low cost refrigerator.
The electronics and information technology revolution continues, but it is a critical time in the development of technology. Once again, we stand on the brink of a new era where emerging research will yield exciting applications and products destined to transform and enrich our daily lives! The potential is staggering and the ultimate impact is unimaginable, considering the continuing marriage of te- nology with fields such as medicine, communications and entertainment, to name only a few. But who will actually be responsible for transforming these potential new pr- ucts into reality? The answer, of course, is today's (and tomorrow's) design en- neers! The design of integrated circuits today remains an essential discipline in s- port of technological progress, and the authors of this book have taken a giant step forward in the development of a practice-oriented treatise for design engineers who are interested in the practical, industry-driven world of integrated circuit - sign.
This book shows that digitally assisted analog to digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits.
Ultra-thin chips are the "smart skin" of a conventional silicon chip. This book shows how very thin and flexible chips can be fabricated and used in many new applications in microelectronics, Microsystems, biomedical and other fields. It provides a comprehensive reference to the fabrication technology, post processing, characterization and the applications of ultra-thin chips.
This book provides an introduction to software-defined radio and cognitive radio, along with methodologies for applying knowledge representation, semantic web, logic reasoning and artificial intelligence to cognitive radio, enabling autonomous adaptation and flexible signaling. Readers from the wireless communications and software-defined radio communities will use this book as a reference to extend software-defined radio to cognitive radio, using the semantic technology described.
This book shares with readers practical design knowledge gained from the author's 24 years of IC design experience. The author addresses issues and challenges faced commonly by IC designers, along with solutions and workarounds. Guidelines are described for tackling issues such as clock domain crossing, using lockup latch to cross clock domains during scan shift, implementation of scan chains across power domain, optimization methods to improve timing, how standard cell libraries can aid in synthesis optimization, BKM (best known method) for RTL coding, test compression, memory BIST, usage of signed Verilog for design requiring +ve and -ve calculations, state machine, code coverage and much more. Numerous figures and examples are provided to aid the reader in understanding the issues and their workarounds.
This book is dedicated to the analysis of parametric amplification with special emphasis on the MOS discrete-time implementation. This implementation is demonstrated by the presentation of several circuits where the MOS parametric amplifier cell is used: small gain amplifier, comparator with embedded pre-amplification, discrete-time mixer/IIR-Filter, and analog-to-digital converter (ADC). Experimental results are shown to validate the overall design technique.
This book presents novel research techniques, algorithms, methodologies and experimental results for high level power estimation and power aware high-level synthesis. Readers will learn to apply such techniques to enable design flows resulting in shorter time to market and successful low power ASIC/FPGA design.
This book is a comprehensive guide to new DFT methods that will
show the readers how to design a testable and quality product,
drive down test cost, improve product quality and yield, and speed
up time-to-market and time-to-volume.
This book walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process and how to address each aspect at the proper design step starting with the design and layout of standard cells and how to yield-grade libraries for critical area and lithography artifacts through place and route, CMP model based simulation and dummy-fill insertion, mask planning, simulation and manufacturing, and through statistical design and statistical timing closure of the design. It alerts the designer to the pitfalls to watch for and to the good practices that can enhance a design's manufacturability and yield. This book is a must read book the serious practicing IC designer and an excellent primer for any graduate student intent on having a career in IC design or in EDA tool development.
This book presents a tutorial review of van der Pol model, a universal oscillator model for the analysis of modern RC oscillators in weak and strong nonlinear regimes. A detailed analysis of the injection locking in van der Pol oscillators is also presented. The relation between the van der Pol parameters and several circuit implementations in CMOS nanotechnology is given, showing that this theory is very useful in the optimization of oscillator key parameters, such as: frequency, amplitude and phase relationship. The authors discuss three different examples: active coupling RC oscillators, capacitive coupling RC oscillators, and two-integrator oscillator working in the sinusoidal regime. * Provides a detailed tutorial on the van der Pol oscillator model, which can be the basis for the analysis of modern RC oscillators in weak and strong nonlinear regimes; * Demonstrations the relationship between the van der Pol parameters and several circuit implementations in CMOS nanotechnology, showing that this theory is a powerful tool in the optimization of key oscillator parameters; * Provides three circuit prototypes implemented in modern CMOS nanotechnology in the GHz range, with applications in low area, low power, low cost, wireless sensor network (WSN) applications (e.g. IoT, BLE).
Solid State Lighting Reliability: Components to Systems begins with an explanation of the major benefits of solid state lighting (SSL) when compared to conventional lighting systems including but not limited to long useful lifetimes of 50,000 (or more) hours and high efficacy. When designing effective devices that take advantage of SSL capabilities the reliability of internal components (optics, drive electronics, controls, thermal design) take on critical importance. As such a detailed discussion of reliability from performance at the device level to sub components is included as well as the integrated systems of SSL modules, lamps and luminaires including various failure modes, reliability testing and reliability performance. A follow-up, Solid State Lighting Reliability Part 2, was published in 2017.
This handbook provides ready access to all of the major concepts, techniques, problems, and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, written by professionals in several disciplines, has treated notation and mathematics in ways that vary from source to source. This book opens with a clear description of the shortcomings of conventional testing as applied to complex digital circuits, revewing by comparison the principles of design for testability of more advanced digital technology. Offers in-depth discussions of test sequence generation and response data compression, including pseudorandom sequence generators; the mathematics of shift-register sequences and their potential for built-in testing. Also details random and memory testing and the problems of assessing the efficiency of such tests, and the limitations and practical concerns of built-in testing.
This book aims to present a viable alternative to the Hopfield Neural Network (HNN) model for analog computation. It is well known the standard HNN suffers from problems of convergence to local minima, and requirement of a large number of neurons and synaptic weights. Therefore, improved solutions are needed. The non-linear synapse neural network (NoSyNN) is one such possibility and is discussed in detail in this book. This book also discusses the applications in computationally intensive tasks like graph coloring, ranking, and linear as well as quadratic programming. The material in the book is useful to students, researchers and academician working in the area of analog computation.
High-speed Photodiodes in Standard CMOS Technology describes high-speed photodiodes in standard CMOS technology which allow monolithic integration of optical receivers for short-haul communication. For short haul communication the cost aspect is important, and therefore it is desirable that the optical receiver can be integrated in the same CMOS technology as the rest of the system. If this is possible then ultimately a singe-chip system including optical inputs becomes feasible, eliminating EMC and crosstalk problems, while data rate can be extremely high. The problem of photodiodes in standard CMOS technology it that they have very limited bandwidth, allowing data rates up to only 50Mbit per second. High-speed Photodiodes in Standard CMOS Technology first analyzes the photodiode behaviour and compares existing solutions to enhance the speed. After this, the book introduces a new and robust electronic equalizer technique that makes data rates of 3Gb/s possible, without changing the manufacturing technology. The application of this technique can be found in short haul fibre communication, optical printed circuit boards, but also photodiodes for laser disks.
This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes. It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package.
There are many techniques for analyzing IC fails, but they are scattered over the professional IC test and diagnosis literature, and in various statistics and data mining handbooks. Moreover, many data mining techniques that are standard in other data analysis environments, and that are appropriate for analyzing IC fails, have not yet been employed for that purpose. Data Mining and Diagnosing IC Fails addresses the problem of obtaining maximum information from (functional) integrated circuit fail data about the defects that caused the fails. It starts at the highest level from mere sort codes, and drills down via various data mining techniques to detailed logic diagnosis. The various approaches discussed in this book have a thorough theoretical underpinning, but are geared towards applications on real life fail data and state of the art ICs. This book brings together a large number of analysis techniques that are suitable for IC fail data, but that are not available elsewhere in a single place. Several of the techniques, in fact, have been presented only recently in technical conferences. The purpose of the book is to bring together in one place a large number of analysis, data mining and diagnosis techniques that have proven to be useful in analyzing IC fails. The descriptions of the techniques and analysis routines is sufficiently detailed that professional manufacturing engineers can implement them in their own work environment.
Simplified Design of V/F Converters shows how to design and experiment with V/F converters, both voltage-to-frequency and frequency-to-voltage. The design approach here is the same one used in all of John Lenk's best-selling books on simplified and practical design. Throughout the book, design problems start with guidelines for selecting all components on a trial-value basis, assuming a specific design goal and set of conditions. Then, using the guideline values in experimental circuits, the desired results are produced by varying the experimental component values, if needed.
High-speed, power-efficient analog integrated circuits can be used as standalone devices or to interface modern digital signal processors and micro-controllers in various applications, including multimedia, communication, instrumentation, and control systems. New architectures and low device geometry of complementary metaloxidesemiconductor (CMOS) technologies have accelerated the movement toward system on a chip design, which merges analog circuits with digital, and radio-frequency components.
Autonomous sensors transmit data and power their electronics without using cables. They can be found in e.g. wireless sensor networks (WSNs) or remote acquisition systems. Although primary batteries provide a simple design for powering autonomous sensors, they present several limitations such as limited capacity and power density, and difficulty in predicting their condition and state of charge. An alternative is to extract energy from the ambient (energy harvesting). However, the reduced dimensions of most autonomous sensors lead to a low level of available power from the energy transducer. Thus, efficient methods and circuits to manage and gather the energy are a must. An integral approach for powering autonomous sensors by considering both primary batteries and energy harvesters is presented.Two rather different forms of energy harvesting are also dealt with: optical (or solar) and radiofrequency (RF). Optical energy provides high energy density, especially outdoors, whereas RF remote powering is possibly the most feasible option for autonomous sensors embedded into the soil or within structures. Throughout different chapters, devices such as primary and secondary batteries, supercapacitors, and energy transducers are extensively reviewed. Then, circuits and methods found in the literature used to efficiently extract and gather the energy are presented. Finally, new proposals based on the authors own research are analyzed and tested. Every chapter is written to be rather independent, with each incorporating the relevant literature references. "Powering Autonomous Sensors" is intended for a wide audience working on or interested in the powering of autonomous sensors. Researchers and engineers can find a broad introduction to basic topics in this interesting and emerging area as well as further insights on the topics of solar and RF harvesting and of circuits and methods to maximize the power extracted from energy transducers. |
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