This book introduces a new cyberphysical system that combines clinical and basic neuroscience research with advanced data analysis and medical management tools for developing novel applications for the management of epilepsy. The authors describe the algorithms and architectures needed to provide ambulatory, diagnostic and long-term monitoring services, through multi parametric data collection. Readers will see how to achieve in-hospital quality standards, addressing conventional "routine" clinic-based service purposes, at reduced cost, enhanced capability and increased geographical availability. The cyberphysical system described in this book is flexible, can be optimized for each patient and is demonstrated in several case studies.

This book offers readers a set of new approaches and tools a set of tools and techniques for facing challenges in parallelization with design of embedded systems. It provides an advanced parallel simulation infrastructure for efficient and effective system-level model validation and development so as to build better products in less time. Since parallel discrete event simulation (PDES) has the potential to exploit the underlying parallel computational capability in today's multi-core simulation hosts, the author begins by reviewing the parallelization of discrete event simulation, identifying problems and solutions. She then describes out-of-order parallel discrete event simulation (OoO PDES), a novel approach for efficient validation of system-level designs by aggressively exploiting the parallel capabilities of todays' multi-core PCs. This approach enables readers to design simulators that can fully exploit the parallel processing capability of the multi-core system to achieve fast speed simulation, without loss of simulation and timing accuracy. Based on this parallel simulation infrastructure, the author further describes automatic approaches that help the designer quickly to narrow down the debugging targets in faulty ESL models with parallelism.

Organic and printed electronics can enable a revolution in the applications of electronics and this book offers readers an overview of the state-of-the-art in this rapidly evolving domain. The potentially low cost, compatibility with flexible substrates and the wealth of devices that characterize organic and printed electronics will make possible applications that go far beyond the well-known displays made with large-area silicon electronics. Since organic electronics are still in their early stage, undergoing transition from lab-scale and prototype activities to production, this book serves as a valuable snapshot of the current landscape of the different devices enabled by this technology, reviewing all applications that are developing and those can be foreseen. "

From the reviews: " ...] a welcome addition to the literature. ...] This book promises to make a valuable contribution to the education of graduate students in electrical and computer engineering, and a very useful addition to the library of the maturer investigator in SoC designs or related fields." Microelectronics Reliability

The work establishes the design flow for the optimization of linear CMOS power amplifiers from the first steps of the design to the final IC implementation and tests. The authors also focuses on design guidelines of the inductor's geometrical characteristics for power applications and covers their measurement and characterization. Additionally, a model is proposed which would facilitate designs in terms of transistor sizing, required inductor quality factors or minimum supply voltage. The model considers limitations that CMOS processes can impose on implementation. The book also provides different techniques and architectures that allow for optimization.

Analog design is one of the more difficult aspects of electrical engineering. The main reason is the apparently vague decisions an experienced designer makes in optimizing his circuit. To enable fresh designers, like students electrical engineering, to become acquainted with analog circuit design, structuring the analog design process is of utmost importance.
Structured Electronic Design: Negative-Feedback Amplifiers presents a design methodology for negative-feedback amplifiers. The design methodology enables to synthesize a topology and to, at the same time, optimize the performance of that topology.
Key issues in the design methodology are orthogonalization, hierarchy and simple models. Orthogonalization enables the separate optimization of the three fundamental quality aspects: noise, distortion and bandwidth. Hierarchy ensures that the right decisions are made at the correct level of abstraction. The use of simple models, results in simple calculations yielding maximum-performance indicators that can be used to reject wrong circuits relatively fast.
The presented design methodology divides the design of negative-feedback amplifiers in six independent steps. In the first two steps, the feedback network is designed. During those design steps, the active part is assumed to be a nullor, i.e. the performance with respect to noise, distortion and bandwidth is still ideal.
In the subsequent four steps, an implementation for the active part is synthesized. During those four steps the topology of the active part is synthesized such that optimum performance is obtained. Firstly, the input stage is designed with respect to noise performance. Secondly, the output stage isdesigned with respect to clipping distortion. Thirdly, the bandwidth performance is designed, which may require the addition of an additional amplifying stage. Finally, the biasing circuitry for biasing the amplifying stages is designed.
By dividing the design in independent design steps, the total global optimization is reduced to several local optimizations. By the specific sequence of the design steps, it is assured that the local optimizations yield a circuit that is close to the global optimum. On top of that, because of the separate dedicated optimizations, the resource use, like power, is tracked clearly.
Structured Electronic Design: Negative-Feedback Amplifiers presents in two chapters the background and an overview of the design methodology. Whereafter, in six chapters the separate design steps are treated with great detail. Each chapter comprises several exercises. An additional chapter is dedicated to how to design current sources and voltage source, which are required for the biasing. The final chapter in the book is dedicated to a thoroughly described design example, showing clearly the benefits of the design methodology.
In short, this book is valuable for M.Sc.-curriculum Electrical Engineering students, and of course, for researchers and designers who want to structure their knowledge about analog design further.

Computerarchitecturepresentlyfacesanunprecedentedrevolution: Thestep from monolithic processors towards multi-core ICs, motivated by the ever - creasingneedforpowerandenergyef ciencyinnanoelectronics. Whetheryou prefer to call it MPSoC (multi-processor system-on-chip) or CMP (chip mul- processor), no doubt this revolution affects large domains of both computer science and electronics, and it poses many new interdisciplinary challenges. For instance, ef cient programming models and tools for MPSoC are largely an open issue: "Multi-core platforms are a reality - but where is the software support" (R. Lauwereins, IMEC). Solving it will require enormous research efforts as well as the education of a whole new breed of software engineers that bring the results from universities into industrial practice. Atthesametime, thedesignofcomplexMPSoCarchitecturesisanextremely time-consuming task, particularly in the wireless and multimedia application domains, where heterogeneous architectures are predominant. Due to the - ploding NRE and mask costs most companies are now following a platform approach: Invest a large (but one-time) design effort into a proper core - chitecture, and create easy-to-design derivatives for new standards or product features. Needless to say, only the most ef cient MPSoC platforms have a real chance to enjoy a multi-year lifetime on the highly competitive semiconductor market for embedded systems.

This book provides a single-source reference on the use of carbon nanotubes (CNTs) as interconnect material for horizontal, on-chip and 3D interconnects. The authors demonstrate the uses of bundles of CNTs, as innovative conducting material to fabricate interconnect through-silicon vias (TSVs), in order to improve the performance, reliability and integration of 3D integrated circuits (ICs). This book will be first to provide a coherent overview of exploiting carbon nanotubes for 3D interconnects covering aspects from processing, modeling, simulation, characterization and applications. Coverage also includes a thorough presentation of the application of CNTs as horizontal on-chip interconnects which can potentially revolutionize the nanoelectronics industry. This book is a must-read for anyone interested in the state-of-the-art on exploiting carbon nanotubes for interconnects for both 2D and 3D integrated circuits.

This book describes the current state of the art in big-data analytics, from a technology and hardware architecture perspective. The presentation is designed to be accessible to a broad audience, with general knowledge of hardware design and some interest in big-data analytics. Coverage includes emerging technology and devices for data-analytics, circuit design for data-analytics, and architecture and algorithms to support data-analytics. Readers will benefit from the realistic context used by the authors, which demonstrates what works, what doesn’t work, and what are the fundamental problems, solutions, upcoming challenges and opportunities. Provides a single-source reference to hardware architectures for big-data analytics; Covers various levels of big-data analytics hardware design abstraction and flow, from device, to circuits and systems; Demonstrates how non-volatile memory (NVM) based hardware platforms can be a viable solution to existing challenges in hardware architecture for big-data analytics.

Kinetic energy harvesting converts movement or vibrations into electrical energy, enables battery free operation of wireless sensors and autonomous devices and facilitates their placement in locations where replacing a battery is not feasible or attractive. This book provides an introduction to operating principles and design methods of modern kinetic energy harvesting systems and explains the implications of harvested power on autonomous electronic systems design. It describes power conditioning circuits that maximize available energy and electronic systems design strategies that minimize power consumption and enable operation. The principles discussed in the book will be supported by real case studies such as battery-less monitoring sensors at water waste processing plants, embedded battery-less sensors in automotive electronics and sensor-networks built with ultra-low power wireless nodes suitable for battery-less applications.

Active RC filters were first applied in the late 1950s. Since then, there has been a rapid development in both theoretical research and practical realization methods, as witnessed by the appearance of some 3,000 publications on active RC filters. This abundance of literature has, however, caused a great deal of confusion for non-specialist engineers. In order to solve a problem of filter design, a prolonged study is usually needed in order to make the correct choice between a wide variety of filter structures. Furthermore, most publications are intended to solve detailed problems for experts in the field, with little useful contribution for practising electrical engineers.
Now, with the aid of this book, the designer can find the structure and circuit elements of a specified active RC filter with relatively few calculations. Moreover, the filter thus designed will have transfer characteristics within the specified tolerances, and will comprise the least expensive (i.e. highest tolerance) components.

This book presents exact, that is minimal, solutions to individual steps in the design process for Digital Microfluidic Biochips (DMFBs), as well as a one-pass approach that combines all these steps in a single process. All of the approaches discussed are based on a formal model that can easily be extended to cope with further design problems. In addition to the exact methods, heuristic approaches are provided and the complexity classes of various design problems are determined. Presents exact methods to tackle a variety of design problems for Digital Microfluidic Biochips (DMFBs); Describes an holistic, one-pass approach solving different design steps all at once; Based on a formal model of DMFBs that is easily adaptable to deal with further design tasks.

Despite the recent development and interest in the photonics of metallic wire structures, the relatively simple concepts and physics often remain obscured or poorly explained to those who do not specialize in the field. Electromagnetic Behaviour of Metallic Wire Structures provides a clear and coherent guide to understanding these phenomena without excessive numerical calculations. Including both background material and detailed derivations of the various different formulae applied, Electromagnetic Behaviour of Metallic Wire Structures describes how to extend basic circuit theory relating to voltages, currents, and resistances of metallic wire networks to include situations where the currents are no longer spatially uniform along the wire. This lays a foundation for a deeper understanding of the many new phenomena observed in meta-electromagnetic materials. Examples of applications are included to support this new approach making Electromagnetic Behaviour of Metallic Wire Structures a comprehensive and self-contained volume suitable for use by specialists, non-specialist, researchers and professionals in other relevant fields and even students.

This self-contained book addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits. The material deals primarily with high-level (architectural or behavioral) energy dissipation.

Current multimedia and telecom applications require complex, heterogeneous multiprocessor system on chip (MPSoC) architectures with specific communication infrastructure in order to achieve the required performance. Heterogeneous MPSoC includes different types of processing units (DSP, microcontroller, ASIP) and different communication schemes (fast links, non standard memory organization and access).

Programming an MPSoC requires the generation of efficient software running on MPSoC from a high level environment, by using the characteristics of the architecture. This task is known to be tedious and error prone, because it requires a combination of high level programming environments with low level software design.

This book gives an overview of concepts related to embedded software design for MPSoC. It details a full software design approach, allowing systematic, high-level mapping of software applications on heterogeneous MPSoC. This approach is based on gradual refinement of hardware/software interfaces and simulation models allowing to validate the software at different abstraction levels.

This book combines Simulink for high level programming and SystemC for the low level software development. This approach is illustrated with multiple examples of application software and MPSoC architectures that can be used for deep understanding of software design for MPSoC.

Lead-free solders are used extensively as interconnection materials in electronic assemblies and play a critical role in the global semiconductor packaging and electronics manufacturing industry. Electronic products such as smart phones, notebooks and high performance computers rely on lead-free solder joints to connect IC chip components to printed circuit boards." Lead Free Solder: Mechanics and Reliability" provides in-depth design knowledge on lead-free solder elastic-plastic-creep and strain-rate dependent deformation behavior and its application in failure assessment of solder joint reliability. It includes coverage of advanced mechanics of materials theory and experiments, mechanical properties of solder and solder joint specimens, constitutive models for solder deformation behavior; numerical modeling and simulation of solder joint failure subject to thermal cycling, mechanical bending fatigue, vibration fatigue and board-level drop impact tests.

According to the Semiconductor Industry Association's 1999 International Technology Roadmap for Semiconductors, by the year 2008 the integration of more than 500 million transistors will be possible on a single chip. Integrating transistors on silicon will depend increasingly on design reuse.

Design reuse techniques have become the subject of books, conferences, and podium discussions over the last few years. However, most discussions focus on higher-level abstraction like RTL descriptions, which can be synthesized. Design reuse is often seen as an add-on to normal design activity, or a special design task that is not an integrated part of the existing design flow. This may all be true for the ASIC world, but not for high-speed, high-performance microprocessors.

In the field of high-speed microprocessors, design reuse is an integrated part of the design flow. The method of choice in this demanding field was, and is always, physical design reuse at the layout level. In the past, the practical implementations of this method were linear shrinks and the lambda approach. With the scaling of process technology down to 0.18 micron and below, this approach lost steam and became inefficient.
The only viable solution is a method, which is now called Automatic Layout Modification (ALM). It combines compaction, mask manipulation, and correction with powerful capabilities.

Automatic Layout Modification, Including design reuse of the Alpha CPU in 0.13 micron SOI technology is a welcome effort to improving some of the practices in chip design today. It is a comprehensive reference work on Automatic Layout Modification which will be valuable to VLSI courses at universities, and to CAD and circuit engineers and engineering managers.

This title deals with the design and analysis of log-domain filter circuits. It describes synthesis methods for developing bipolar or BiCMOS filter circuits with cut-off frequencies ranging from the low kilohertz range to several hundred megahertz. Numerous examples provide measured experimental data from IC prototypes.

This book presents the a scientific discussion of the state-of-the-art techniques and designs for modeling, testing and for the performance analysis of data converters. The focus is put on sustainable data conversion. Sustainability has become a public issue that industries and users can not ignore. Devising environmentally friendly solutions for data conversion designing, modeling and testing is nowadays a requirement that researchers and practitioners must consider in their activities. This book presents the outcome of the IWADC workshop 2011, held in Orvieto, Italy.

This book presents an updated selection of the most representative contributions to the 2nd and 3rd IEEE Workshops on Signal Propagation on Interconnects (SPI) which were held in TravemA1/4nde (Baltic Sea), Germany, May 13-15, 1998, and in Titisee-Neustadt (Black Forest), Germany, May 19-21, 1999. Interconnects in VLSI Design addresses the need of developers and researchers in the field of VLSI chip and package design. It offers a survey of current problems regarding the influence of interconnect effects on the electrical performance of electronic circuits and suggests innovative solutions. In this sense Interconnects in VLSI Design represents a continuation and a supplement to the first book, Signal Propagation on Interconnects, Kluwer Academic Publishers, 1998. The papers in Interconnects in VLSI Design cover a wide area of research directions. Apart from describing general trends they deal with the solution of signal integrity problems, the modeling of interconnects, parameter extraction using calculations and measurements and last, but not least, actual problems in the field of optical interconnects.

This book addresses reliability and energy efficiency of on-chip networks using cooperative error control. It describes an efficient way to construct an adaptive error control codec capable of tracking noise conditions and adjusting the error correction strength at runtime. Methods are also presented to tackle joint transient and permanent error correction, exploiting the redundant resources already available on-chip. A parallel and flexible network simulator is also introduced, which facilitates examining the impact of various error control methods on network-on-chip performance.

This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures. Readers will learn to avoid time-consuming and error-prone validation from the comprehensive coverage of system-level validation, including high-level modeling of designs and faults, automated generation of directed tests, and efficient validation methodology using directed tests and assertions. The methodologies described in this book will help designers to improve the quality of their validation, performing as much validation as possible in the early stages of the design, while reducing the overall validation effort and cost.

Direct-Write Technologies covers applications, materials, and the techniques in using direct-write technologies. This book provides an overview of the different direct write techniques currently available, as well as a comparison between the strengths and special attributes for each of the techniques. The techniques described open the door for building prototypes and testing materials. The book also provides an overview of the state-of-the-art technology involved in this field. Basic academic researchers and industrial development engineers who pattern thin film materials will want to have this text on their shelves as a resource for specific applications. Others in this or related fields will want the book to read the introductory material summarizing isuses common to all approaches, in order to compare and contrast different techniques. Everyday applications include electronic components and sensors, especially chemical and biosensors.
There is a wide range of research and development problems requiring state-of-the-art direct write tools. This book will appeal to basic researchers and development engineers in university engineering departments and at industrial and national research laboratories. This text should appeal equally well in the United States, Asia, and Europe.
Both basic academic researchers and industrial development engineers who pattern thin film materials will want to have this text on their shelves as a resource for specific applications.
This book provides
An overview of the different direct write techniques currently available
A comparison between the strengths and special attributes for each of the techniques
An overview of the state-of-the-art technology involved in this field.

This book is about various adaptive and dynamic techniques used to optimize processor power and performance. It is based on a very successful forum at ISSCC which focused on Adaptive Techniques.

The book looks at the underlying process technology for adaptive designs and then examines different circuits, architecture and software that address the different aspects. The chapters are written by people both in academia and the industry to show the scope of alternative practices.

Sigma delta modulation has become a very useful and widely applied technique for high performance Analog-to-Digital (A/D) conversion of narrow band signals. Through the use of oversampling and negative feedback, the quantization errors of a coarse quantizer are suppressed in a narrow signal band in the output of the modulator. Bandpass sigma delta modulation is well suited for A/D conversion of narrow band signals modulated on a carrier, as occurs in communication systems such as AM/FM receivers and mobile phones. Due to the nonlinearity of the quantizer in the feedback loop, a sigma delta modulator may exhibit input signal dependent stability properties. The same combination of the nonlinearity and the feedback loop complicates the stability analysis. In Bandpass Sigma Delta Modulators, the describing function method is used to analyze the stability of the sigma delta modulator. The linear gain model commonly used for the quantizer fails to predict small signal stability properties and idle patterns accurately. In Bandpass Sigma Delta Modulators an improved model for the quantizer is introduced, extending the linear gain model with a phase shift. Analysis shows that the phase shift of a sampled quantizer is in fact a phase uncertainty. Stability analysis of sigma delta modulators using the extended model allows accurate prediction of idle patterns and calculation of small-signal stability boundaries for loop filter parameters. A simplified rule of thumb is derived and applied to bandpass sigma delta modulators. The stability properties have a considerable impact on the design of single-loop, one-bit, high-order continuous-time bandpass sigma delta modulators. The continuous-time bandpass loop filter structure should have sufficient degrees of freedom to implement the desired (small-signal stable) sigma delta modulator behavior. Bandpass Sigma Delta Modulators will be of interest to practicing engineers and researchers in the areas of mixed-signal and analog integrated circuit design.