H-infinity engineering continues to establish itself as a discipline of applied mathematics. As such, this extensively illustrated monograph makes a significant application of H-infinity theory to electronic amplifier design, demonstrating how recent developments in H-infinity engineering equip amplifier designers with new tools and avenues for research.

The presentation, at the interface of applied mathematics and engineering, emphasizes how to (1) compute the best possible performance available from any matching circuits; (2) benchmark existing matching solutions; and (3) generalize results to multiple amplifiers. As the monograph develops, many research directions are pointed out for both disciplines. The physical meaning of a mathematical problem is made explicit for the mathematician, while circuit problems are presented in the H-infinity framework for the engineer. A final chapter organizes these research topics into a collection of open problems ranging from electrical engineering, numerical implementations, and generalizations to H-infinity theory.

This book discusses the trade-offs involved in designing direct RF digitization receivers for the radio frequency and digital signal processing domains. A system-level framework is developed, quantifying the relevant impairments of the signal processing chain, through a comprehensive system-level analysis. Special focus is given to noise analysis (thermal noise, quantization noise, saturation noise, signal-dependent noise), broadband non-linear distortion analysis, including the impact of the sampling strategy (low-pass, band-pass), analysis of time-interleaved ADC channel mismatches, sampling clock purity and digital channel selection. The system-level framework described is applied to the design of a cable multi-channel RF direct digitization receiver. An optimum RF signal conditioning, and some algorithms (automatic gain control loop, RF front-end amplitude equalization control loop) are used to relax the requirements of a 2.7GHz 11-bit ADC.
A two-chip implementation is presented, using BiCMOS and 65nm CMOS processes, together with the block and system-level measurement results. Readers will benefit from the techniques presented, which are highly competitive, both in terms of cost and RF performance, while drastically reducing power consumption.
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Cellular Neural Networks (CNNs) constitute a class of nonlinear, recurrent and locally coupled arrays of identical dynamical cells that operate in parallel. ANALOG chips are being developed for use in applications where sophisticated signal processing at low power consumption is required. Signal processing via CNNs only becomes efficient if the network is implemented in analog hardware. In view of the physical limitations that analog implementations entail, robust operation of a CNN chip with respect to parameter variations has to be insured. By far not all mathematically possible CNN tasks can be carried out reliably on an analog chip; some of them are inherently too sensitive. This book defines a robustness measure to quantify the degree of robustness and proposes an exact and direct analytical design method for the synthesis of optimally robust network parameters. The method is based on a design centering technique which is generally applicable where linear constraints have to be satisfied in an optimum way. Processing speed is always crucial when discussing signal-processing devices. In the case of the CNN, it is shown that the setting time can be specified in closed analytical expressions, which permits, on the one hand, parameter optimization with respect to speed and, on the other hand, efficient numerical integration of CNNs. Interdependence between robustness and speed issues are also addressed. Another goal pursued is the unification of the theory of continuous-time and discrete-time systems. By means of a delta-operator approach, it is proven that the same network parameters can be used for both of these classes, even if their nonlinear output functions differ. More complex CNN optimization problems that cannot be solved analytically necessitate resorting to numerical methods. Among these, stochastic optimization techniques such as genetic algorithms prove their usefulness, for example in image classification problems. Since the inception of the CNN, the problem of finding the network parameters for a desired task has been regarded as a learning or training problem, and computationally expensive methods derived from standard neural networks have been applied. Furthermore, numerous useful parameter sets have been derived by intuition. In this book, a direct and exact analytical design method for the network parameters is presented. The approach yields solutions which are optimum with respect to robustness, an aspect which is crucial for successful implementation of the analog CNN hardware that has often been neglected. This beautifully rounded work provides many interesting and useful results, for both CNN theorists and circuit designers.' Leon O. Chua

This book deals with energy delivery challenges of the power processing unit of modern computer microprocessors. It describes in detail the consequences of current trends in miniaturization and clock frequency increase, upon the power delivery unit, referred to as voltage regulator. This is an invaluable reference for anybody needing to understand the key performance limitations and opportunities for improvement, from both a circuit and systems perspective, of state-of-the-art power solutions for next generation CPUs.

High-speed, power-efficient analog integrated circuits can be used as standalone devices or to interface modern digital signal processors and micro-controllers in various applications, including multimedia, communication, instrumentation, and control systems. New architectures and low device geometry of complementary metaloxidesemiconductor (CMOS) technologies have accelerated the movement toward system on a chip design, which merges analog circuits with digital, and radio-frequency components.

This book provides a comprehensive introduction to integrated optical waveguides for information technology and data communications. Integrated coverage ranges from advanced materials, fabrication, and characterization techniques to guidelines for design and simulation. A concluding chapter offers perspectives on likely future trends and challenges. The dramatic scaling down of feature sizes has driven exponential improvements in semiconductor productivity and performance in the past several decades. However, with the potential of gigascale integration, size reduction is approaching a physical limitation due to the negative impact on resistance and inductance of metal interconnects with current copper-trace based technology. Integrated optics provides a potentially lower-cost, higher performance alternative to electronics in optical communication systems. Optical interconnects, in which light can be generated, guided, modulated, amplified, and detected, can provide greater bandwidth, lower power consumption, decreased interconnect delays, resistance to electromagnetic interference, and reduced crosstalk when integrated into standard electronic circuits. Integrated waveguide optics represents a truly multidisciplinary field of science and engineering, with continued growth requiring new developments in modeling, further advances in materials science, and innovations in integration platforms. In addition, the processing and fabrication of these new devices must be optimized in conjunction with the development of accurate and precise characterization and testing methods. Students and professionals in materials science and engineering will find "Advanced Materials for Integrated Optical Waveguides" to be an invaluable reference for meeting these research and development goals.

The activities of the semiconductor industry to introduce a new, large wafer diameter were triggered by expected potential overall savings - cost and resource - and an anticipated increasing demand for Silicon wafers. In the beginning, around 1994, agreement on the diameter of the next wafer generation had to be achieved and finally 300 mm was globally accepted to be the next wafer diameter, a decision obtained at international summits in 1994/1995, based on the work of a SEMI task force.
Several workshops on 300 mm wafers have been held by SEMI, JSNM and other organizations during the past few years. However, the present E-MRS conference on "Techniques and Challenges for 300 mm Silicon: Processing, Characterization, Modeling and Equipment" was the first international scientific conference about this subject.
The papers - invited as well as submitted - cover a wide range of subjects, financial issues, fab concepts, crystal growth, wafer process development, material and defect issues, wafer characterization and provide an excellent review of the present status of 300 mm technology.

This text, the first of its kind, delivers a systematically organized introduction to the theory and practice of yield prediction. The book addresses the economic need for accurate yield prediction, and clarifies the important role it plays in the semiconductor industry.

The need for advanced thermal management materials in electronic packaging has been widely recognized as thermal challenges become barriers to the electronic industry's ability to provide continued improvements in device and system performance. With increased performance requirements for smaller, more capable, and more efficient electronic power devices, systems ranging from active electronically scanned radar arrays to web servers all require components that can dissipate heat efficiently. This requires that the materials have high capability of dissipating heat and maintaining compatibility with the die and electronic packaging. In response to critical needs, there have been revolutionary advances in thermal management materials and technologies for active and passive cooling that promise integrable and cost-effective thermal management solutions. This book meets the need for a comprehensive approach to advanced thermal management in electronic packaging, with coverage of the fundamentals of heat transfer, component design guidelines, materials selection and assessment, air, liquid, and thermoelectric cooling, characterization techniques and methodology, processing and manufacturing technology, balance between cost and performance, and application niches. The final chapter presents a roadmap and future perspective on developments in advanced thermal management materials for electronic packaging.

The exponential growth of the number of internet nodes has suddenly created a widespread demand for high-speed optical and electronic devices, circuits, and systems. The new optical revolution has replaced modular, general-purpose building blocks by end-to-end solutions. Greater levels of integration on a single chip enable higher performance and lower cost. The mainstream VLSI technologies such as BiCmos and CMOS continue to take over the territories thus far claimed by GaAs and InP devices. This calls for an up-to-date book describing the design of high-speed electronic circuits for optical communication using modern techniques in a low-cost CMOS process. High-Speed CMOS Circuits for Optical Receivers covers the design of the world's first and second 10 Gb/s clock and data recovery circuits fabricated in a pure CMOS process. The second prototype meets some of the critical requirements recommended by the SONET OC-192 standard. The clock and data recovery circuits consume a power several times lower than in prototypes built in other fabrication processes. High-Speed CMOS Circuits for Optical Receivers describes novel techniques for implementation of such high-speed, high-performance circuits in a pure CMOS process. High-Speed CMOS Circuits for Optical Receivers is written for researchers and students interested in high-speed and mixed-mode circuit design with focus on CMOS circuit techniques. Designers working on various high-speed circuit projects for data communication, including optical com., giga bit ethernet will also find it of interest.

Based on the author's real-world design experience in this key emerging area, this comprehensive guide examines and compares all major RF power amplifier linearization techniques in detail. Featuring practical tips, more than 250 illustrations, and over 600 verified equations, the book seeks to save the reader valuable design time whilst helping them avoid costly design errors. It covers the modelling and measurement of amplifier non-linearity, and describes the main methods for overcoming non-linearity in a wide range of applications, including: base stations using feedforward and predistortion; mobile communications systems and handsets using RF or digital predistortion, cartesian loop, LINC and envelope elimination and restoration (EECR); and satellite systems.

This volume starts with a description of the metrics and benchmarks used to design energy-efficient microprocessor systems, followed by energy-efficient methodologies for the architecture and circuit design, DC-DC conversion, energy-efficient software and system integration.

Multicore Processors and Systems provides a comprehensive overview of emerging multicore processors and systems. It covers technology trends affecting multicores, multicore architecture innovations, multicore software innovations, and case studies of state-of-the-art commercial multicore systems. A cross-cutting theme of the book is the challenges associated with scaling up multicore systems to hundreds of cores.

The book provides an overview of significant developments in the architectures for multicore processors and systems. It includes chapters on fundamental requirements for multicore systems, including processing, memory systems, and interconnect. It also includes several case studies on commercial multicore systems that have recently been developed and deployed across multiple application domains. The architecture chapters focus on innovative multicore execution models as well as infrastructure for multicores, including memory systems and on-chip interconnections. The case studies examine multicore implementations across different application domains, including general purpose, server, media/broadband, network processing, and signal processing.

Multicore Processors and Systems is the first book that focuses solely on multicore processors and systems, and in particular on the unique technology implications, architectures, and implementations. The book has contributing authors that are from both the academic and industrial communities.

This book presents new methods of circuit design for guitar electronics, based directly upon U.S. Non-Provisional Patent Applications. By systematic construction of unique series-parallel circuit topologies, the author shows how many series-parallel circuits are possible, including non-matched single-coil pickups, humbucking pickups, and humbucking combinations of matched single-coil pickups. This allows designers to avoid unnecessary and confusing duplicate circuits in pickup switching systems. It shows how electromechanical switches cannot produce the maximum number of tones for more than 2 or 3 pickups. Thus the author discloses an efficient micro-controller and cross-point switch architecture to replace mechanical switches, and allow access to the maximum number of tones. The discussion continues, developing humbucking circuits for odd numbers of matched single-coil pickups, extendable to any odd or even number, greater than 1, using a simplified switching system with very simple rules. It abandons some tones in favor of producing all-humbucking and unique tones, no matter what the switching choice. The author discloses both mechanical and digital switching versions. Then, based on using humbucking basis vectors, the author discloses variable-gain circuits that duplicate all possible switched humbucking tone circuits, and produces all the continuous tone gradations in between. The presentation includes analog and digitally controlled systems. The object of all the disclosures: give the guitarist or pianist a system which allows going from bright to warm tones and back, without ever needing to know which pickups are used in what combination.

Neurobiology research suggests that information can be represented by the location of an activity spot in a population of cells (place coding'), and that this information can be processed by means of networks of interconnections. Place Coding in Analog VLSI defines a representation convention of similar flavor intended for analog-integrated circuit design. It investigates its properties and suggests ways to build circuits on the basis of this coding scheme. In this electronic version of place coding, numbers are represented by the state of an array of nodes called a map, and computation is carried out by a network of links. In the simplest case, a link is just a wire connecting a node of an input map to a node of an output map. In other cases, a link is an elementary circuit cell. Networks of links are somewhat reminiscent of look-up tables in that they hardwire an arbitrary function of one or several variables. Interestingly, these structures are also related to fuzzy rules, as well as some types of artificial neural networks. The place coding approach provides several substantial benefits over conventional analog design: Networks of links can be synthesized by a simple procedure whatever the function to be computed. Place coding is tolerant to perturbations and noise in current-mode implementations. Tolerance to noise implies that the fundamental power dissipation limits of conventional analog circuits can be overcome by using place coding. The place coding approach is illustrated by three integrated circuits computing non-linear functions of several variables. The simplest one is made up of 80 links and achieves submicrowatt power consumption in continuous operation. The most complex one incorporates about 1800 links for a power consumption of 6 milliwatts, and controls the operation of an active vision system with a moving field of view. Place Coding in Analog VLSI is primarily intended for researchers and practicing engineers involved in analog and digital hardware design (especially bio-inspired circuits). The book is also a valuable reference for researchers and students in neurobiology, neuroscience, robotics, fuzzy logic and fuzzy control.

This consistently written book provides a comprehensive presentation of a multitude of results stemming from the author's as well as various researchers' work in the field. It also covers functional decomposition for incompletely specified functions, decomposition for multi-output functions and non-disjoint decomposition.

This book describes for readers a methodology for dynamic power estimation, using Transaction Level Modeling (TLM). The methodology exploits the existing tools for RTL simulation, design synthesis and SystemC prototyping to provide fast and accurate power estimation using Transaction Level Power Modeling (TLPM). Readers will benefit from this innovative way of evaluating power on a high level of abstraction, at an early stage of the product life cycle, decreasing the number of the expensive design iterations.

DSP Integrated Circuits establishes the essential interface between theory of digital signal processing algorithms and their implementation in full-custom CMOS technology. With an emphasis on techniques for co-design of DSP algorithms and hardware in order to achieve high performance in terms of throughput, low power consumption, and design effort, this book provides the professional engineer, researcher, and student with a firm foundation in the theoretical as well as the practical aspects of designing high performance DSP integrated circuits.
Centered around three design case studies, DSP Integrated Circuits thoroughly details a high-performance FFT processor, a 2-D Discrete Cosine Transform for HDTV, and a wave digital filter for interpolation of the sampling frequency. The case studies cover the essential parts of the design process in a top-down manner, from specification of algorithm design and optimization, scheduling of operations, synthesis of optimal architectures, realization of processing elements, to the floor-planning of the integrated circuit.
* Details the theory and design of digital filters - particularly wave digital filters, multi-rate digital filters, fast Fourier transforms (FFT's), and discrete cosine transforms (DCT's)
* Follows three complete "real-world" case studies throughout the book
* Provides complete coverage of finite word length effects in DSP algorithms
* In-depth survey of the computational properties of DSP algorithms and their mapping to optimal architectures
* Outlines DSP architectures and parallel, bit-serial, and distributed arithmetic
* Presents the design process in a top-down manner and incorporates numerous problemsand solutions

Emerging Memories: Technologies and Trends attempts to provide background and a description of the basic technology, function and properties of emerging as well as discussing potentially suitable applications.
This book explores a range of new memory products and technologies. The concept for some of these memories has been around for years. A few completely new. Some involve materials that have been in volume production in other type of devices for some time. Ferro-electrics, for example, have been used in capacitors for more than 30 years. In addition to looking at using known devices and materials in novel ways, there are new technologies being investigated such as DNA memories, light memories, molecular memories, and carbon nanotube memories, as well as the new polymer memories which hold the potential for the significant manufacturing reduction.
Emerging Memories: Technologies and Trends is a useful reference for the professional engineer in the semiconductor industry.

This book introduces systematic design methods for passive and active RF circuits and techniques, including state-of-the-art digital enhancement techniques. As the very first book dedicated to multiband RF circuits and techniques, this work provides an overview of the evolution of transmitter architecture and discusses current digital predistortion techniques. Readers will find a collection of novel research ideas and new architectures in concurrent multiband power dividers, power amplifiers and related digital enhancement techniques. This book will be of great interest to academic researchers, R&D engineers, wireless transmitter and protocol designers, as well as graduate students who wish to learn the core architectures, principles and methods of multiband RF circuits and techniques.

Yield and reliability of memories have degraded with device and voltage scaling in the nano-scale era, due to ever-increasing hard/soft errors and device parameter variations. This book systematically describes these yield and reliability issues in terms of mathematics and engineering, as well as an array of repair techniques, based on the authors' long careers in developing memories and low-voltage CMOS circuits. Nanoscale Memory Repair gives a detailed explanation of the various yield models and calculations, as well as various, practical logic and circuits that are critical for higher yield and reliability.

Wireless ad hoc networks, mobile or static, have special resource requirements and different topology features, which make them different from classic computer networks in resource management, routing, media access control, and QoS provisioning. The book presents papers written by distinguished researchers in the field and focuses on the theoretical and experimental study of the following advanced research topics: security and trust, broadcasting and multicasting; power control and energy efficiency, and QoS provisioning. This book is a great reference tool for graduate students, researchers, and mathematicians interested in studying mobile ad hoc and sensor networks.

This book presents new circuits and systems for implantable biomedical applications targeting neural recording. The authors describe a system design adapted to conform to the requirements of an epilepsy monitoring system. Throughout the book, these requirements are reflected in terms of implant size, power consumption, and data rate. In addition to theoretical background which explains the relevant technical challenges, the authors provide practical, step-by-step solutions to these problems. Readers will gain understanding of the numerical values in such a system, enabling projections for feasibility of new projects.

Compliance with the Low Voltage Directive (LVD) is now essential for CE marking. Products cannot leave your firm without it. This book provides essential and informative reading for company directors, engineers, designers and students designing, manufacturing or studying the design of electrical products covered by the Low Voltage Directive.
Unlike many textbooks that offer general guidance only this book provides illustrated examples of non-compliant products and suggests solutions. It also provides detailed guidance notes to EN60950 - one of the most widely used harmonised standards.
Gregg Kervill is an international consultant on European regulations and North American product safety standards. His clients include blue chip and Fortune 500 companies as well as Government agencies. Gregg Kervill advises his clients on self-declaration of the Low Voltage Directive.
A guide to LVD compliance for managers and engineers alike
Clear, concise guidance through a legislative minefield
Essential for companies all over Europe