Millimeter-Wave Integrated Circuits delivers a detailed overview of MMIC design, specifically focusing on designs for the millimeter-wave (mm-wave) frequency range. The scope of the book is broad, spanning detailed discussions of high-frequency materials and technologies, high-frequency devices, and the design of high-frequency circuits. The design material is supplemented as appropriate by theoretical analyses. The broad scope of the book gives the reader a good theoretical and practical understanding of mm-wave circuit design. It is best-suited for both undergraduate students who are reading or studying high frequency circuit design and postgraduate students who are specializing in the mm-wave field.

This book provides a unique review of various aspects of metallic contamination in Si and Ge-based semiconductors. It discusses all of the important metals including their origin during crystal and/or device manufacturing, their fundamental properties, their characterization techniques and their impact on electrical devices' performance. Several control and possible gettering approaches are addressed. The book offers a valuable reference guide for all researchers and engineers studying advanced and state-of-the-art micro- and nano-electronic semiconductor devices and circuits. Adopting an interdisciplinary approach, it combines perspectives from e.g. material science, defect engineering, device processing, defect and device characterization, and device physics and engineering.

Design and Analysis of Analog Filters: A Signal Processing Perspective includes signal processing/systems concepts as well as implementation. While most books on analog filter design briefly present the signal processing/systems concepts, and then concentrate on a variety of filter implementation methods, the present book reverses the emphasis, stressing signal processing concepts. Filter implementation topics are presented in Part II: passive filters, and operational amplifier active filters. However, greater emphasis on signal processing/systems concepts is included in Part I of the book than is typical. This emphasis makes the book very appropriate as part of a signal processing curriculum. Useful Aspects of Design and Analysis of Analog Filters: A Signal Processing Perspective extensive use of MATLABA(R) throughout, with many homework problems involving the use of MATLAB. over 200 figures; over 100 examples; a total of 345 homework problems, appearing at the ends of the chapters; complete and thorough presentation of design characteristics; complete catalog of design approaches. Audience: Design and Analysis of Analog Filters: A Signal Processing Perspective will interest anyone with a standard electrical engineering background, with a B.S. degree or beyond, or at the senior level. While designed as a textbook, its numerous practical examples make it useful as a reference for practicing engineers and scientists, particularly those working in systems design or communications. MATLABA(R) Examples: A valuable relationship between analog filter theory and analysis and modern digital signal processing is made by the application of MATLAB to both the design and analysis of analog filters.Throughout the book, computer-oriented problems are assigned. The disk that accompanies this book contains MATLAB functions and m-files written specifically for this book. The MATLAB functions on the disk extend basic MATLAB capabilities in terms of the design and analysis of analog filters. The m-files are used in a number of examples in the book. They are included on the disk as an instructional aid.

This book provides readers with a valuable reference on cyber weapons and, in particular, viruses, software and hardware Trojans. The authors discuss in detail the most dangerous computer viruses, software Trojans and spyware, models of computer Trojans affecting computers, methods of implementation and mechanisms of their interaction with an attacker - a hacker, an intruder or an intelligence agent. Coverage includes Trojans in electronic equipment such as telecommunication systems, computers, mobile communication systems, cars and even consumer electronics. The evolutionary path of development of hardware Trojans from "cabinets", "crates" and "boxes" to the microcircuits (IC) is also discussed. Readers will benefit from the detailed review of the major known types of hardware Trojans in chips, principles of their design, mechanisms of their functioning, methods of their introduction, means of camouflaging and detecting, as well as methods of protection and counteraction.

Analog circuit design has grown in importance because so many circuits cannot be realized with digital techniques. Examples are receiver front-ends, particle detector circuits, etc. Actually, all circuits which require high precision, high speed and low power consumption need analog solutions. High precision also needs low noise. Much has been written already on low noise design and optimization for low noise. Very little is available however if the source is not resistive but capacitive or inductive as is the case with antennas or semiconductor detectors. This book provides design techniques for these types of optimization. This book is thus intended firstly for engineers on senior or graduate level who have already designed their first operational amplifiers and want to go further. It is especially for engineers who do not want just a circuit but the best circuit. Design techniques are given that lead to the best performance within a certain technology. Moreover, this is done for all important technologies such as bipolar, CMOS and BiCMOS. Secondly, this book is intended for engineers who want to understand what they are doing. The design techniques are intended to provide insight. In this way, the design techniques can easily be extended to other circuits as well. Also, the design techniques form a first step towards design automation. Thirdly, this book is intended for analog design engineers who want to become familiar with both bipolar and CMOS technologies and who want to learn more about which transistor to choose in BiCMOS.

This book is based on the 18 tutorials presented during the 23rd workshop on Advances in Analog Circuit Design. Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, serving as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.

Cell-based design methodologies have dominated layout generation of digital circuits. Unfortunately, the growing demands for transparent process portability, increased performance, and low-level device sizing for timing/power are poorly handled in a fixed cell library.
Direct Transistor-Level Layout For Digital Blocks proposes a direct transistor-level layout approach for small blocks of custom digital logic as an alternative that better accommodates demands for device-level flexibility. This approach captures essential shape-level optimizations, yet scales easily to netlists with thousands of devices, and incorporates timing optimization during layout. The key idea is early identification of essential diffusion-merged MOS device groups, and their preservation in an uncommitted geometric form until the very end of detailed placement. Roughly speaking, essential groups are extracted early from the transistor-level netlist, placed globally, optimized locally, and then finally committed each to a specific shape-level form while concurrently optimizing for both density and routability.
The essential flaw in prior efforts is an over-reliance on geometric assumptions from large-scale cell-based layout algorithms. Individual transistors may seem simple, but they do not pack as gates do. Algorithms that ignore these shape-level issues suffer the consequences when thousands of devices are poorly packed. The approach described in this book can pack devices much more densely than a typical cell-based layout.
Direct Transistor-Level Layout For Digital Blocks is a comprehensive reference work on device-level layout optimization, which will be valuable to CAD tool and circuit designers.

This book has its roots in an idea first formulated by Barrie Gilbert in 1975. He showed how bipolar analog circuits can realize nonlinear and computational functions. This extended the analog art from linear to nonlinear applications, hence the name trans linear circuits. Not only did this new principle enable marvellous signal processing functions to be accurately implemented, but also the circuits were simple and practical. The perennial problems of analog Ie design, namely temperature sensitivity, processing spread, device nonlinearity and paracitic capacitance were solved to a large extent. Using the trans linear principle in circuit design requires changing your point of view in two ways. First, the grossly nonlinear characteristic of transistors is viewed as an asset rather than as a harmful property. Second, no longer are the signals represented by voltages, but by currents. In fact, the attendant voltage changes are distorted but, as they are very small, they are only of secondary interest. Understanding and analyzing a given trans linear circuit is fairly straightforward. But what about the converse situation: suppose you're given some nonlinear or computational function to implement? How to find a suitable translinear circuit realization? The general problem of analog circuit synthesis is a difficult one and is receiving much attention nowadays. Some years ago, I had the opportunity to investigate methods for designing bipolar trans linear circuits. It turned out that translinear networks have some unique topological properties. Using these properties it was possible to establish heuristic synthesis procedures.

This thesis introduces a successfully designed and commissioned intelligent health monitoring system, specifically for use on any industrial robot, which is able to predict the onset of faults in the joints of the geared transmissions. However the developed embedded wireless condition monitoring system leads itself very well for applications on any power transmission equipment in which the loads and speeds are not constant, and access is restricted. As such this provides significant scope for future development. Three significant achievements are presented in this thesis. First, the development of a condition monitoring algorithm based on vibration analysis of an industrial robot for fault detection and diagnosis. The combined use of a statistical control chart with time-domain signal analysis for detecting a fault via an arm-mounted wireless processor system represents the first stage of fault detection. Second, the design and development of a sophisticated embedded microprocessor base station for online implementation of the intelligent condition monitoring algorithm, and third, the implementation of a discrete wavelet transform, using an artificial neural network, with statistical feature extraction for robot fault diagnosis in which the vibration signals are first decomposed into eight levels of wavelet coefficients.

Logic circuits are becoming increasingly susceptible to probabilistic behavior caused by external radiation and process variation. In addition, inherently probabilistic quantum- and nano-technologies are on the horizon as we approach the limits of CMOS scaling. Ensuring the reliability of such circuits despite the probabilistic behavior is a key challenge in IC design---one that necessitates a fundamental, probabilistic reformulation of synthesis and testing techniques. This monograph will present techniques for analyzing, designing, and testing logic circuits with probabilistic behavior.

Evolvability, the ability to respond effectively to change, represents a major challenge to today's high-end embedded systems, such as those developed in the medical domain by Philips Healthcare. These systems are typically developed by multi-disciplinary teams, located around the world, and are in constant need of upgrading to provide new advanced features, to deal with obsolescence, and to exploit emerging enabling technologies. Despite the importance of evolvability for these types of systems, the field has received scant attention from the scientific and engineering communities.

Views on Evolvability of Embedded Systems focuses on the topic of evolvability of embedded systems from an applied scientific perspective. In particular, the book describes results from the Darwin project that researched evolvability in the context of Magnetic Resonance Imaging (MRI) systems. This project applied the Industry-as-Laboratory paradigm, in which industry and academia join forces to ensure continuous knowledge and technology transfer during the project's lifetime. The Darwin project was a collaboration between the Embedded Systems Institute, the MRI business unit of Philips Healthcare, Philips Research, and five Dutch universities.

Evolvability was addressed from a system engineering perspective by a number of researchers from different disciplines such as software-, electrical- and mechanical engineering, with a clear focus on economic decision making. The research focused on four areas: data mining, reference architectures, mechanisms and patterns for evolvability, in particular visualization & modelling, and economic decision making. Views on Evolvability of Embedded Systems is targeted at both researchers and practitioners; they will not only find a state-of-the-art overview on evolvability research, but also guidelines to make systems more evolvable and new industrially-validated techniques to improve the evolvability of embedded systems.

This book mainly focuses on the investigation of the electric-field control of magnetism and spin-dependent transportation based on a Co40Fe40B20(CoFeB)/Pb(Mg1/3Nb2/3)0.7Ti0.3O3(PMN-PT) multiferroic heterostructure. Methods of characterization and analysis of the multiferroic properties with in situ electric fields are induced to detect the direct magnetoelectric (ME) coupling. A switchable and non-volatile electric field control of magnetization in CoFeB/PMN-PT(001) structures is observed at room temperature, and the mechanism of direct coupling between the ferroelectric domain and ferromagnetic film due to the combined action of 109 Degrees ferroelastic domain switching in PMN-PT and the absence of magnetocrystalline anisotropy in CoFeB is demonstrated. Moreover, the electric-field control of giant magnetoresistance is achieved in a CoFeB-based spin valve deposited on top of (011) oriented PMN-PT, which offers an avenue for implementing electric-writing and magnetic-reading random access memory at room temperature. Readers will learn the basic properties of multiferroic materials, many useful techniques related to characterizing multiferroics and the interesting ME effect in CoFeB/PMN-PT structures, which is significant for applications.

This book analyzes the thermal characteristics of power electronic devices (PEDs) with a focus on those used in wind and solar energy systems. The authors focus on the devices used in such applications, for example boost converters and inverters under different operating conditions. The book explains in detail finite element modeling techniques, setting up measuring systems, data analysis, and PEDs' lifetime calculations. It is appropriate reading for graduate students and researchers who focus on the design and reliability of power electronic devices.

Discusses process variation, model accuracy, design flow and many other practical engineering, reliability and manufacturing issues

Gives a good overview for a person who is not an expert in modeling and simulation, enabling them to extract the necessary information to competently use modeling and simulation programs

Written for engineering students and product design engineers

This book describes algorithmic methods and parallelization techniques to design a parallel sparse direct solver which is specifically targeted at integrated circuit simulation problems. The authors describe a complete flow and detailed parallel algorithms of the sparse direct solver. They also show how to improve the performance by simple but effective numerical techniques. The sparse direct solver techniques described can be applied to any SPICE-like integrated circuit simulator and have been proven to be high-performance in actual circuit simulation. Readers will benefit from the state-of-the-art parallel integrated circuit simulation techniques described in this book, especially the latest parallel sparse matrix solution techniques.

Large system complexities and operation under tight timing constraints in rapidly shrinking technologies have made it extremely important to ensure correct temporal behavior of modern-day digital circuits, both before and after fabrication. Research in (pre-fabrication) timing verification and (post-fabrication) delay fault testing has evolved along largely disjoint lines in spite of the fact that they share many basic concepts. A Unified Approach for Timing Verification and Delay Fault Testing applies concepts developed in the context of delay fault testing to path sensitization, which allows an accurate timing analysis mechanism to be developed. This path sensitization strategy is further applied for efficient delay fault diagnosis and delay fault coverage estimation. A new path sensitization strategy called Signal Stabilization Time Analysis (SSTA) has been developed based on the fact that primitive PDFs determine the stabilization time of the circuit outputs. This analysis has been used to develop a feasible method of identifying the primitive PDFs in a general multi-level logic circuit. An approach to determine the maximum circuit delay using this primitive PDF identification mechanism is also presented. The Primitive PDF Identification-based Timing Analysis (PITA) approach is proved to determine the maximum floating mode circuit delay exactly under any component delay model, and provides several advantages over previously floating mode timing analyzers. A framework for the diagnosis of circuit failures caused by distributed path delay faults is also presented. A metric to quantify the diagnosability of a path delay fault for a test is also proposed. Finally, the book presents a very realistic metric for delay fault coverage which accounts for delay fault size distributions and is applicable to any delay fault model. A Unified Approach for Timing Verification and Delay Fault Testing will be of interest to university and industry researchers in timing analysis and delay fault testing as well as EDA tool development engineers and design verification engineers dealing with timing issues in ULSI circuits. The book should also be of interest to digital designers and others interested in knowing the state of the art in timing verification and delay fault testing.

This book is far more than just another tutorial or reference guide - it's a tour through the world of analog design, combining theory and applications with the philosophies behind the design process. Readers will learn how leading analog circuit designers approach problems and how they think about solutions to those problems. They'll also learn about the analog way' - a broad, flexible method of thinking about analog design tasks.

A comprehensive and useful guide to analog theory and applications.
Covers visualizing the operation of analog circuits.
Looks at how to rapidly determine workable approximations of analog circuit parameters.

Circuit simulation is essential in integrated circuit design, and the accuracy of circuit simulation depends on the accuracy of the transistor model. BSIM3v3 (BSIM for Berkeley Short-channel IGFET Model) has been selected as the first MOSFET model for standardization by the Compact Model Council, a consortium of leading companies in semiconductor and design tools. In the next few years, many fabless and integrated semiconductor companies are expected to switch from dozens of other MOSFET models to BSIM3. This will require many device engineers and most circuit designers to learn the basics of BSIM3. MOSFET Modeling & BSIM3 User's Guide explains the detailed physical effects that are important in modeling MOSFETs, and presents the derivations of compact model expressions so that users can understand the physical meaning of the model equations and parameters. It is the first book devoted to BSIM3. It treats the BSIM3 model in detail as used in digital, analog and RF circuit design. It covers the complete set of models, i.e., I-V model, capacitance model, noise model, parasitics model, substrate current model, temperature effect model and non quasi-static model. MOSFET Modeling & BSIM3 User's Guide not only addresses the device modeling issues but also provides a user's guide to the device or circuit design engineers who use the BSIM3 model in digital/analog circuit design, RF modeling, statistical modeling, and technology prediction. This book is written for circuit designers and device engineers, as well as device scientists worldwide. It is also suitable as a reference for graduate courses and courses in circuit design or device modelling. Furthermore, it can be used as a textbook for industry courses devoted to BSIM3. MOSFET Modeling & BSIM3 User's Guide is comprehensive and practical. It is balanced between the background information and advanced discussion of BSIM3. It is helpful to experts and students alike.

This book focuses on increasing the energy-efficiency of electronic devices so that portable applications can have a longer stand-alone time on the same battery. The authors explain the energy-efficiency benefits that ultra-low-voltage circuits provide and provide answers to tackle the challenges which ultra-low-voltage operation poses. An innovative design methodology is presented, verified, and validated by four prototypes in advanced CMOS technologies. These prototypes are shown to achieve high energy-efficiency through their successful functionality at ultra-low supply voltages.

This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations. As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters.

There is an ever increasing trend towards putting entire systems on a single chip. This means that analog circuits will have to coexist on the same substrate along with massive digital systems. Since technologies are optimized with these digital systems in mind, designers will have to make do with standard CMOS processes in the years to come. We address analog filter design from this perspective. Filters form important blocks in applications ranging from computer disc-drive chips to radio transceivers. In this book, we develop the theory and techniques necessary for the implementation of high frequency (hundreds of megahertz) programmable continuous time filters in standard CMOS processes. Since high density poly-poly capacitors are not available in these technologies, alternative capacitor structures have to be found. Met- metal capacitors have low specific capacitance. An alternative is to use the (inherently nonlinear) capacitance formed by MOSFET gates. In Chapter 2, we focus on the use of MOS capacitors as integrating elements. A physics-based model which predicts distortion accurately is presented for a two-terminal MOS structure in accumulation. Distortion in these capacitors as a function of signal swing and bias voltage is computed. Chapter 3 reviews continuous-time filter architectures in the light of bias-dependent integrating capacitors. We also discuss the merits and demerits of various CMOS transconductance elements. The problems encountered in designing high frequency programmable filters are discussed in detail.

This volume emphasizes the design and development of advanced switched-opamp architectures and techniques for low-voltage low-power switched-capacitor systems. It presents a novel multi-phase switched-opamp technique together with new system architectures that are critical in improving significantly the performance of switched-capacitor systems at low supply voltages.

A Guide to VHDL, Second Edition is intended for the working engineer who needs to develop, document, simulate, and synthesize a design using the VHDL language. It is for system and chip designers who are working with VHDL CAD tools, and who have some experience programming in Fortran, Pascal, or C and have used a logic simulator. A Guide to VHDL, Second Edition includes a number of paper exercises and computer lab experiments. If a compiler/simulator is available to the reader, then the lab exercises included in the chapters can be run to reinforce the learning experience. For practical purposes, this book keeps simulator-specific text to a minimum, but does use the Synopsys VHDL Simulator command language in a few cases. A Guide to VHDL, Second Edition is designed as a primer and its contents are appropriate for an introductory course in VHDL. The VHDL language was updated in 1992 with some minor improvements. In most cases, the language is upward compatible. Although this book is based primarily on the VHDL 1987 standard, this new second edition indicates the significant changes in the 1992 language to assist the designer in writing upwardly compatible code.

This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms. Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies.

Asynchronous Pulse Logic is a comprehensive analysis of a newly developed asynchronous circuit family. The book covers circuit theory, practical circuits, design tools and an example of the design of a simple asynchronous microprocessor using the circuit family. Asynchronous Pulse Logic will be of interest to industrial and academic researcher working on high-speed VLSI systems. Graduate students will find this useful reference for computer-aided design of asynchronous or related VLSI systems.