"Memory Mass Storage" describes the fundamental storage technologies, like Semiconductor, Magnetic, Optical and Uncommon, detailing the main technical characteristics of the storage devices. It deals not only with semiconductor and hard disk memory, but also with different ways to manufacture and assembly them, and with their application to meet market requirements. It also provides an

introduction to the epistemological issues arising in defining the process of remembering, as well as an overview on human memory,

and an interesting excursus about biological memories and their organization, to better understand how the best memory we have, our brain, is able to imagine and design memory."

Temperature has been always considered as an appreciable magnitude to detect failures in electric systems. Abnormal status of this variable, both too high and too low, is sign of abnormal behavior in electronic systems. In Thermal Testing of Integrated Circuits the authors present the feasibility to consider temperature as an observable for testing purposes. The coupling of circuits through heat is inherent to the solid-state nature and the inspection of temperature does not interact with Under Test Circuits or Systems, something that does not happen when voltage or current observable are used. In the book the basis of heat propagation, heat conducting mechanisms and temperature sensitivity of semiconductors are focused with a full coverage of the state of the art. We usually have the idea that all the heating processes are slow, which is true in the macroscopic world, but is not in the case of integrated circuits where the reduced size and amount of material and the really high conductivity of substrates make the thermal testing a promising technique. CMOS and BICMOS temperature sensors for built-in thermal testing are presented in the book. The application of temperature as testing magnitude for both on-line and off-line, analog or digital, on-chip or off-chip are considered. The temperature sensing has an inherent directional capability that can be used as an element for localizing failures, so the technique has interesting diagnosis capabilities as well.

High-speed, power-efficient analog integrated circuits can be used as standalone devices or to interface modern digital signal processors and micro-controllers in various applications, including multimedia, communication, instrumentation, and control systems. New architectures and low device geometry of complementary metaloxidesemiconductor (CMOS) technologies have accelerated the movement toward system on a chip design, which merges analog circuits with digital, and radio-frequency components.

Dynamic power management is a design methodology aiming at controlling performance and power levels of digital circuits and systems, with the goal of extending the autonomous operation time of battery-powered systems, providing graceful performance degradation when supply energy is limited, and adapting power dissipation to satisfy environmental constraints. Dynamic Power Management: Design Techniques and CAD Tools addresses design techniques and computer-aided design solutions for power management. Different approaches are presented and organized in an order related to their applicability to control-units, macro-blocks, digital circuits and electronic systems, respectively. All approaches are based on the principle of exploiting idleness of circuits, systems, or portions thereof. They involve both the detection of idleness conditions and the freezing of power-consuming activities in the idle components. The book also describes some approaches to system-level power management, including Microsoft's OnNow architecture and the Advanced Configuration and Power Management' standard proposed by Intel, Microsoft and Toshiba. These approaches migrate power management to the software layer running on hardware platforms, thus providing a flexible and self-configurable solution to adapting the power/performance tradeoff to the needs of mobile (and fixed) computing and communication. Dynamic Power Management: Design Techniques and CAD Tools is of interest to researchers and developers of computer-aided design tools for integrated circuits and systems, as well as to system designers.

Digital phase locked loops are critical components of many communication, signal processing and control systems. This exciting new book covers various types of digital phase lock loops. It presents a comprehensive coverage of a new class of digital phase lock loops called the time delay tanlock loop (TDTL). It also details a number of architectures that improve the performance of the TDTL through adaptive techniques that overcome the conflicting requirements of the locking rage and speed of acquisition. These requirements are of paramount importance in many applications including wireless communications, consumer electronics and others. Digital Phase Lock Loops then illustrates the process of converting the TDTL class of digital phase lock loops for implementation on an FPGA-based reconfigurable system. These devices are being utilized in software-defined radio, DSP-based designs and many other communication and electronic systems to implement complex high-speed algorithms. Their flexibility and reconfigurability facilitate rapid prototyping, on-the-fly upgradeability, and code reuse with minimum effort and complexity. from the reconfigurable implementations are compared with those obtained through simulations with MATLAB/Simulink. The material in this book will be valuable to researchers, graduate students, and practicing engineers.

Provides coverage of the most efficient and effective methods of network analysis optimization and synthesis. A step-by-step guide to every aspect of the RF and microwave circuit design process - starting with a set of specifications and ending with hardware that performs as modeled the first time.

This book includes a set of rigorously reviewed world-class manuscripts addressing and detailing state-of-the-art research projects in the areas of Engineering Education, Instructional Technology, Assessment, and E-learning.

The book presents selected papers form the conference proceedings of the International Conference on Engineering Education, Instructional Technology, Assessment, and E-learning (EIAE 2006). All aspects of the conference were managed on-line.

Chemical mechanical planarization, or chemical mechanical polishing as it is simultaneously referred to, has emerged as one of the critical processes in semiconductor manufacturing and in the production of other related products and devices, MEMS for example. Since its introduction some 15+ years ago CMP, as it is commonly called, has moved steadily into new and challenging areas of semiconductor fabrication. Demands on it for consistent, efficient and cost-effective processing have been steady. This has continued in the face of steadily decreasing feature sizes, impressive increases in wafer size and a continuing array of new materials used in devices today. There are a number of excellent existing references and monographs on CMP in circulation and we defer to them for detailed background information. They are cited in the text. Our focus here is on the important area of process mod els which have not kept pace with the tremendous expansion of applications of CMP. Preston's equation is a valuable start but represents none of the subtleties of the process. Specifically, we refer to the development of models with sufficient detail to allow the evaluation and tradeoff of process inputs and parameters to assess impact on quality or quantity of production. We call that an "integrated model" and, more specifically, we include the important role of the mechanical elements of the process."

This book gives a comprehensive introduction to the design challenges of MPSoC platforms, focusing on early design space exploration. It defines an iterative methodology to increase the abstraction level so that evaluation of design decisions can be performed earlier in the design process. These techniques enable exploration on the system level before undertaking time- and cost-intensive development.

Over the past decade there has been a dramatic change in the role played by design automation for electronic systems. Ten years ago, integrated circuit (IC) designers were content to use the computer for circuit, logic, and limited amounts of high-level simulation, as well as for capturing the digitized mask layouts used for IC manufacture. The tools were only aids to design-the designer could always find a way to implement the chip or board manually if the tools failed or if they did not give acceptable results. Today, however, design technology plays an indispensable role in the design ofelectronic systems and is critical to achieving time-to-market, cost, and performance targets. In less than ten years, designers have come to rely on automatic or semi automatic CAD systems for the physical design ofcomplex ICs containing over a million transistors. In the past three years, practical logic synthesis systems that take into account both cost and performance have become a commercial reality and many designers have already relinquished control ofthe logic netlist level of design to automatic computer aids. To date, only in certain well-defined areas, especially digital signal process ing and telecommunications. have higher-level design methods and tools found significant success. However, the forces of time-to-market and growing system complexity will demand the broad-based adoption of high-level, automated methods and tools over the next few years."

As integrated circuit (IC) feature sizes scaled below a quarter of a micron, thereby defining the deep submicron (DSM) era, there began a gradual shift in the impact on performance due to the metal interconnections among the active circuit components. Once viewed as merely parasitics in terms of their relevance to the overall circuit behavior, the interconnect can now have a dominant impact on the IC area and performance. Beginning in the late 1980's there was significant research toward better modeling and characterization of the resistance, capacitance and ultimately the inductance of on-chip interconnect. IC Interconnect Analysis covers the state-of-the-art methods for modeling and analyzing IC interconnect based on the past fifteen years of research. This is done at a level suitable for most practitioners who work in the semiconductor and electronic design automation fields, but also includes significant depth for the research professionals who will ultimately extend this work into other areas and applications. IC Interconnect Analysis begins with an in-depth coverage of delay metrics, including the ubiquitous Elmore delay and its many variations. This is followed by an outline of moment matching methods, calculating moments efficiently, and Krylov subspace methods for model order reduction. The final two chapters describe how to interface these reduced-order models to circuit simulators and gate-level timing analyzers respectively. IC Interconnect Analysis is written for CAD tool developers, IC designers and graduate students.

Conceptual Design of Multichip Modules and Systems treats activities which take place at the conceptual and specification level of the design of complex multichip systems. These activities include the formalization of design knowledge (information modeling), tradeoff analysis, partitioning, and decision process capture. All of these functions occur prior to the traditional CAD activities of synthesis and physical design. Inherent in the design of electronic modules are tradeoffs which must be understood before feasible technology, material, process, and partitioning choices can be selected. The lack of a complete set of technology information is an especially serious problem in the packaging and interconnect field since the number of technologies, process, and materials is substantial and selecting optimums is arduous and non-trivial if one truly wants a balance in cost and performance. Numerous tradeoff and design decisions have to be made intelligently and quickly at the beginning of the design cycle before physical design work begins. These critical decisions, made within the first 10% of the total design cycle, ultimately define up to 80% of the final product cost. Conceptual Design of Multichip Modules and Systems lays the groundwork for concurrent estimation level analysis including size, routing, electrical performance, thermal performance, cost, reliability, manufacturability, and testing. It will be useful both as a reference for system designers and as a text for those wishing to gain a perspective on the nature of packaging and interconnect design, concurrent engineering, computer-aided design, and system synthesis.

This book describes several methods and systems solving one of the highlighted problems within computer aided design, namely architectural and logic synthesis. The book emphasises the most recent technologies in high level synthesis, concentrating on applicative studies and practical constraints or criteria during synthesis. Logic and Architecture Synthesis concentrates on the practical problems involving automatic synthesis of designs. It is essential reading for researchers and CAD Managers working in this area.

This text is about methods used for the computer simulation of analog systems. It concentrates on electronic applications, but many of the methods are applicable to other engineering problems as well. This revised edition (1st, 1983) encompasses recent theoretical developments and program-writing ti

Photovoltaic generation is one of the cleanest forms of energy conversion available. One of the advantages offered by solar energy is its potential to provide sustainable electricity in areas not served by the conventional power grid. Optimisation of Photovoltaic Power Systems details explicit modelling, control and optimisation of the most popular stand-alone applications such as pumping, power supply, and desalination. Each section is concluded by an example using the MATLAB (R) and Simulink (R) packages to help the reader understand and evaluate the performance of different photovoltaic systems. Optimisation of Photovoltaic Power Systems provides engineers, graduate and postgraduate students with the means to understand, assess and develop their own photovoltaic systems. As such, it is an essential tool for all those wishing to specialise in stand-alone photovoltaic systems. Optimisation of Photovoltaic Power Systems aims to enable all researchers in the field of electrical engineering to thoroughly understand the concepts of photovoltaic systems; find solutions to their problems; and choose the appropriate mathematical model for optimising photovoltaic energy.

Device and Circuit Cryogenic Operation for Low Temperature Electronics is a first in reviewing the performance and physical mechanisms of advanced devices and circuits at cryogenic temperatures that can be used for many applications. The first two chapters cover bulk silicon and SOI MOSFETs. The electronic transport in the inversion layer, the influence of impurity freeze-out, the special electrical properties of SOI structures, the device reliability and the interest of a low temperature operation for the ultimate integration of silicon down to nanometer dimensions are described. The next two chapters deal with Silicon-Germanium and III-V Heterojunction Bipolar Transistors, as well as III-V High Electron Mobility Transistors (HEMT). The basic physics of the SiGe HBT and its unique cryogenic capabilities, the optimization of such bipolar devices, and the performance of SiGe HBT BiCMOS technology at liquid nitrogen temperature are examined. The physical effects in III-V semiconductors at low temperature, the HEMT and HBT static, high frequency and noise properties, and the comparison of various cooled III-V devices are also addressed. The next chapter treats quantum effect devices made of silicon materials. The major quantum effects at low temperature, quantum wires, quantum dots as well as single electron devices and applications are investigated. The last chapter overviews the performances of cryogenic circuits and their applications. The low temperature properties and performance of inverters, multipliers, adders, operational amplifiers, memories, microprocessors, imaging devices, circuits and systems, sensors and read-out circuits are analyzed. Device and Circuit Cryogenic Operation for Low Temperature Electronics is useful for researchers, engineers, Ph.D. and M.S. students working in the field of advanced electron devices and circuits, new semiconductor materials, and low temperature electronics and physics.

This book presents efficient visualization techniques, a prerequisite for the interactive exploration of complex data sets. High performance is demonstrated as a process of devising algorithms for the fast graphics processing units (GPUs) of modern graphics hardware. Coverage includes parallelization on cluster computers with several GPUs, adaptive rendering methods, and non-photorealistic rendering techniques for visualization.

A review of the electrical properties, performance and physical mechanisms of the main silicon-on-insulator (SOI) materials and devices. Particular attention is paid to the reliability of SOI structures operating in harsh conditions. The first part of the book deals with material technology and describes the SIMOX and ELTRAN technologies, the smart-cut technique, SiCOI structures and MBE growth. The second part covers reliability of devices operating under extreme conditions, with an examination of low and high temperature operation of deep submicron MOSFETs and novel SOI technologies and circuits, SOI in harsh environments and the properties of the buried oxide. The third part deals with the characterization of advanced SOI materials and devices, covering laser-recrystallized SOI layers, ultrashort SOI MOSFETs and nanostructures, gated diodes and SOI devices produced by a variety of techniques. The last part reviews future prospects for SOI structures, analyzing wafer bonding techniques, applications of oxidized porous silicon, semi-insulating silicon materials, self-organization of silicon dots and wires on SOI and some new physical phenomena.

This book presents a new optimization flow for quantum circuits realization. At the reversible level, optimization algorithms are presented to reduce the quantum cost. Then, new mapping approaches to decompose reversible circuits to quantum circuits using different quantum libraries are described. Finally, optimization techniques to reduce the quantum cost or the delay are applied to the resulting quantum circuits. Furthermore, this book studies the complexity of reversible circuits and quantum circuits from a theoretical perspective.

Stochastic Resonance: Theory and Applications deals with the theory of noise-added systems and in particular with Stochastic Resonance, a quite novel theory that was introduced in the 1980s to provide better understanding of some natural phenomena (e.g. ice age recurrence). Following the very first works, a number of different applications to both natural and human-produced phenomena were proposed. The book aims to improve the understanding of noise-based techniques and to focus on practical applications of this class of phenomena (an aspect that has been very poorly investigated up to now). Based on this objective, the book is roughly divided into two parts. The first part deals with the essential theory of noise-added systems and in particular a new approach to noise-added techniques that allows a number of strategies proposed in previous years to be unified. The proposed approach also allows real-time control of the noise characteristics, assuring optimal system performance. In the second part a large number of applications are described in detail in the field of electric and electronic devices, with the aim of allowing readers to build their own experimental set. The book comes with a diskette of educational software that the authors developed. Stochastic Resonance: Theory and Applications is an invaluable reference for students, researchers and engineering professionals working in the fields of electric and electronic measurements, electronics and signal theory.

Music Projects contains a collection of projects based on music applications. Components are widely available and the circuits form the basis for further experiments. Circuit diagrams are provided, as are photographs of the main circuits. Parts lists are also given.

Robert Penfold's reputation for innovative circuit designs and well-thought out projects is firmly established. His work has been featured regularly in the popular 'Bob's Mini Circuits' section of Electronics, the Maplin magazine. This is a collection of his best ideas from the magazine. Projects include an accented metronome, a tremolo unit, a guitar compressor, a bass fuzz, and a chorus unit.

Regular Nanofabrics in Emerging Technologies gives a deep insight into both fabrication and design aspects of emerging semiconductor technologies, that represent potential candidates for the post-CMOS era. Its approach is unique, across different fields, and it offers a synergetic view for a public of different communities ranging from technologists, to circuit designers, and computer scientists. The book presents two technologies as potential candidates for future semiconductor devices and systems and it shows how fabrication issues can be addressed at the design level and vice versa. The reader either for academic or research purposes will find novel material that is explained carefully for both experts and non-initiated readers. Regular Nanofabrics in Emerging Technologies is a survey of post-CMOS technologies. It explains processing, circuit and system level design for people with various backgrounds.

Embedded systems are characterized by the presence of processors running application-specific software. Recent years have seen a large growth of such systems, and this trend is projected to continue with the growth of systems on a chip. Many of these systems have strict performance and cost requirements. To design these systems, sophisticated timing analysis tools are needed to accurately determine the extreme case (best case and worst case) performance of the software components. Existing techniques for this analysis have one or more of the following limitations: they cannot model complicated programs they cannot model advanced micro-architectural features of the processor, such as cache memories and pipelines they cannot be easily retargeted for new hardware platforms. In Performance Analysis of Real-Time Embedded Software, a new timing analysis technique is presented to overcome the above limitations. The technique determines the bounds on the extreme case (best case and worst case) execution time of a program when running on a given hardware system. It partitions the problem into two sub-problems: program path analysis and microarchitecture modeling. Performance Analysis of Real-Time Embedded Software will be of interest to Design Automation professionals as well as designers of circuits and systems.

Logic Synthesis Using Synopsys (R), Second Edition is for anyone who hates reading manuals but would still like to learn logic synthesis as practised in the real world. Synopsys Design Compiler, the leading synthesis tool in the EDA marketplace, is the primary focus of the book. The contents of this book are specially organized to assist designers accustomed to schematic capture-based design to develop the required expertise to effectively use the Synopsys Design Compiler. Over 100 `Classic Scenarios' faced by designers when using the Design Compiler have been captured, discussed and solutions provided. These scenarios are based on both personal experiences and actual user queries. A general understanding of the problem-solving techniques provided should help the reader debug similar and more complicated problems. In addition, several examples and dc_shell scripts (Design Compiler scripts) have also been provided. Logic Synthesis Using Synopsys (R), Second Edition is an updated and revised version of the very successful first edition. The second edition covers several new and emerging areas, in addition to improvements in the presentation and contents in all chapters from the first edition. With the rapid shrinking of process geometries it is becoming increasingly important that `physical' phenomenon like clusters and wire loads be considered during the synthesis phase. The increasing demand for FPGAs has warranted a greater focus on FPGA synthesis tools and methodology. Finally, behavioral synthesis, the move to designing at a higher level of abstraction than RTL, is fast becoming a reality. These factors have resulted in the inclusion of separate chapters in the second edition to cover Links to Layout, FPGA Synthesis and Behavioral Synthesis, respectively. Logic Synthesis Using Synopsys (R), Second Edition has been written with the CAD engineer in mind. A clear understanding of the synthesis tool concepts, its capabilities and the related CAD issues will help the CAD engineer formulate an effective synthesis-based ASIC design methodology. The intent is also to assist design teams to better incorporate and effectively integrate synthesis with their existing in-house design methodology and CAD tools.

The general trend of modern network devices towards greater intelligence and programmability is accelerating the development of systems that are increasingly autonomous and to a certain degree self-managing. Examples range from router scripting environments to fully programmable server blades. This has opened up a new field of computer science research, reflected in this new volume. This selection of contributions to the first ever international workshop on network-embedded management applications (NEMA) features six papers selected from submissions to the workshop, held in October 2010 at Niagara Falls, Canada. They represent a wide cross-section of the current work in this vital field of inquiry. Covering a diversity of perspectives, the volume's dual structure first of all examines the 'enablers' for NEMAs-the platforms, frameworks, and development environments which facilitate the evolution of network-embedded management and applications. The second section of the book covers network-embedded applications that might both empower and benefit from such enabling platforms. These papers cover topics ranging from deciding where to best place management control functions inside a network to a discussion of how multi-core hardware processors can be leveraged for traffic filtering applications. The section concludes with an analysis of a delay-tolerant network application in the context of the 'One Laptop per Child' program. There is a growing recognition that it is vital to make network operation and administration as easy as possible to contain operational expenses and cope with ever shorter control cycles. This volume provides researchers in the field with the very latest in current thinking.