Since scaling of CMOS is reaching the nanometer area serious limitations enforce the introduction of novel materials, device architectures and device concepts. Multi-gate devices employing high-k gate dielectrics are considered as promising solution overcoming these scaling limitations of conventional planar bulk CMOS. Variation Aware Analog and Mixed-Signal Circuit Design in Emerging Multi-Gate CMOS Technologies provides a technology oriented assessment of analog and mixed-signal circuits in emerging high-k and multi-gate CMOS technologies.

This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.
. Most up-to-date coverage of design for testability.
. Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books.
. Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures.
. Lecture slides and exercise solutions for all chapters are now available.
. Instructors are also eligible for downloading PPT slide files and MSWORD solutions files from the manual website.

This book describes design techniques that can be used to mitigate crosstalk in high-speed I/O circuits. The focus of the book is in developing compact and low power integrated circuits for crosstalk cancellation, inter-symbol interference (ISI) mitigation and improved bit error rates (BER) at higher speeds. This book is one of the first to discuss in detail the problem of crosstalk and ISI mitigation encountered as data rates have continued beyond 10Gb/s. Readers will learn to avoid the data performance cliff, with circuits and design techniques described for novel, low power crosstalk cancellation methods that are easily combined with current ISI mitigation architectures.

This book is dedicated to the analysis of parametric amplification with special emphasis on the MOS discrete-time implementation. This implementation is demonstrated by the presentation of several circuits where the MOS parametric amplifier cell is used: small gain amplifier, comparator with embedded pre-amplification, discrete-time mixer/IIR-Filter, and analog-to-digital converter (ADC). Experimental results are shown to validate the overall design technique.

This book focuses on the development of liquid crystal displays (LCDs) and liquid crystal materials (LCs) in Japan. The Committee of Organic Materials Research for Information Sciences of the Japan Society for the Promotion of Science (JSPS) planned the book to document essential LCD innovations and developments since the beginnings of the field-effect LCD technology in 1970. The book illustrates the remarkable effort and progress behind those flat, lightweight, and high-information-content LCDs that have become the indispensable human-machine interface for virtually all electronic devices. In contrast to other publications on this topic, the book illustrates the interdisciplinary character of the LCD technology and its crucial importance for technological progress of the field far beyond displays. It also gives insights into breakthrough innovations not revealed in other publications. Moreover, prospects for the development of LC research toward new fields of applications are provided. In line with its interdisciplinary character, the book targets researchers in basic science as well as engineers and researchers in industry.

This book aims to present a viable alternative to the Hopfield Neural Network (HNN) model for analog computation. It is well known the standard HNN suffers from problems of convergence to local minima, and requirement of a large number of neurons and synaptic weights. Therefore, improved solutions are needed. The non-linear synapse neural network (NoSyNN) is one such possibility and is discussed in detail in this book. This book also discusses the applications in computationally intensive tasks like graph coloring, ranking, and linear as well as quadratic programming. The material in the book is useful to students, researchers and academician working in the area of analog computation.

Solid State Lighting Reliability: Components to Systems begins with an explanation of the major benefits of solid state lighting (SSL) when compared to conventional lighting systems including but not limited to long useful lifetimes of 50,000 (or more) hours and high efficacy. When designing effective devices that take advantage of SSL capabilities the reliability of internal components (optics, drive electronics, controls, thermal design) take on critical importance. As such a detailed discussion of reliability from performance at the device level to sub components is included as well as the integrated systems of SSL modules, lamps and luminaires including various failure modes, reliability testing and reliability performance. A follow-up, Solid State Lighting Reliability Part 2, was published in 2017.

The first encompassing treatise of this new and very important field puts the known physical limitations for classic 2D microelectronics into perspective with the requirements for further microelectronics developments and market necessities. This two-volume handbook presents 3D solutions to the feature density problem, addressing all important issues, such as wafer processing, die bonding, packaging technology, and thermal aspects. It begins with an introductory part, which defines necessary goals, existing issues and relates 3D integration to the semiconductor roadmap of the industry. Before going on to cover processing technology and 3D structure fabrication strategies in detail. This is followed by fields of application and a look at the future of 3D integration. The editors have assembled contributions from key academic and industrial players in the field, including Intel, Micron, IBM, Infineon, Qimonda, NXP, Philips, Toshiba, Semitool, EVG, Tezzaron, Lincoln Labs, Fraunhofer, RPI, IMEC, CEA-LETI and many others.

The electronics and information technology revolution continues, but it is a critical time in the development of technology. Once again, we stand on the brink of a new era where emerging research will yield exciting applications and products destined to transform and enrich our daily lives! The potential is staggering and the ultimate impact is unimaginable, considering the continuing marriage of te- nology with fields such as medicine, communications and entertainment, to name only a few. But who will actually be responsible for transforming these potential new pr- ucts into reality? The answer, of course, is today's (and tomorrow's) design en- neers! The design of integrated circuits today remains an essential discipline in s- port of technological progress, and the authors of this book have taken a giant step forward in the development of a practice-oriented treatise for design engineers who are interested in the practical, industry-driven world of integrated circuit - sign.

Autonomous sensors transmit data and power their electronics without using cables. They can be found in e.g. wireless sensor networks (WSNs) or remote acquisition systems. Although primary batteries provide a simple design for powering autonomous sensors, they present several limitations such as limited capacity and power density, and difficulty in predicting their condition and state of charge. An alternative is to extract energy from the ambient (energy harvesting). However, the reduced dimensions of most autonomous sensors lead to a low level of available power from the energy transducer. Thus, efficient methods and circuits to manage and gather the energy are a must.

An integral approach for powering autonomous sensors by considering both primary batteries and energy harvesters is presented.Two rather different forms of energy harvesting are also dealt with: optical (or solar) and radiofrequency (RF). Optical energy provides high energy density, especially outdoors, whereas RF remote powering is possibly the most feasible option for autonomous sensors embedded into the soil or within structures. Throughout different chapters, devices such as primary and secondary batteries, supercapacitors, and energy transducers are extensively reviewed. Then, circuits and methods found in the literature used to efficiently extract and gather the energy are presented. Finally, new proposals based on the authors own research are analyzed and tested. Every chapter is written to be rather independent, with each incorporating the relevant literature references.

"Powering Autonomous Sensors" is intended for a wide audience working on or interested in the powering of autonomous sensors. Researchers and engineers can find a broad introduction to basic topics in this interesting and emerging area as well as further insights on the topics of solar and RF harvesting and of circuits and methods to maximize the power extracted from energy transducers.

This book walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process and how to address each aspect at the proper design step starting with the design and layout of standard cells and how to yield-grade libraries for critical area and lithography artifacts through place and route, CMP model based simulation and dummy-fill insertion, mask planning, simulation and manufacturing, and through statistical design and statistical timing closure of the design. It alerts the designer to the pitfalls to watch for and to the good practices that can enhance a design's manufacturability and yield. This book is a must read book the serious practicing IC designer and an excellent primer for any graduate student intent on having a career in IC design or in EDA tool development.

This book describes Smart Cities and the information technologies that will provide better living conditions in the cities of tomorrow. It brings together research findings from 27 countries across the globe, from academia, industry and government. It addresses a number of crucial topics in state of the arts of technologies and solutions related to smart cities, including big data and cloud computing, collaborative platforms, communication infrastructures, smart health, sustainable development and energy management. Information Innovation Technology in Smart Cities is essential reading for researchers working on intelligence and information communication systems, big data, Internet of Things, Cyber Security, and cyber-physical energy systems. It will be also invaluable resource for advanced students exploring these areas.

This book describes how evolutionary algorithms (EA), including genetic algorithms (GA) and particle swarm optimization (PSO) can be utilized for solving multi-objective optimization problems in the area of embedded and VLSI system design. Many complex engineering optimization problems can be modelled as multi-objective formulations. This book provides an introduction to multi-objective optimization using meta-heuristic algorithms, GA and PSO and how they can be applied to problems like hardware/software partitioning in embedded systems, circuit partitioning in VLSI, design of operational amplifiers in analog VLSI, design space exploration in high-level synthesis, delay fault testing in VLSI testing and scheduling in heterogeneous distributed systems. It is shown how, in each case, the various aspects of the EA, namely its representation and operators like crossover, mutation, etc, can be separately formulated to solve these problems. This book is intended for design engineers and researchers in the field of VLSI and embedded system design. The book introduces the multi-objective GA and PSO in a simple and easily understandable way that will appeal to introductory readers.

For upper-level courses in Devices and Circuits at 2-year or 4-year Engineering and Technology institutes. Electronic Devices and Circuit Theory, Eleventh Edition, offers students a complete, comprehensive survey, focusing on all the essentials they will need to succeed on the job. Setting the standard for nearly 30 years, this highly accurate text is supported by strong pedagogy and content that is ideal for new students of this rapidly changing field. The colorful layout with ample photographs and examples enhances students' understanding of important topics. This text is an excellent reference work for anyone involved with electronic devices and other circuitry applications, such as electrical and technical engineers.

This book shows that digitally assisted analog to digital converters are not the only way to cope with poor analog performance caused by technology scaling. It describes various analog design techniques that enhance the area and power efficiency without employing any type of digital calibration circuitry. These techniques consist of self-biasing for PVT enhancement, inverter-based design for improved speed/power ratio, gain-of-two obtained by voltage sum instead of charge redistribution, and current-mode reference shifting instead of voltage reference shifting. Together, these techniques allow enhancing the area and power efficiency of the main building blocks of a multiplying digital-to-analog converter (MDAC) based stage, namely, the flash quantizer, the amplifier, and the switched capacitor network of the MDAC. Complementing the theoretical analyses of the various techniques, a power efficient operational transconductance amplifier is implemented and experimentally characterized. Furthermore, a medium-low resolution reference-free high-speed time-interleaved pipeline ADC employing all mentioned design techniques and circuits is presented, implemented and experimentally characterized. This ADC is said to be reference-free because it precludes any reference voltage, therefore saving power and area, as reference circuits are not necessary. Experimental results demonstrate the potential of the techniques which enabled the implementation of area and power efficient circuits.

High-speed Photodiodes in Standard CMOS Technology describes high-speed photodiodes in standard CMOS technology which allow monolithic integration of optical receivers for short-haul communication. For short haul communication the cost aspect is important, and therefore it is desirable that the optical receiver can be integrated in the same CMOS technology as the rest of the system. If this is possible then ultimately a singe-chip system including optical inputs becomes feasible, eliminating EMC and crosstalk problems, while data rate can be extremely high.

The problem of photodiodes in standard CMOS technology it that they have very limited bandwidth, allowing data rates up to only 50Mbit per second. High-speed Photodiodes in Standard CMOS Technology first analyzes the photodiode behaviour and compares existing solutions to enhance the speed. After this, the book introduces a new and robust electronic equalizer technique that makes data rates of 3Gb/s possible, without changing the manufacturing technology. The application of this technique can be found in short haul fibre communication, optical printed circuit boards, but also photodiodes for laser disks.

This handbook provides ready access to all of the major concepts, techniques, problems, and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, written by professionals in several disciplines, has treated notation and mathematics in ways that vary from source to source. This book opens with a clear description of the shortcomings of conventional testing as applied to complex digital circuits, revewing by comparison the principles of design for testability of more advanced digital technology. Offers in-depth discussions of test sequence generation and response data compression, including pseudorandom sequence generators; the mathematics of shift-register sequences and their potential for built-in testing. Also details random and memory testing and the problems of assessing the efficiency of such tests, and the limitations and practical concerns of built-in testing.

This book focuses on a safety issue in terms of leakage current, builds a common-mode voltage analysis model for TLIs at switching frequency scale and develops a new modulation theory referred as "Constant Common-Mode Voltage Modulation" to eliminate the leakage current of TLIs. Transformerless Grid-Connected Inverter (TLI) is a circuit interface between photovoltaic arrays and the utility, which features high conversion efficiency, low cost, low volume and weight. The detailed theoretical analysis with design examples and experimental validations are presented from full-bridge type, half-bridge type and combined topologies. This book is essential and valuable reference for graduate students and academics majored in power electronics; engineers engaged in developing distributed grid-connected inverters; senior undergraduate students majored in electrical engineering and automation engineering.

This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes. It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package.

This book offers a brief review of and investigations into the power quality problem in the new technology of co-phase high-speed traction power supplies, which benefits for higher locomotive speed. In addition, it presents detailed design procedures and discusses the chief concerns in connection with a newly proposed solution: compensation in co-phase traction power using a co-phase railway hybrid power quality conditioner (Railway HPQC). Further, it provides essential information on the modeling of power quality in co-phase, high-speed traction power supplies, and on power quality compensation algorithm derivations. Lastly, it delineates the design of railway HPQC and analyzes the effect of different parameters on its performance to accommodate different priorities. All design is supported by simulations and the results of experimental verification.

Written by the inventor of the ultrahigh Q-value resonator, this text describes innovations in high-temperature superconducting (HTS) microwave circuits and explains the fundamental principles. The book shows how to analyze, design, characterize and test the circuits created. Each chapter gives application information on: materials and characterization; transmission lines; passive components; active devices; HTS/III device hybrid circuits; high Q-value resonators; and packaging. Augmented with 202 equations and 137 illustrations, "High-Temperature Superconducting Microwave Cricuits" offers information for microwave engineers, system engineers, and material scientists. University students should find the text useful for learning about the next generation of microwave circuits.

This book focuses on modeling, simulation and analysis of analog circuit aging. First, all important nanometer CMOS physical effects resulting in circuit unreliability are reviewed. Then, transistor aging compact models for circuit simulation are discussed and several methods for efficient circuit reliability simulation are explained and compared. Ultimately, the impact of transistor aging on analog circuits is studied. Aging-resilient and aging-immune circuits are identified and the impact of technology scaling is discussed.

The models and simulation techniques described in the book are intended as an aid for device engineers, circuit designers and the EDA community to understand and to mitigate the impact of aging effects on nanometer CMOS ICs.

There are many techniques for analyzing IC fails, but they are scattered over the professional IC test and diagnosis literature, and in various statistics and data mining handbooks. Moreover, many data mining techniques that are standard in other data analysis environments, and that are appropriate for analyzing IC fails, have not yet been employed for that purpose.

Data Mining and Diagnosing IC Fails addresses the problem of obtaining maximum information from (functional) integrated circuit fail data about the defects that caused the fails. It starts at the highest level from mere sort codes, and drills down via various data mining techniques to detailed logic diagnosis. The various approaches discussed in this book have a thorough theoretical underpinning, but are geared towards applications on real life fail data and state of the art ICs. This book brings together a large number of analysis techniques that are suitable for IC fail data, but that are not available elsewhere in a single place. Several of the techniques, in fact, have been presented only recently in technical conferences.

The purpose of the book is to bring together in one place a large number of analysis, data mining and diagnosis techniques that have proven to be useful in analyzing IC fails. The descriptions of the techniques and analysis routines is sufficiently detailed that professional manufacturing engineers can implement them in their own work environment.

This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.

Synthesis Techniques and Optimization for Reconfigurable Systems discusses methods used to model reconfigurable applications at the system level, many of which could be incorporated directly into modern compilers. The book also discusses a framework for reconfigurable system synthesis, which bridges the gap between application-level compiler analysis and high-level device synthesis. The development of this framework (discussed in Chapter 5), and the creation of application analysis which further optimize its output (discussed in Chapters 7, 8, and 9), represent over four years of rigorous investigation within UCLA's Embedded and Reconfigurable Laboratory (ERLab) and UCSB's Extensible, Programmable and Reconfigirable Embedded SystemS (ExPRESS) Group. The research of these systems has not yet matured, and we continually strive to develop data and methods, which will extend the collective understanding of reconfigurable system synthesis.
Synthesis Techniques and Optimization for Reconfigurable Systems assumes a basic understanding of logic design, hardware synthesis (from high-level architecture generation down to placement and routing), and the structure and form of high-level application constructs (such as loops and branches). However, this book may be read and used in the absence of such background knowledge. This text is aimed at researchers and system-level designers (both academic and industrial), but could easily be used as the text of graduate-level course on reconfigurable system synthesis techniques.