Chip-integrated power management solutions are a must for ultra-low power systems. This enables not only the optimization of innovative sensor applications. It is also essential for integration and miniaturization of energy harvesting supply strategies of portable and autonomous monitoring systems. The book particularly addresses interfaces for energy harvesting, which are the key element to connect micro transducers to energy storage elements. Main features of the book are: - A comprehensive technology and application review, basics on transducer mechanics, fundamental circuit and control design, prototyping and testing, up to sensor system supply and applications. - Novel interfacing concepts - including active rectifiers, MPPT methods for efficient tracking of DC as well as AC sources, and a fully-integrated charge pump for efficient maximum AC power tracking at sub-100W ultra-low power levels. The chips achieve one of widest presented operational voltage range in standard CMOS technology: 0.44V to over 4.1V. - Two special chapters on analog circuit design - it studies benefits and obstacles on implemented chip prototypes with three goals: ultra- low power, wide supply voltage range, and integration with standard technologies. Alternative design approaches are pursued using bulk-input transistor stages in forward-bias operation for amplifiers, modulators, and references. - Comprehensive Appendix - with additional fundamental analysis, design and scaling guidelines, circuit implementation tables and dimensions, schematics, source code listings, bill of material, etc. The discussed prototypes and given design guidelines are tested with real vibration transducer devices. The intended readership is graduate students in advanced courses, academics and lecturers, R&D engineers.

An emerging trend in the automobile industry is its convergence with information technology (IT). Indeed, it has been estimated that almost 90% of new automobile technologies involve IT in some form. "Smart" driving technologies that improve safety as well as "green" fuel technologies are quite representative of the convergence between IT and automobiles. The smart driving technologies include three key elements: sensing of driving environments, detection of objects and potential hazards and the generation of driving control signals including warning signals.

Although radar-based systems are primarily used for sensing the driving environments, the camera has gained importance in advanced driver assistance systems (ADAS).

This book covers system-on-a-chip (SoC) designs including both algorithms and hardware related with image sensing and object detection by using the camera for smart driving systems. It introduces a variety of algorithms such as lens correction, super resolution, image enhancement and object detections from the images captured by low-cost vehicle camera. This is followed by implementation issues such as SoC architecture, hardware accelerator, software development environment and reliability techniques for automobile vision systems.

This book is aimed for the new and practicing engineers in automotive and chip-design industries to provide some overall guidelines for the development of automotive vision systems.

It will also help graduate students understand and get started for the research work in this field."

Embedded systems applications that are either mission or safety-critical usually entail low- to mid- production volumes, require the rapid development of specific tasks, which are typically computing intensive, and are cost bounded. The adoption of re-configurable FPGAs in such application domains is constrained to the availability of suitable techniques to guarantee the dependability requirements entailed by critical applications. This book describes the challenges faced by designers when implementing a mission- or safety-critical application using re-configurable FPGAs and it details various techniques to overcome these challenges. In addition to an overview of the key concepts of re-configurable FPGAs, it provides a theoretical description of the failure modes that can cause incorrect operation of re-configurable FPGA-based electronic systems. It also outlines analysis techniques that can be used to forecast such failures and covers the theory behind solutions to mitigate fault effects. This book also reviews current technologies available for building re-configurable FPGAs, specifically SRAM-based technology and Flash-based technology. For each technology introduced, theoretical concepts presented are applied to real cases. Design techniques and tools are presented to develop critical applications using commercial, off-the-shelf devices, such as Xilinx Virtex FPGAs, and Actel ProASIC FPGAs. Alternative techniques based on radiation hardened FPGAs, such as Xilinx SIRF and Atmel ATF280 are also presented. This publication is an invaluable reference for anyone interested in understanding the technologies of re-configurable FPGAs, as well as designers developing critical applications based on these technologies.

This book describes a novel, efficient and powerful scheme for designing and evaluating the performance characteristics of any electronic filter designed with predefined specifications. The author explains techniques that enable readers to eliminate complicated manual, and thus error-prone and time-consuming, steps of traditional design techniques. The presentation includes demonstration of efficient automation, using an ANSI C language program, which accepts any filter design specification (e.g. Chebyschev low-pass filter, cut-off frequency, pass-band ripple etc.) as input and generates as output a SPICE(Simulation Program with Integrated Circuit Emphasis) format netlist. Readers then can use this netlist to run simulations with any version of the popular SPICE simulator, increasing accuracy of the final results, without violating any of the key principles of the traditional design scheme.

This book describes the use of low-power low-cost and extremely small radios to provide essential time reference for wireless sensor networks. The authors explain how to integrate such radios in a standard CMOS process to reduce both cost and size, while focusing on the challenge of designing a fully integrated time reference for such radios. To enable the integration of the time reference, system techniques are proposed and analyzed, several kinds of integrated time references are reviewed, and mobility-based references are identified as viable candidates to provide the required accuracy at low-power consumption. Practical implementations of a mobility-based oscillator and a temperature sensor are also presented, which demonstrate the required accuracy over a wide temperature range, while drawing 51-uW from a 1.2-V supply in a 65-nm CMOS process."

This book discusses the design of multi-camera systems and their application to fields such as the virtual reality, gaming, film industry, medicine, automotive industry, drones, etc. The authors cover the basics of image formation, algorithms for stitching a panoramic image from multiple cameras, and multiple real-time hardware system architectures, in order to have panoramic videos. Several specific applications of multi-camera systems are presented, such as depth estimation, high dynamic range imaging, and medical imaging.

Multimedia processing demands efficient programming in order to optimize functionality. Data, image, audio, and video processing, some or all of which are present in all electronic devices today, are complex programming environments. Optimized algorithms (step-by-step directions) are difficult to create but can make all the difference when developing a new application.
This book discusses the most current algorithms available that will maximize your programming keeping in mind the memory and real-time constraints of the architecture with which you are working. A wide range of algorithms is covered detailing basic and advanced multimedia implementations, along with, cryptography, compression, and data error correction. The general implementation concepts can be integrated into many architectures that you find yourself working with on a specific project. Analog Devices' BlackFin technology is used for examples throughout the book.
*Discusses how to decrease algorithm development times to streamline your programming
*Covers all the latest algorithms needed for contrained systems
*Includes case studies on WiMAX, GPS, and portable media players

As integrated circuits get smaller and more complex, power densities are increasing, leading to more heat generation. Dealing with this heat is fast becoming the most important design bottleneck of current and future integrated circuits, where power envelopes are defined by the ability of the system to dissipate the generated heat. Thermal effects are forcing chip designers to apply conservative design margins, creating sub-optimal results. At a larger scale, cooling is the second most costly item in the electricity bills of well-designed high-performance computing and data centers, costing 30-50% of the total. Thermal monitoring and management in integrated circuits is therefore becoming increasingly important. This book covers thermal monitoring and management in integrated circuits, with a focus on devices and materials that are intimately integrated on-chip as opposed to in-package or on-board. The devices and circuits discussed include various designs used for the purpose of converting temperature to a digital measurement and actively biased circuits that reverse thermal gradients on chips for the purpose of cooling. Topics covered include an overview of heat in integrated circuits and systems, on-chip temperature sensing, dynamic thermal management, active cooling, and mitigating thermal events at the system-level and above.

System-on-Chip (SoC) is believed to represent the next major market for microelectronics, and there is a considerable interest world-wide in developing effective methods and tools to support the SoC paradigm. The field of SoC is broad and expanding and at present the technical and technological literature about the overall state-of-the-art in SoC is dispersed across a wide spectrum of books, journals, and conference proceedings. This edited book is an attempt to provide a comprehensive and accessible source of state-of-the-art information on existing and emerging SoC key research areas. In particular, the book covers the general principles and ideas of designing, validating and testing complex embedded computing systems and their underlying tradeoffs. Twenty-five international research groups have contributed to the book. Each contribution has an up-to-date survey highlighting the key achievements and future trends. To facilitate the understanding of the various topics covered in the book, each chapter has some background covering the basic principles, and extensive list of references. To enhance the book readability, the chapters are grouped into eight parts, each part examining a particular theme of SoC, including system design, embedded software, power management, reconfigurable computing, network-on-chip, verification and test. The book will be of interest to graduate students, designers and managers working in Electronic and Computer engineering.

Simulation based on mathematical models plays a major role in computer aided design of integrated circuits (ICs). Decreasing structure sizes, increasing packing densities and driving frequencies require the use of refined mathematical models, and to take into account secondary, parasitic effects. This leads to very high dimensional problems which nowadays require simulation times too large for the short time-to-market demands in industry. Modern Model Order Reduction (MOR) techniques present a way out of this dilemma in providing surrogate models which keep the main characteristics of the device while requiring a significantly lower simulation time than the full model. With Model Reduction for Circuit Simulation we survey the state of the art in the challenging research field of MOR for ICs, and also address its future research directions. Special emphasis is taken on aspects stemming from miniturisations to the nano scale. Contributions cover complexity reduction using e.g., balanced truncation, Krylov-techniques or POD approaches. For semiconductor applications a focus is on generalising current techniques to differential-algebraic equations, on including design parameters, on preserving stability, and on including nonlinearity by means of piecewise linearisations along solution trajectories (TPWL) and interpolation techniques for nonlinear parts. Furthermore the influence of interconnects and power grids on the physical properties of the device is considered, and also top-down system design approaches in which detailed block descriptions are combined with behavioral models. Further topics consider MOR and the combination of approaches from optimisation and statistics, and the inclusion of PDE models with emphasis on MOR for the resulting partial differential algebraic systems. The methods which currently are being developed have also relevance in other application areas such as mechanical multibody systems, and systems arising in chemistry and to biology. The current number of books in the area of MOR for ICs is very limited, so that this volume helps to fill a gap in providing the state of the art material, and to stimulate further research in this area of MOR. Model Reduction for Circuit Simulation also reflects and documents the vivid interaction between three active research projects in this area, namely the EU-Marie Curie Action ToK project O-MOORE-NICE (members in Belgium, The Netherlands and Germany), the EU-Marie Curie Action RTN-project COMSON (members in The Netherlands, Italy, Germany, and Romania), and the German federal project System reduction in nano-electronics (SyreNe).

This book is about security in embedded systems and it provides an authoritative reference to all aspects of security in system-on-chip (SoC) designs. The authors discuss issues ranging from security requirements in SoC designs, definition of architectures and design choices to enforce and validate security policies, and trade-offs and conflicts involving security, functionality, and debug requirements. Coverage also includes case studies from the "trenches" of current industrial practice in design, implementation, and validation of security-critical embedded systems. Provides an authoritative reference and summary of the current state-of-the-art in security for embedded systems, hardware IPs and SoC designs; Takes a "cross-cutting" view of security that interacts with different design and validation components such as architecture, implementation, verification, and debug, each enforcing unique trade-offs; Includes high-level overview, detailed analysis on implementation, and relevant case studies on design/verification/debug issues related to IP/SoC security.

This book provides a systematic and unified methodology, including basic principles and reusable processes, for dynamic memory management (DMM) in embedded systems. The authors describe in detail how to design and optimize the use of dynamic memory in modern, multimedia and network applications, targeting the latest generation of portable embedded systems, such as smartphones. Coverage includes a variety of design and optimization topics in electronic design automation of DMM, from high-level software optimization to microarchitecture-level hardware support. The authors describe the design of multi-layer dynamic data structures for the final memory hierarchy layers of the target portable embedded systems and how to create a low-fragmentation, cost-efficient, dynamic memory management subsystem out of configurable components for the particular memory allocation and de-allocation patterns for each type of application. The design methodology described in this book is based on propagating constraints among design decisions from multiple abstraction levels (both hardware and software) and customizing DMM according to application-specific data access and storage behaviors.

This book explores the impacts of important material parameters on the electrical properties of indium arsenide (InAs) nanowires, which offer a promising channel material for low-power electronic devices due to their small bandgap and high electron mobility. Smaller diameter nanowires are needed in order to scale down electronic devices and improve their performance. However, to date the properties of thin InAs nanowires and their sensitivity to various factors were not known. The book presents the first study of ultrathin InAs nanowires with diameters below 10 nm are studied, for the first time, establishing the channel in field-effect transistors (FETs) and the correlation between nanowire diameter and device performance. Moreover, it develops a novel method for directly correlating the atomic-level structure with the properties of individual nanowires and their device performance. Using this method, the electronic properties of InAs nanowires and the performance of the FETs they are used in are found to change with the crystal phases (wurtzite, zinc-blend or a mix phase), the axis direction and the growth method. These findings deepen our understanding of InAs nanowires and provide a potential way to tailor device performance by controlling the relevant parameters of the nanowires and devices.

In three parts, this book contributes to the advancement of engineering education and that serves as a general reference on digital signal processing. Part I presents the basics of analog and digital signals and systems in the time and frequency domain. It covers the core topics: convolution, transforms, filters, and random signal analysis. It also treats important applications including signal detection in noise, radar range estimation for airborne targets, binary communication systems, channel estimation, banking and financial applications, and audio effects production. Part II considers selected signal processing systems and techniques. Core topics covered are the Hilbert transformer, binary signal transmission, phase-locked loops, sigma-delta modulation, noise shaping, quantization, adaptive filters, and non-stationary signal analysis. Part III presents some selected advanced DSP topics.

This book provides comprehensive coverage of the latest trends/advances in subjective and objective quality evaluation for traditional visual signals, such as 2D images and video, as well as the most recent challenges for the field of multimedia quality assessment and processing, such as mobile video and social media. Readers will learn how to ensure the highest storage/delivery/ transmission quality of visual content (including image, video, graphics, animation, etc.) from the server to the consumer, under resource constraints, such as computation, bandwidth, storage space, battery life, etc.

This book provides a comprehensive overview of flow-based, microfluidic VLSI. The authors describe and solve in a comprehensive and holistic manner practical challenges such as control synthesis, wash optimization, design for testability, and diagnosis of modern flow-based microfluidic biochips. They introduce practical solutions, based on rigorous optimization and formal models. The technical contributions presented in this book will not only shorten the product development cycle, but also accelerate the adoption and further development of modern flow-based microfluidic biochips, by facilitating the full exploitation of design complexities that are possible with current fabrication techniques.

A brain-computer interface (BCI) establishes a direct output channel between the human brain and external devices. BCIs infer user intent via direct measures of brain activity and thus enable communication and control without movement. This book, authored by experts in the field, provides an accessible introduction to the neurophysiological and signal-processing background required for BCI, presents state-of-the-art non-invasive and invasive approaches, gives an overview of current hardware and software solutions, and reviews the most interesting as well as new, emerging BCI applications. The book is intended not only for students and young researchers, but also for newcomers and other readers from diverse backgrounds keen to learn about this vital scientific endeavour.

This book demonstrates the usefulness of the switching function in analyzing powers electronic circuits in the steady state. A procedure is suggested for the effective application of this effective application of this method for the analysis of all types of power electronic circuits. The Kirchoff's Laws and the Superposition theorem are applied by introducing the appropriate switching functions in order to derive Unified Expressions of voltage and current in switched circuits valid at all times. The exact expressions of the current in each semiconductor device in the circuit enables the circuit designer to collect all the relevant data to set the ratings of the device such as rms, average and peak values of voltage and current. The order of the voltage and current harmonics at any point in the circuit are derived with simple arithmetic. Compact expressions are derived for Sinusoidal PWM signals based on the switching function. The order, magnitude and phase of each component are derived directly from the expression with simple arithmetic. The educator has a simple way to present to his students the mechanism of operation of complex switched circuits where all the statements regarding their operation are actually presented in the model of the circuit.

Low Power Consumption is one of the critical issues in the performance of small battery-powered handheld devices. Mobile terminals feature an ever increasing number of wireless communication alternatives including GPS, Bluetooth, GSM, 3G, WiFi or DVB-H. Considering that the total power available for each terminal is limited by the relatively slow increase in battery performance expected in the near future, the need for efficient circuits is now critical. This book presents the basic techniques available to design low power RF CMOS analogue circuits. It gives circuit designers a complete guide of alternatives to optimize power consumption and explains the application of these rules in the most common RF building blocks: LNA, mixers and PLLs. It is set out using practical examples and offers a unique perspective as it targets designers working within the standard CMOS process and all the limitations inherent in these technologies.

This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect. It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools. Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms, NoC router design, NoC-based system integration, verification and testing, and NoC reliability. Case studies are used to illuminate new design methodologies.

This book tackles head-on the challenges of digital design in the era of billion-transistor SoCs. It discusses fundamental design concepts in design and coding required to produce robust, functionally correct designs. It also provides specific techniques for measuring and minimizing complexity in RTL code. Finally, it discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages must progress to address the needs of tomorrow 's SoC designs.

This book provides a detailed analysis of all aspects of capacitive DC-DC converter design: topology selection, control loop design and noise mitigation. Readers will benefit from the authors' systematic overview that starts from the ground up, in-depth circuit analysis and a thorough review of recently proposed techniques and design methodologies. Not only design techniques are discussed, but also implementation in CMOS is shown, by pinpointing the technological opportunities of CMOS and demonstrating the implementation based on four state-of-the-art prototypes. "

The aim of this book is to expand and improve upon the existing knowledge on discrete-time 1-bit look-ahead sigma-delta modulation in general, and to come to a solution for the above mentioned specific issues arising from 1-bit sigma-delta modulation for SA-CD. In order to achieve this objective an analysis is made of the possibilities for improving the performance of digital noise-shaping look-ahead solutions. On the basis of the insights obtained from the analysis, several novel generic 1-bit look-ahead solutions that improve upon the state-of-the-art will be derived and their performance will be evaluated and compared. Finally, all the insights are combined with the knowledge of the SA-CD lossless data compression algorithm to come to a specifically for SA-CD optimized look-ahead design.

To satisfy the higher requirements of digitally converged embedded systems, this book describes heterogeneous multicore technology that uses various kinds of low-power embedded processor cores on a single chip. With this technology, heterogeneous parallelism can be implemented on an SoC, and greater flexibility and superior performance per watt can then be achieved. This book defines the heterogeneous multicore architecture and explains in detail several embedded processor cores including CPU cores and special-purpose processor cores that achieve highly arithmetic-level parallelism. The authors developed three multicore chips (called RP-1, RP-2, and RP-X) according to the defined architecture with the introduced processor cores. The chip implementations, software environments, and applications running on the chips are also explained in the book. Provides readers an overview and practical discussion of heterogeneous multicore technologies from both a hardware and software point of view; Discusses a new, high-performance and energy efficient approach to designing SoCs for digitally converged, embedded systems; Covers hardware issues such as architecture and chip implementation, as well as software issues such as compilers, operating systems, and application programs; Describes three chips developed according to the defined heterogeneous multicore architecture, including chip implementations, software environments, and working applications.

This book provides embedded software developers with techniques for programming heterogeneous Multi-Processor Systems-on-Chip (MPSoCs), capable of executing multiple applications simultaneously. It describes a set of algorithms and methodologies to narrow the software productivity gap, as well as an in-depth description of the underlying problems and challenges of today's programming practices. The authors present four different tool flows: A parallelism extraction flow for applications written using the C programming language, a mapping and scheduling flow for parallel applications, a special mapping flow for baseband applications in the context of Software Defined Radio (SDR) and a final flow for analyzing multiple applications at design time. The tool flows are evaluated on Virtual Platforms (VPs), which mimic different characteristics of state-of-the-art heterogeneous MPSoCs.