The primary objective of this NATO Advanced Study Institute (ASI) was to present an up-to-date overview of various current areas of interest in the field of photovoltaic and related photoactive materials. This is a wide-ranging subject area, of significant commercial and environmental interest, and involves major contributions from the disciplines of physics, chemistry, materials, electrical and instrumentation engineering, commercial realisation etc. Therefore, we sought to adopt an inter disciplinary approach, bringing together recognised experts in the various fields while retaining a level of treatment accessible to those active in specific individual areas of research and development. The lecture programme commenced with overviews of the present relevance and historical development of the subject area, plus an introduction to various underlying physical principles of importance to the materials and devices to be addressed in later lectures. Building upon this, the ASI then progressed to more detailed aspects of the subject area. We were also fortunately able to obtain a contribution from Thierry Langlois d'Estaintot of the European Commission Directorate, describing present and future EC support for activities in this field. In addition, poster sessions were held throughout the meeting, to allow participants to present and discuss their current activities. These were supported by what proved to be very effective feedback sessions (special thanks to Martin Stutzmann), prior to which groups of participants enthusiastically met (often in the bar) to identify and agree topics of common interest."

Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems describes coding approaches for designing fault-tolerant systems, i.e., systems that exhibit structured redundancy that enables them to distinguish between correct and incorrect results or between valid and invalid states. Since redundancy is expensive and counter-intuitive to the traditional notion of system design, the book focuses on resource-efficient methodologies that avoid excessive use of redundancy by exploiting the algorithmic/dynamic structure of a particular combinational or dynamic system. The first part of Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems focuses on fault-tolerant combinational systems providing a review of von Neumann's classical work on Probabilistic Logics (including some more recent work on noisy gates) and describing the use of arithmetic coding and algorithm-based fault-tolerant schemes in algebraic settings. The second part of the book focuses on fault tolerance in dynamic systems. Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems also discusses how, in a dynamic system setting, one can relax the traditional assumption that the error-correcting mechanism is fault-free by using distributed error correcting mechanisms. The final chapter presents a methodology for fault diagnosis in discrete event systems that are described by Petri net models; coding techniques are used to quickly detect and identify failures. From the Foreword "Hadjicostis has significantly expanded the setting to processes occurring in more general algebraic and dynamic systems... The book responds to the growing need to handle faults in complex digital chips and complex networked systems, and to consider the effects of faults at the design stage rather than afterwards." George Verghese, Massachusetts Institute of Technology Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems will be of interest to both researchers and practitioners in the area of fault tolerance, systems design and control.

This book provides readers with a broad overview of integrated circuits, also generally referred to as micro-electronics. The presentation is designed to be accessible to readers with limited, technical knowledge and coverage includes key aspects of integrated circuit design, implementation, fabrication and application. The author complements his discussion with a large number of diagrams and photographs, in order to reinforce the explanations. The book is divided into two parts, the first of which is specifically developed for people with almost no or little technical knowledge. It presents an overview of the electronic evolution and discusses the similarity between a chip floor plan and a city plan, using metaphors to help explain concepts. It includes a summary of the chip development cycle, some basic definitions and a variety of applications that use integrated circuits. The second part digs deeper into the details and is perfectly suited for professionals working in one of the semiconductor disciplines who want to broaden their semiconductor horizon.

Rapid advances in neural sciences and VLSI design technologies have provided an excellent means to boost the computational capability and efficiency of data and signal processing tasks by several orders of magnitude. With massively parallel processing capabilities, artificial neural networks can be used to solve many engineering and scientific problems. Due to the optimized data communication structure for artificial intelligence applications, a neurocomputer is considered as the most promising sixth-generation computing machine. Typical applica tions of artificial neural networks include associative memory, pattern classification, early vision processing, speech recognition, image data compression, and intelligent robot control. VLSI neural circuits play an important role in exploring and exploiting the rich properties of artificial neural networks by using pro grammable synapses and gain-adjustable neurons. Basic building blocks of the analog VLSI neural networks consist of operational amplifiers as electronic neurons and synthesized resistors as electronic synapses. The synapse weight information can be stored in the dynamically refreshed capacitors for medium-term storage or in the floating-gate of an EEPROM cell for long-term storage. The feedback path in the amplifier can continuously change the output neuron operation from the unity-gain configuration to a high-gain configuration. The adjustability of the vol tage gain in the output neurons allows the implementation of hardware annealing in analog VLSI neural chips to find optimal solutions very efficiently. Both supervised learning and unsupervised learning can be implemented by using the programmable neural chips."

Among analog-to-digital converters, the delta-sigma modulator has cornered the market on high to very high resolution converters at moderate speeds, with typical applications such as digital audio and instrumentation. Interest has recently increased in delta-sigma circuits built with a continuous-time loop filter rather than the more common switched-capacitor approach. Continuous-time delta-sigma modulators offer less noisy virtual ground nodes at the input, inherent protection against signal aliasing, and the potential to use a physical rather than an electrical integrator in the first stage for novel applications like accelerometers and magnetic flux sensors. More significantly, they relax settling time restrictions so that modulator clock rates can be raised. This opens the possibility of wideband (1 MHz or more) converters, possibly for use in radio applications at an intermediate frequency so that one or more stages of mixing might be done in the digital domain. Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion: Theory, Practice and Fundamental Performance Limits covers all aspects of continuous-time delta-sigma modulator design, with particular emphasis on design for high clock speeds. The authors explain the ideal design of such modulators in terms of the well-understood discrete-time modulator design problem and provide design examples in Matlab. They also cover commonly-encountered non-idealities in continuous-time modulators and how they degrade performance, plus a wealth of material on the main problems (feedback path delays, clock jitter, and quantizer metastability) in very high-speed designs and how to avoid them. They also give a concrete design procedure for a real high-speed circuit which illustrates the tradeoffs in the selection of key parameters. Detailed circuit diagrams, simulation results and test results for an integrated continuous-time 4 GHz band-pass modulator for A/D conversion of 1 GHz analog signals are also presented. Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion: Theory, Practice and Fundamental Performance Limits concludes with some promising modulator architectures and a list of the challenges that remain in this exciting field.

Few people know what wandering spurs are; fewer still know how to get rid of them. This book, which is written by those who raised awareness of wandering spurs, explained how they arise, and invented ways to get rid of them, contains valuable insights, analytical techniques and examples that will enable the reader to become an expert in the area. The book is aimed at circuit design professionals who need to ensure that their designs are not compromised by wandering spurs. In addition to insights, theory, and analysis, it contains practical circuit solutions, the performance of which are characterized experimentally. This book explains-using simulation, analysis, and experimental measurements-what wandering spurs are, how they arise, how to characterize them and, most importantly, how to get rid of them. The authors present not only theoretical analysis and simulation strategies, but also provide an overview of spectral analysis techniques for studying the phenomenon and convincing experimental results from both commercially available and custom-designed monolithic synthesizers. Explains what wandering spurs are and how they differ qualitatively from the well-known fixed spurs that plague fractional-N frequency synthesizers; Provides analytical and simulation methods to study wandering spurs and original analysis of the cause of this recently reported spectral phenomenon; Presents and analyses theoretical designs based on a conventional MASH 1-1-1 to mitigate wandering spurs; Describes measured performance for the discussed designs, confirming their effectiveness in mitigating wandering spurs.

?Tools alone aren't enough to reduce dynamic and leakage power in complex chip designs - a well-planned methodology is needed. Following in the footsteps of the successful Reuse Methodology Manual (RMM), authors from ARM and Synopsys have written this Low Power Methodology Manual (LPMM) to describe such] a] low-power methodology with a practical, step-by-step approach.? Richard Goering, Software Editor, EE Times ?Excellent compendium of low-power techniques and guidelines with balanced content spanning theory and practical implementation. The LPMM is a very welcome addition to the field of low power SoC implementation that has for many years operated in a largely ad-hoc fashion.? Sujeeth Joseph, Chief Architect - Semiconductor and Systems Solutions Unit, Wipro Technologies ?The LPMM enables broader adoption of aggressive power management techniques based on extensive experience and silicon example with real data that every SOC designer can use to meet the difficulties faced in managing the power issues in deep submicron designs.? Anil Mankar, Sr VP Worldwide Core Engineering and Chief Development Officer, Conexant Systems Inc. ?Managing power, at 90nm and below, introduces significant challenges to design flow. The LPMM is a timely and immediately useful book that shows how combination of tools, IP and methodology can be used together to address power management.? Nick Salter, Head of Chip Integration, CSR plc.

Now in a thoroughly revised second edition, this practical practitioner guide provides a comprehensive overview of the SoC design process. It explains end-to-end system on chip (SoC) design processes and includes updated coverage of design methodology, the design environment, EDA tool flow, design decisions, choice of design intellectual property (IP) cores, sign-off procedures, and design infrastructure requirements. The second edition provides new information on SOC trends and updated design cases. Coverage also includes critical advanced guidance on the latest UPF-based low power design flow, challenges of deep submicron technologies, and 3D design fundamentals, which will prepare the readers for the challenges of working at the nanotechnology scale. A Practical Approach to VLSI System on Chip (SoC) Design: A Comprehensive Guide, Second Edition provides engineers who aspire to become VLSI designers with all the necessary information and details of EDA tools. It will be a valuable professional reference for those working on VLSI design and verification portfolios in complex SoC designs

This book presents scientific and technological innovations and advancements already developed or under development in academia, industry, and research communities. It includes fundamental ideas and advancement in terahertz technology covering high intensity terahertz wave generation, THz detection, different modes of THz wave generation, THz modulation system, and terahertz propagation channel modeling. It highlights methodologies for the design of terahertz components and system technologies including emerging applications. The chapter contents are based on theoretical, methodological, well-established, and validated empirical work dealing with different topics in the terahertz domain. The book covers a very broad audience ranging from basic sciences to experts and learners in engineering and technology. It would be a good reference for advanced ideas and concepts in THz technology which will best suit microwave, biomedical, and electrical and communication engineers working towards next-generation technology.

Higher circuit densities, increasingly more complex application ohjectives, and advanced packaging technologies have suhstantially increased the need to incorporate defect-tolerance and fault-tolerance in the design of VLSI and WSI systems. The goals of defect-tolerance and fault-tolerance are yield enhancement and improved reliahility. The emphasis on this area has resulted in a new field of interdisciplinary scientific research. I n fact, advanced methods of defect/fault control and tolerance are resulting in enhanced manufacturahility and productivity of integrated circuit chips, VI.SI systems, and wafer scale integrated circuits. In 1987, Dr. W. Moore organized an "International Workshop on Designing for Yield" at Oxford University. Edited papers of that workshop were published in reference [II. The participants in that workshop agreed that meetings of this type should he con tinued. preferahly on a yearly hasis. It was Dr. I. Koren who organized the "IEEE Inter national Workshop on Defect and Fault Tolerance in VLSI Systems" in Springfield Massachusetts the next year. Selected papers from that workshop were puhlished as the first volume of this series [21.

This book discusses the implementation of digital circuits by using MCML gates. Although digital circuit implementation is possible with other elements, such as CMOS gates, MCML implementations can provide superior performance in certain applications. This book provides a complete automation methodology for the implementation of digital circuits in MCML and provides an extensive explanation on the technical details of design of MCML. A systematic methodology is presented to build efficient MCML standard-cell libraries, and a complete top-down design flow is shown to implement complex systems using such building blocks.

This book introduces the reader to FPGA based design for RTL synthesis. It describes simple to complex RTL design scenarios using SystemVerilog. The book builds the story from basic fundamentals of FPGA based designs to advance RTL design and verification concepts using SystemVerilog. It provides practical information on the issues in the RTL design and verification and how to overcome these. It focuses on writing efficient RTL codes using SystemVerilog, covers design for the Xilinx FPGAs and also includes implementable code examples. The contents of this book cover improvement of design performance, assertion based verification, verification planning, and architecture and system testing using FPGAs. The book can be used for classroom teaching or as a supplement in lab work for undergraduate and graduate coursework as well as for professional development and training programs. It will also be of interest to researchers and professionals interested in the RTL design for FPGA and ASIC.

Time-interleaved Analog-to-Digital Converters describes the research performed on low-power time-interleaved ADCs. A detailed theoretical analysis is made of the time-interleaved Track & Hold, since it must be capable of handling signals in the GHz range with little distortion, and minimal power consumption. Timing calibration is not attractive, therefore design techniques are presented which do not require timing calibration. The design of power efficient sub-ADCs is addressed with a theoretical analysis of a successive approximation converter and a pipeline converter. It turns out that the first can consume about 10 times less power than the latter, and this conclusion is supported by literature. Time-interleaved Analog-to-Digital Converters describes the design of a high performance time-interleaved ADC, with much attention for practical design aspects, aiming at both industry and research. Measurements show best-inclass performance with a sample-rate of 1.8 GS/s, 7.9 ENOBs and a power efficiency of 1 pJ/conversion-step.

This resource addresses the complicated modulation schemes and higher frequencies required of today's wireless communications circuits. Covering cutting-edge developments in mixer circuits, frequency synthesizers, amplifier design, noise, and the future of wireless communication, it helps you design applications for digital cellular telephony, wireless LANs, PCS, GaAs and high-speed silicon bipolar IC technology, and low-power RF circuit technology.

Aircraft Instruments and Integrated Systems provides a wealth of unique information covering all aspects of operating principles and constructional features of the instrumentation and integrated systems required for the flight handling and navigation of aircraft, and also for the performance monitoring of their relevant powerplants. The text is liberally illustrated with schematic diagrams, colour and black and white photographs and a number of tables and appendices for easy reference. All the instruments and systems detailed are representative of those installed in a range of civil aircraft types currently in service. The operating principles of digital computer techniques and electronic displays are emphasised. Essay-type exercises and multi-choice questions relevant to subjects covered by each chapter, will enable readers to conduct 'self-tests'.

This book is intended to be a working reference for electronic hardware de signers who are interested in writing VHDL models. A handbook/cookbook approach is taken, with many complete examples used to illustrate the fea tures of the VHDL language and to provide insight into how particular classes of hardware devices can be modelled in VHDL. It is possible to use these models directly or to adapt them to similar problems with minimal effort. This book is not intended to be a complete reference manual for the VHDL language. It is possible to begin writing VHDL models with little background in VHDL by copying examples from the book and adapting them to particular problems. Some exposure to the VHDL language prior to using this book is recommended. The reader is assumed to have a solid hardware design background, preferably with some simulation experience. For the reader who is interested in getting a complete overview of the VHDL language, the following publications are recommended reading: * An Introduction to VHDL: Hardware Description and Design [LIP89] * IEEE Standard VHDL Language Reference Manual [IEEE87] * Chip-Level Behavioral Modelling [ARMS88] * Multi-Level Simulation of VLSI Systems [COEL87] Other references of interest are [USG88], [DOD88] and [CLSI87] Use of the Book If the reader is familiar with VHDL, the models described in chapters 3 through 7 can be applied directly to design problems.

This book describes analytical models and estimation methods to enhance performance estimation of pipelined multiprocessor systems-on-chip (MPSoCs). A framework is introduced for both design-time and run-time optimizations. For design space exploration, several algorithms are presented to minimize the area footprint of a pipelined MPSoC under a latency or a throughput constraint. A novel adaptive pipelined MPSoC architecture is described, where idle processors are transitioned into low-power states at run-time to reduce energy consumption. Multi-mode pipelined MPSoCs are introduced, where multiple pipelined MPSoCs optimized separately are merged into a single pipelined MPSoC, enabling further reduction of the area footprint by sharing the processors and communication buffers. Readers will benefit from the authors' combined use of analytical models, estimation methods and exploration algorithms and will be enabled to explore billions of design points in a few minutes.

This book comprehensively covers the state-of-the-art security applications of machine learning techniques. The first part explains the emerging solutions for anti-tamper design, IC Counterfeits detection and hardware Trojan identification. It also explains the latest development of deep-learning-based modeling attacks on physically unclonable functions and outlines the design principles of more resilient PUF architectures. The second discusses the use of machine learning to mitigate the risks of security attacks on cyber-physical systems, with a particular focus on power plants. The third part provides an in-depth insight into the principles of malware analysis in embedded systems and describes how the usage of supervised learning techniques provides an effective approach to tackle software vulnerabilities.

This book provides a comprehensive overview on the recent significant advancements of conductive polymers and their composites in terms of conductive mechanism, fabrication strategies, important properties, and various promising applications. The corresponding knowledge was systematically compiled in the logical order and demonstrated as seven chapters. The special structure, influencing factors of the conductivity, the charge carrier transport model, the wettability and classical categories of the conductive polymers are narrated. Both conventional and novel strategies undertaken to fabricate the conductive polymers are introduced, as provided the overall master of the progress. In comparison with the bulk counterpart, nanostructured conductive polymers with different dimensions such as nanospheres, nano-networks, nanotubes and nanowire arrays are produced through distinct methods, thus presenting unique and distinct performance endowed by the nanometer scale. The combination of conductive polymers with other functional materials results in a number of the composites with improved properties by synergistic effect. The superior performance of conductive polymers and their composites greatly facilitates their development toward various important applications in the advanced and sophisticated fields such as biological utilization, energy storage and sensors. Due to their excellent biocompatibility, conductive polymers and their composites stand out to be useful in the biological field including tissue engineering, drug delivery and artificial muscle. To meet the urgent demand of the energy storage, conductive polymers and their composites play an important role in the devices including supercapacitors, solar cells and fuel cells. Finally, development of conductive polymers and their composites in the modern industry is greatly enhanced by their applications in smart sensors such as conductometric sensors, gravimetric sensors, optical sensors, chemical sensors and biosensors. This book has significant value for researchers, graduate students, and engineers carrying out the fundamental research or industrial production of conductive polymers and their composites.

CMOS Processors and Memories addresses the-state-of-the-art in integrated circuit design in the context of emerging computing systems. New design opportunities in memories and processor are discussed. Emerging materials that can take system performance beyond standard CMOS, like carbon nanotubes, graphene, ferroelectrics and tunnel junctions are explored.

CMOS Processors and Memories is divided into two parts: processors and memories. In the first part we start with high performance, low power processor design, followed by a chapter on multi-core processing. They both represent state-of-the-art concepts in current computing industry. The third chapter deals with asynchronous design that still carries lots of promise for future computing needs. At the end we present a "hardware design space exploration" methodology for implementing and analyzing the hardware for the Bayesian inference framework. This particular methodology involves: analyzing the computational cost and exploring candidate hardware components, proposing various custom architectures using both traditional CMOS and hybrid nanotechnology CMOL. The first part concludes with hybrid CMOS-Nano architectures.

The second, memory part covers state-of-the-art SRAM, DRAM, and flash memories as well as emerging device concepts. Semiconductor memory is a good example of the full custom design that applies various analog and logic circuits to utilize the memory cell's device physics. Critical physical effects that include tunneling, hot electron injection, charge trapping (Flash memory) are discussed in detail. Emerging memories like FRAM, PRAM and ReRAM that depend on magnetization, electron spin alignment, ferroelectric effect, built-in potential well, quantum effects, and thermal melting are also described.

CMOS Processors and Memories is a must for anyone serious about circuit design for future computing technologies. The book is written by top notch international experts in industry and academia. It can be used in graduate course curriculum.

Designing VLSI systems represents a challenging task. It is a transfonnation among different specifications corresponding to different levels of design: abstraction, behavioral, stntctural and physical. The behavioral level describes the functionality of the design. It consists of two components; static and dynamic. The static component describes operations, whereas the dynamic component describes sequencing and timing. The structural level contains infonnation about components, control and connectivity. The physical level describes the constraints that should be imposed on the floor plan, the placement of components, and the geometry of the design. Constraints of area, speed and power are also applied at this level. To implement such multilevel transfonnation, a design methodology should be devised, taking into consideration the constraints, limitations and properties of each level. The mapping process between any of these domains is non-isomorphic. A single behavioral component may be transfonned into more than one structural component. Design methodologies are the most recent evolution in the design automation era, which started off with the introduction and subsequent usage of module generation especially for regular structures such as PLA's and memories. A design methodology should offer an integrated design system rather than a set of separate unrelated routines and tools. A general outline of a desired integrated design system is as follows: * Decide on a certain unified framework for all design levels. * Derive a design method based on this framework. * Create a design environment to implement this design method.

Cryptographic Engineering is the first book that discusses the design techniques and methods. The material of this book is scattered in journal and conference articles, and authors lecture notes. This is a first attempt by top cryptographic engineers to bring this material in a book form and make it available to electrical engineering and computer science students and engineers working for the industry.

This book is intended for a graduate-level course in Cryptographic Engineering to be taught in Electrical Engineering, Computer Engineering, and Computer Science departments. Students will have to have the knowledge of basic cryptographic algorithms before taking this course which will teach them how to design cryptographic hardware (FPGA, ASIC, custom) and embedded software to be used in secure systems.

Additionally, engineers working in the industry will be interested in this book to learn how to design cryptographic chips and embedded software. Engineers working on the design of cellular phones, mobile computing and sensor systems, web and enterprise security systems which rely upon cryptographic hardware and software will be interested in this book. Essential and advanced design techniques for cryptography will be covered by this book."

This book provides readers with the necessary background information and advanced concepts in the field of circuits, at the crossroads between physics, mathematics and system theory. It covers various engineering subfields, such as electrical devices and circuits, and their electronic counterparts. Based on the idea that a modern university course should provide students with conceptual tools to understand the behavior of both linear and nonlinear circuits, to approach current problems posed by new, cutting-edge devices and to address future developments and challenges, the book places equal emphasis on linear and nonlinear, two-terminal and multi-terminal, as well as active and passive circuit components. This second volume focuses on dynamical circuits, which are characterized by time evolution and by the concept of state. The content is divided into a set of introductory and a set of advanced-level topics, mirroring the approach used in the previously published volume. Whenever possible, circuits are compared to physical systems of different natures (e.g. mechanical or biological) that exhibit the same dynamical behavior. The book also features a wealth of examples and numerous solved problems. Further topics, such as a more general framing of linear and nonlinear components, will be discussed in volume 3.

An Introduction to Surface-Micromachining provides for the first time a unified view of surface-micromachining. Building up from the basic building block of microfabrication techniques, to the general surface-micromachining design, it will finish with the theory and design of concrete components. An Introduction to Surface-Micromachining connects the manufacturing process, microscale phenomena, and design data to physical form and function.
This book will be of interest to mechanical engineers looking to scale down into micromachining and microelectronics designers looking to move horizontally to micromachining.

Presents a treatment that begins with an overview of the electronics design process and proceeds to examine the levels of electronic packaging and the fundamental issues in the development. It is both a handbook for practitioners and a text for use in teaching electronic packaging concepts, guidelines, and techniques.