With the end of Dennard scaling and Moore's law, IC chips, especially large-scale ones, now face more reliability challenges, and reliability has become one of the mainstay merits of VLSI designs. In this context, this book presents a built-in on-chip fault-tolerant computing paradigm that seeks to combine fault detection, fault diagnosis, and error recovery in large-scale VLSI design in a unified manner so as to minimize resource overhead and performance penalties. Following this computing paradigm, we propose a holistic solution based on three key components: self-test, self-diagnosis and self-repair, or "3S" for short. We then explore the use of 3S for general IC designs, general-purpose processors, network-on-chip (NoC) and deep learning accelerators, and present prototypes to demonstrate how 3S responds to in-field silicon degradation and recovery under various runtime faults caused by aging, process variations, or radical particles. Moreover, we demonstrate that 3S not only offers a powerful backbone for various on-chip fault-tolerant designs and implementations, but also has farther-reaching implications such as maintaining graceful performance degradation, mitigating the impact of verification blind spots, and improving chip yield. This book is the outcome of extensive fault-tolerant computing research pursued at the State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences over the past decade. The proposed built-in on-chip fault-tolerant computing paradigm has been verified in a broad range of scenarios, from small processors in satellite computers to large processors in HPCs. Hopefully, it will provide an alternative yet effective solution to the growing reliability challenges for large-scale VLSI designs.

This textbook for courses in Embedded Systems introduces students to necessary concepts, through a hands-on approach. LEARN BY EXAMPLE - This book is designed to teach the material the way it is learned, through example. Every concept is supported by numerous programming examples that provide the reader with a step-by-step explanation for how and why the computer is doing what it is doing. LEARN BY DOING - This book targets the Texas Instruments MSP430 microcontroller. This platform is a widely popular, low-cost embedded system that is used to illustrate each concept in the book. The book is designed for a reader that is at their computer with an MSP430FR2355 LaunchPadTM Development Kit plugged in so that each example can be coded and run as they learn. LEARN BOTH ASSEMBLY AND C - The book teaches the basic operation of an embedded computer using assembly language so that the computer operation can be explored at a low-level. Once more complicated systems are introduced (i.e., timers, analog-to-digital converters, and serial interfaces), the book moves into the C programming language. Moving to C allows the learner to abstract the operation of the lower-level hardware and focus on understanding how to "make things work". BASED ON SOUND PEDAGOGY - This book is designed with learning outcomes and assessment at its core. Each section addresses a specific learning outcome that the student should be able to "do" after its completion. The concept checks and exercise problems provide a rich set of assessment tools to measure student performance on each outcome.

The workshop on Scalable Shared Memory Multiprocessors took place on May 26 and 27 1990 at the Stouffer Madison Hotel in Seattle, Washington as a prelude to the 1990 International Symposium on Computer Architecture. About 100 participants listened for two days to the presentations of 22 invited The motivation for this workshop was to speakers, from academia and industry. promote the free exchange of ideas among researchers working on shared-memory multiprocessor architectures. There was ample opportunity to argue with speakers, and certainly participants did not refrain a bit from doing so. Clearly, the problem of scalability in shared-memory multiprocessors is still a wide-open question. We were even unable to agree on a definition of "scalability." Authors had more than six months to prepare their manuscript, and therefore the papers included in this proceedings are refinements of the speakers' presentations, based on the criticisms received at the workshop. As a result, 17 authors contributed to these proceedings. We wish to thank them for their diligence and care. The contributions in these proceedings can be partitioned into four categories 1. Access Order and Synchronization 2. Performance 3. Cache Protocols and Architectures 4. Distributed Shared Memory Particular topics on which new ideas and results are presented in these proceedings include: efficient schemes for combining networks, formal specification of shared memory models, correctness of trace-driven simulations, synchronization, various coherence protocols, ."

This volume comprises the edited proceedings of the 2006 CoreGRID Integration Workshop (CGIW'2006), held October 2006 in Krakow, Poland. A ?Network of Excellence? funded by the European Commission's Sixth Framework Program, CoreGRID, aims to strengthen and advance scientific and technological excellence in the area of Grid and Peer-to-Peer technologies by bringing together a critical mass of well-established researchers from 41 European research institutions. Achievements in European Research on Grid Systems covers, though is not limited to, the following topics: knowledge and data management; programming models; system architecture; Grid information, resource and workflow monitoring services; resource management and scheduling; systems, tools and environments; trust and security issues on the Grid. Designed for a professional audience of industry practitioners and researchers, Achievements in European Research on Grid Systems is also suitable for advanced-level students in computer science.

This book covers the latest approaches and results from reconfigurable computing architectures employed in the finance domain. So-called field-programmable gate arrays (FPGAs) have already shown to outperform standard CPU- and GPU-based computing architectures by far, saving up to 99% of energy depending on the compute tasks. Renowned authors from financial mathematics, computer architecture and finance business introduce the readers into today's challenges in finance IT, illustrate the most advanced approaches and use cases and present currently known methodologies for integrating FPGAs in finance systems together with latest results. The complete algorithm-to-hardware flow is covered holistically, so this book serves as a hands-on guide for IT managers, researchers and quants/programmers who think about integrating FPGAs into their current IT systems.

Automatic transformation of a sequential program into a parallel form is a subject that presents a great intellectual challenge and promises great practical rewards. There is a tremendous investment in existing sequential programs, and scientists and engineers continue to write their application programs in sequential languages (primarily in Fortran), but the demand for increasing speed is constant. The job of a restructuring compiler is to discover the dependence structure of a given program and transform the program in a way that is consistent with both that dependence structure and the characteristics of the given machine. Much attention in this field of research has been focused on the Fortran do loop. This is where one expects to find major chunks of computation that need to be performed repeatedly for different values of the index variable. Many loop transformations have been designed over the years, and several of them can be found in any parallelizing compiler currently in use in industry or at a university research facility. Loop Transformations for Restructuring Compilers: The Foundations provides a rigorous theory of loop transformations. The transformations are developed in a consistent mathematical framework using objects like directed graphs, matrices and linear equations. The algorithms that implement the transformations can then be precisely described in terms of certain abstract mathematical algorithms. The book provides the general mathematical background needed for loop transformations (including those basic mathematical algorithms), discusses data dependence, and introduces the major transformations. The next volume will build a detailed theory of looptransformations based on the material developed here. Loop Transformations for Restructuring Compilers: The Foundations presents a theory of loop transformations that is rigorous and yet reader-friendly.

Amid recent interest in Clifford algebra for dual quaternions as a more suitable method for Computer Graphics than standard matrix algebra, this book presents dual quaternions and their associated Clifford algebras in a new light, accessible to and geared towards the Computer Graphics community. Collating all the associated formulas and theorems in one place, this book provides an extensive and rigorous treatment of dual quaternions, as well as showing how two models of Clifford algebras emerge naturally from the theory of dual quaternions. Each chapter comes complete with a set of exercises to help readers sharpen and practice their knowledge. This book is accessible to anyone with a basic knowledge of quaternion algebra and is of particular use to forward-thinking members of the Computer Graphics community. .

This book presents Dual Mode Logic (DML), a new design paradigm for digital integrated circuits. DML logic gates can operate in two modes, each optimized for a different metric. Its on-the-fly switching between these operational modes at the gate, block and system levels provide maximal E-D optimization flexibility. Each highly detailed chapter has multiple illustrations showing how the DML paradigm seamlessly implements digital circuits that dissipate less energy while simultaneously improving performance and reducing area without a significant compromise in reliability. All the facets of the DML methodology are covered, starting from basic concepts, through single gate optimization, general module optimization, design trade-offs and new ways DML can be integrated into standard design flows using standard EDA tools. DML logic is compatible with numerous applications but is particularly advantageous for ultra-low power, reliable high performance systems, and advanced scaled technologies Written in language accessible to students and design engineers, each topic is oriented toward immediate application by all those interested in an alternative to CMOS logic. Describes a novel, promising alternative to conventional CMOS logic, known as Dual Mode Logic (DML), with which a single gate can be operated selectively in two modes, each optimized for a different metric (e.g., energy consumption, performance, size); Demonstrates several techniques at the architectural level, which can result in high energy savings and improved system performance; Focuses on the tradeoffs between power, area and speed including optimizations at the transistor and gate level, including alternatives to DML basic cells; Illustrates DML efficiency for a variety of VLSI applications.

This book presents novel hybrid encryption algorithms that possess many different characteristics. In particular, "Hybrid Encryption Algorithms over Wireless Communication Channels", examines encrypted image and video data for the purpose of secure wireless communications. A study of two different families of encryption schemes are introduced: namely, permutation-based and diffusion-based schemes. The objective of the book is to help the reader selecting the best suited scheme for the transmission of encrypted images and videos over wireless communications channels, with the aid of encryption and decryption quality metrics. This is achieved by applying number-theory based encryption algorithms, such as chaotic theory with different modes of operations, the Advanced Encryption Standard (AES), and the RC6 in a pre-processing step in order to achieve the required permutation and diffusion. The Rubik's cube is used afterwards in order to maximize the number of permutations. Transmission of images and videos is vital in today's communications systems. Hence, an effective encryption and modulation schemes are a must. The author adopts Orthogonal Frequency Division Multiplexing (OFDM), as the multicarrier transmission choice for wideband communications. For completeness, the author addresses the sensitivity of the encrypted data to the wireless channel impairments, and the effect of channel equalization on the received images and videos quality. Complete simulation experiments with MATLAB (R) codes are included. The book will help the reader obtain the required understanding for selecting the suitable encryption method that best fulfills the application requirements.

Computer Systems and Software Engineering is a compilation of sixteen state-of-the-art lectures and keynote speeches given at the COMPEURO '92 conference. The contributions are from leading researchers, each of whom gives a new insight into subjects ranging from hardware design through parallelism to computer applications. The pragmatic flavour of the contributions makes the book a valuable asset for both researchers and designers alike. The book covers the following subjects: Hardware Design: memory technology, logic design, algorithms and architecture; Parallel Processing: programming, cellular neural networks and load balancing; Software Engineering: machine learning, logic programming and program correctness; Visualization: the graphical computer interface.

The interplay between words, computability, algebra and arithmetic has now proved its relevance and fruitfulness. Indeed, the cross-fertilization between formal logic and finite automata (such as that initiated by J.R. Buchi) or between combinatorics on words and number theory has paved the way to recent dramatic developments, for example, the transcendence results for the real numbers having a "simple" binary expansion, by B. Adamczewski and Y. Bugeaud. This book is at the heart of this interplay through a unified exposition. Objects are considered with a perspective that comes both from theoretical computer science and mathematics. Theoretical computer science offers here topics such as decision problems and recognizability issues, whereas mathematics offers concepts such as discrete dynamical systems. The main goal is to give a quick access, for students and researchers in mathematics or computer science, to actual research topics at the intersection between automata and formal language theory, number theory and combinatorics on words. The second of two volumes on this subject, this book covers regular languages, numeration systems, formal methods applied to decidability issues about infinite words and sets of numbers.

This book discusses the advantages and challenges of Body-Biasing for integrated circuits and systems, together with the deployment of the design infrastructure needed to generate this Body-Bias voltage. These new design solutions enable state of the art energy efficiency and system flexibility for the latest applications, such as Internet of Things and 5G communications.

Computer vision falls short of human vision in two respects: execution time and intelligent interpretation. This book addresses the question of execution time. It is based on a workshop on specialized processors for real-time image analysis, held as part of the activities of an ESPRIT Basic Research Action, the Working Group on Vision. The aim of the book is to examine the state of the art in vision-oriented computers. Two approaches are distinguished: multiprocessor systems and fine-grain massively parallel computers. The development of fine-grain machines has become more important over the last decade, but one of the main conclusions of the workshop is that this does not imply the replacement of multiprocessor machines. The book is divided into four parts. Part 1 introduces different architectures for vision: associative and pyramid processors as examples of fine-grain machines and a workstation with bus-oriented network topology as an example of a multiprocessor system. Parts 2 and 3 deal with the design and development of dedicated and specialized architectures. Part 4 is mainly devoted to applications, including road segmentation, mobile robot guidance and navigation, reconstruction and identification of 3D objects, and motion estimation.

This book describes how we can design and make efficient processors for high-performance computing, AI, and data science. Although there are many textbooks on the design of processors we do not have a widely accepted definition of the efficiency of a general-purpose computer architecture. Without a definition of the efficiency, it is difficult to make scientific approach to the processor design. In this book, a clear definition of efficiency is given and thus a scientific approach for processor design is made possible. In chapter 2, the history of the development of high-performance processor is overviewed, to discuss what quantity we can use to measure the efficiency of these processors. The proposed quantity is the ratio between the minimum possible energy consumption and the actual energy consumption for a given application using a given semiconductor technology. In chapter 3, whether or not this quantity can be used in practice is discussed, for many real-world applications. In chapter 4, general-purpose processors in the past and present are discussed from this viewpoint. In chapter 5, how we can actually design processors with near-optimal efficiencies is described, and in chapter 6 how we can program such processors. This book gives a new way to look at the field of the design of high-performance processors.

This book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification. The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs. Describes a comprehensive set of synthesizable c code base as well as the hardware implementations for the different types of PQC algorithms including lattice-based, code-based, and multivariate-based; Demonstrates the hardware (FPGA and ASIC) and hardware-software optimizations and trade-offs of the NIST round 2 signature-based PQC algorithms; Enables designers to build hardware implementations that are resilient to a variety of side-channels.

This book describes a wide variety of System-on-Chip (SoC) security threats and vulnerabilities, as well as their sources, in each stage of a design life cycle. The authors discuss a wide variety of state-of-the-art security verification and validation approaches such as formal methods and side-channel analysis, as well as simulation-based security and trust validation approaches. This book provides a comprehensive reference for system on chip designers and verification and validation engineers interested in verifying security and trust of heterogeneous SoCs.

This book describes research performed in the context of trust/distrust propagation and aggregation, and their use in recommender systems. This is a hot research topic with important implications for various application areas. The main innovative contributions of the work are: -new bilattice-based model for trust and distrust, allowing for ignorance and inconsistency -proposals for various propagation and aggregation operators, including the analysis of mathematical properties -Evaluation of these operators on real data, including a discussion on the data sets and their characteristics. -A novel approach for identifying controversial items in a recommender system -An analysis on the utility of including distrust in recommender systems -Various approaches for trust based recommendations (a.o. base on collaborative filtering), an in depth experimental analysis, and proposal for a hybrid approach -Analysis of various user types in recommender systems to optimize bootstrapping of cold start users.

This textbook for a one-semester course in Electrical Circuit Theory is written to be concise, understandable, and applicable. Matlab is used throughout, for coding the programs and simulation of the circuits. Every new concept is illustrated with numerous examples and figures, in order to facilitate learning. The simple and clear style of presentation, along with comprehensive coverage, enables students to gain a solid foundation in the subject, along with the ability to apply techniques to real circuit analysis. Written to be accessible to students of varying backgrounds, this textbook presents the analysis of realistic, working circuits Presents concepts in a clear, concise and comprehensive manner, such as the difficult problem of setting up the equilibrium equations of circuits using a systematic approach in a few distinct steps Includes worked examples of functioning circuits, throughout every chapter, with an emphasis on real applications Includes numerous exercises at the end of each chapter Provides program scripts and circuit simulations, using the popular and widely used Matlab software, as supplementary material online

"Modeling Enterprise Architecture with TOGAF" explains everything you need to know to effectively model enterprise architecture with The Open Group Architecture Framework (TOGAF), the leading EA standard. This solution-focused reference presents key techniques and illustrative examples to help you model enterprise architecture.

This book describes the TOGAF standard and its structure, from the architecture transformation method to governance, and presents enterprise architecture modeling practices with plenty of examples of TOGAF deliverables in the context of a case study.

Although widespread and growing quickly, enterprise architecture is delicate to manage across all its dimensions. Focusing on the architecture transformation method, TOGAF provides a wide framework, which covers the repository, governance, and a set of recognized best practices. The examples featured in this book were realized using the open source Modelio tool, which includes extensions for TOGAF.
Includes intuitive summaries of the complex TOGAF standard to let you effectively model enterprise architectureUses practical examples to illustrate ways to adapt TOGAF to the needs of your enterprise Provides model examples with Modelio, a free modeling tool, letting you exercise TOGAF modeling immediately using a dedicated tool Combines existing modeling standards with TOGAF

The emergence of highly promising and potent technologies has enabled the transition of ordinary objects into smart artifacts-providing wider connectivity of digitized entities that can facilitate the building of connected cities. This book provides readers with a solid foundation on the latest technologies and tools required to develop and enhance smart cities around the world. The book begins by examining the rise of the cloud as the fundamental technology for establishing and sustaining smart cities and enterprises. Explaining the principal technologies and platform solutions for implementing intelligent cities, the book details the role of various technologies, standards, protocols, and tools in establishing flexible homes and the buildings of the future. Examines IT platforms and tools from various product vendors Considers service-oriented architecture and event-driven architecture for smart city applications Explains how to leverage big data analytics for smart city enhancement and improved decision making Includes case studies of intelligent cities, smart homes, buildings, transports, healthcare systems, and airports The authors explore the convergence of cloud computing and enterprise architecture and present valuable information on next-generation cloud computing. They also cover the various architectural types, including enterprise-scale integration, security, management, and governance. The book concludes by explaining the various security requirements of intelligent cities as well as the threats and vulnerabilities of the various components that form the basis of the intelligent city framework, including cloud, big data, Internet of Things, and mobile technologies.

This book cover wireless communication, security issues, advanced wireless sensor networks, routing protocols of WSNs with cross-layer solutions, emerging trends in the advanced WSNs, power management, distributed sensing and data gathering techniques for WSNs, WSNs Security, applications, research of advanced WSNs with simulation results, and simulation tools for WSNs. Features: Covers technologies supporting advanced wireless communication system, sensor networks and the conceptual development of the subject. Discusses advanced data gathering and sharing/ distributed sensing techniques with its business applicability. Includes numerous worked-out mathematical equations/formulas, and essential principles including figures, illustrations, algorithms, and flow charts are included in the book. Provides pervasive background knowledge including both wireless communications and wireless sensor networks Covers wireless networks as well as sensor network models in detailed. This is aimed at graduate students, researchers and academicians working in the field of computer science, wireless communication technology, and advanced wireless sensor networks.

This book describes a set of SystemC-based virtual prototype analysis methodologies, including design understanding, verification, security validation, and design space exploration. Readers will gain an overview of the latest research results in the field of Electronic Design Automation (EDA) at the Electronic System Level (ESL). The methodologies discussed enable readers to tackle easily key tasks and applications in the design process.

The book provides knowledge in the Building Information Model (BIM)-enabled cognitive computing methods for smart built environment involving cognitive network capabilities for smart buildings, integrating Augmented Reality/Mixed Reality in cognitive building concepts, cognitive Internet of Things (CIoT) for smart cities, Artificial Intelligence applications for cognitive cities, and cognitive smart cities using big data and machine learning. It focuses on the potential, requirements and implementation of CIoT paradigm to buildings, Artificial Intelligence techniques, reasoning, and Augmented Reality/Mixed Reality in cognitive building concepts, the concept of cognitive smart cities in its complexity, heterogeneity, and scope, and the challenge of utilizing the big data generated by smart cities from a machine learning perspective. The book comprises BIM-based and data-analytic research on cognitive IoT for smart buildings and cognitive cities using big data and machine learning as complex and dynamic systems. It presents applied theoretical contributions fostering a better understanding of such systems and the synergistic relationships between the motivating physical and informational settings. It reviews ongoing development of BIM-based and data science technologies for the processing, analysis, management, modeling, and simulation of big and context data and the associated applicability to cognitive systems that will advance different aspects of future cognitive cities. The book also analyses the required material to inform pertinent research communities of the state-of-the-art research and the latest development in the area of cognitive smart cities development, as well as a valuable reference for planners, designers, strategists, and ICT experts who are working towards the development and implementation of CIoT based on big data analytics and context-aware computing.

This book provides comprehensive coverage of state-of-the-art integrated circuit authentication techniques, including technologies, protocols and emerging applications. The authors first discuss emerging solutions for embedding unforgeable identifies into electronics devices, using techniques such as IC fingerprinting, physically unclonable functions and voltage-over-scaling. Coverage then turns to authentications protocols, with a special focus on resource-constrained devices, first giving an overview of the limitation of existing solutions and then presenting a number of new protocols, which provide better physical security and lower energy dissipation. The third part of the book focuses on emerging security applications for authentication schemes, including securing hardware supply chains, hardware-based device attestation and GPS spoofing attack detection and survival. Provides deep insight into the security threats undermining existing integrated circuit authentication techniques; Includes an in-depth discussion of the emerging technologies used to embed unforgeable identifies into electronics systems; Offers a comprehensive summary of existing authentication protocols and their limitations; Describes state-of-the-art authentication protocols that provide better physical security and more efficient energy consumption; Includes detailed case studies on the emerging applications of IC authentication schemes.